From nobody Tue Mar 3 05:11:12 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=quarantine dis=quarantine) header.from=suse.com Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1771402978617134.5266712351164; Wed, 18 Feb 2026 00:22:58 -0800 (PST) Received: from list by lists.xenproject.org with outflank-mailman.1235329.1538305 (Exim 4.92) (envelope-from ) id 1vscpZ-00010E-SL; Wed, 18 Feb 2026 08:22:45 +0000 Received: by outflank-mailman (output) from mailman id 1235329.1538305; Wed, 18 Feb 2026 08:22:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vscpZ-000107-PJ; Wed, 18 Feb 2026 08:22:45 +0000 Received: by outflank-mailman (input) for mailman id 1235329; Wed, 18 Feb 2026 08:22:45 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vscpY-0000J6-Vq for xen-devel@lists.xenproject.org; Wed, 18 Feb 2026 08:22:44 +0000 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.223.130]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id ff90fd4c-0ca2-11f1-b164-2bf370ae4941; Wed, 18 Feb 2026 09:22:44 +0100 (CET) Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id 85F953E704; Wed, 18 Feb 2026 08:22:43 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 1DE2A3EA65; Wed, 18 Feb 2026 08:22:43 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id aOkqBtN2lWkuHwAAD6G6ig (envelope-from ); Wed, 18 Feb 2026 08:22:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: ff90fd4c-0ca2-11f1-b164-2bf370ae4941 Authentication-Results: smtp-out1.suse.de; none From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev Cc: Juergen Gross , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Boris Ostrovsky , Josh Poimboeuf , Peter Zijlstra , xen-devel@lists.xenproject.org Subject: [PATCH v3 12/16] x86/paravirt: Split off MSR related hooks into new header Date: Wed, 18 Feb 2026 09:21:29 +0100 Message-ID: <20260218082133.400602-13-jgross@suse.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260218082133.400602-1-jgross@suse.com> References: <20260218082133.400602-1-jgross@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Rspamd-Server: rspamd2.dmz-prg2.suse.org X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[] X-Rspamd-Queue-Id: 85F953E704 X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Rspamd-Action: no action X-Spam-Flag: NO X-Spam-Score: -4.00 X-Spam-Level: X-ZM-MESSAGEID: 1771402981020154100 Content-Type: text/plain; charset="utf-8" Move the WRMSR, RDMSR and RDPMC related parts of paravirt.h and paravirt_types.h into a new header file paravirt-msr.h. Signed-off-by: Juergen Gross --- V3: - new patch --- arch/x86/include/asm/msr.h | 2 +- arch/x86/include/asm/paravirt-msr.h | 46 +++++++++++++++++++++++++++ arch/x86/include/asm/paravirt.h | 45 -------------------------- arch/x86/include/asm/paravirt_types.h | 13 -------- arch/x86/kernel/paravirt.c | 14 +++++--- arch/x86/xen/enlighten_pv.c | 11 ++++--- tools/objtool/check.c | 1 + 7 files changed, 63 insertions(+), 69 deletions(-) create mode 100644 arch/x86/include/asm/paravirt-msr.h diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h index 990268dea5ad..66f57265f2f8 100644 --- a/arch/x86/include/asm/msr.h +++ b/arch/x86/include/asm/msr.h @@ -308,7 +308,7 @@ static inline u64 native_read_pmc(int counter) } =20 #ifdef CONFIG_PARAVIRT_XXL -#include +#include #else static __always_inline u64 read_msr(u32 msr) { diff --git a/arch/x86/include/asm/paravirt-msr.h b/arch/x86/include/asm/par= avirt-msr.h new file mode 100644 index 000000000000..b299864b438a --- /dev/null +++ b/arch/x86/include/asm/paravirt-msr.h @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef _ASM_X86_PARAVIRT_MSR_H +#define _ASM_X86_PARAVIRT_MSR_H + +#include + +struct pv_msr_ops { + /* Unsafe MSR operations. These will warn or panic on failure. */ + u64 (*read_msr)(u32 msr); + void (*write_msr)(u32 msr, u64 val); + + /* Safe MSR operations. Returns 0 or -EIO. */ + int (*read_msr_safe)(u32 msr, u64 *val); + int (*write_msr_safe)(u32 msr, u64 val); + + u64 (*read_pmc)(int counter); +} __no_randomize_layout; + +extern struct pv_msr_ops pv_ops_msr; + +static __always_inline u64 read_msr(u32 msr) +{ + return PVOP_CALL1(u64, pv_ops_msr, read_msr, msr); +} + +static __always_inline void write_msr(u32 msr, u64 val) +{ + PVOP_VCALL2(pv_ops_msr, write_msr, msr, val); +} + +static __always_inline int read_msr_safe(u32 msr, u64 *val) +{ + return PVOP_CALL2(int, pv_ops_msr, read_msr_safe, msr, val); +} + +static __always_inline int write_msr_safe(u32 msr, u64 val) +{ + return PVOP_CALL2(int, pv_ops_msr, write_msr_safe, msr, val); +} + +static __always_inline u64 rdpmc(int counter) +{ + return PVOP_CALL1(u64, pv_ops_msr, read_pmc, counter); +} + +#endif /* _ASM_X86_PARAVIRT_MSR_H */ diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravir= t.h index 6b3aed5c2309..fcda593dd5c9 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h @@ -130,51 +130,6 @@ static inline void __write_cr4(unsigned long x) PVOP_VCALL1(pv_ops, cpu.write_cr4, x); } =20 -static inline u64 paravirt_read_msr(u32 msr) -{ - return PVOP_CALL1(u64, pv_ops, cpu.read_msr, msr); -} - -static inline void paravirt_write_msr(u32 msr, u64 val) -{ - PVOP_VCALL2(pv_ops, cpu.write_msr, msr, val); -} - -static inline int paravirt_read_msr_safe(u32 msr, u64 *val) -{ - return PVOP_CALL2(int, pv_ops, cpu.read_msr_safe, msr, val); -} - -static inline int paravirt_write_msr_safe(u32 msr, u64 val) -{ - return PVOP_CALL2(int, pv_ops, cpu.write_msr_safe, msr, val); -} - -static __always_inline u64 read_msr(u32 msr) -{ - return paravirt_read_msr(msr); -} - -static __always_inline int read_msr_safe(u32 msr, u64 *p) -{ - return paravirt_read_msr_safe(msr, p); -} - -static __always_inline void write_msr(u32 msr, u64 val) -{ - paravirt_write_msr(msr, val); -} - -static __always_inline int write_msr_safe(u32 msr, u64 val) -{ - return paravirt_write_msr_safe(msr, val); -} - -static __always_inline u64 rdpmc(int counter) -{ - return PVOP_CALL1(u64, pv_ops, cpu.read_pmc, counter); -} - static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned en= tries) { PVOP_VCALL2(pv_ops, cpu.alloc_ldt, ldt, entries); diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/p= aravirt_types.h index 4f5ae0068aab..1e7188247c1f 100644 --- a/arch/x86/include/asm/paravirt_types.h +++ b/arch/x86/include/asm/paravirt_types.h @@ -67,19 +67,6 @@ struct pv_cpu_ops { void (*cpuid)(unsigned int *eax, unsigned int *ebx, unsigned int *ecx, unsigned int *edx); =20 - /* Unsafe MSR operations. These will warn or panic on failure. */ - u64 (*read_msr)(u32 msr); - void (*write_msr)(u32 msr, u64 val); - - /* - * Safe MSR operations. - * Returns 0 or -EIO. - */ - int (*read_msr_safe)(u32 msr, u64 *val); - int (*write_msr_safe)(u32 msr, u64 val); - - u64 (*read_pmc)(int counter); - void (*start_context_switch)(struct task_struct *prev); void (*end_context_switch)(struct task_struct *next); #endif diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c index 792fa96b3233..089a87ac1582 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c @@ -109,11 +109,6 @@ struct paravirt_patch_template pv_ops =3D { .cpu.read_cr0 =3D native_read_cr0, .cpu.write_cr0 =3D native_write_cr0, .cpu.write_cr4 =3D native_write_cr4, - .cpu.read_msr =3D native_read_msr, - .cpu.write_msr =3D native_write_msr, - .cpu.read_msr_safe =3D native_read_msr_safe, - .cpu.write_msr_safe =3D native_write_msr_safe, - .cpu.read_pmc =3D native_read_pmc, .cpu.load_tr_desc =3D native_load_tr_desc, .cpu.set_ldt =3D native_set_ldt, .cpu.load_gdt =3D native_load_gdt, @@ -215,6 +210,15 @@ struct paravirt_patch_template pv_ops =3D { }; =20 #ifdef CONFIG_PARAVIRT_XXL +struct pv_msr_ops pv_ops_msr =3D { + .read_msr =3D native_read_msr, + .write_msr =3D native_write_msr, + .read_msr_safe =3D native_read_msr_safe, + .write_msr_safe =3D native_write_msr_safe, + .read_pmc =3D native_read_pmc, +}; +EXPORT_SYMBOL(pv_ops_msr); + NOKPROBE_SYMBOL(native_load_idt); #endif =20 diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c index 0a6a50f3e9a9..b94437f26cc0 100644 --- a/arch/x86/xen/enlighten_pv.c +++ b/arch/x86/xen/enlighten_pv.c @@ -1366,11 +1366,6 @@ asmlinkage __visible void __init xen_start_kernel(st= ruct start_info *si) pv_ops.cpu.read_cr0 =3D xen_read_cr0; pv_ops.cpu.write_cr0 =3D xen_write_cr0; pv_ops.cpu.write_cr4 =3D xen_write_cr4; - pv_ops.cpu.read_msr =3D xen_read_msr; - pv_ops.cpu.write_msr =3D xen_write_msr; - pv_ops.cpu.read_msr_safe =3D xen_read_msr_safe; - pv_ops.cpu.write_msr_safe =3D xen_write_msr_safe; - pv_ops.cpu.read_pmc =3D xen_read_pmc; pv_ops.cpu.load_tr_desc =3D paravirt_nop; pv_ops.cpu.set_ldt =3D xen_set_ldt; pv_ops.cpu.load_gdt =3D xen_load_gdt; @@ -1391,6 +1386,12 @@ asmlinkage __visible void __init xen_start_kernel(st= ruct start_info *si) pv_ops.cpu.start_context_switch =3D xen_start_context_switch; pv_ops.cpu.end_context_switch =3D xen_end_context_switch; =20 + pv_ops_msr.read_msr =3D xen_read_msr; + pv_ops_msr.write_msr =3D xen_write_msr; + pv_ops_msr.read_msr_safe =3D xen_read_msr_safe; + pv_ops_msr.write_msr_safe =3D xen_write_msr_safe; + pv_ops_msr.read_pmc =3D xen_read_pmc; + xen_init_irq_ops(); =20 /* diff --git a/tools/objtool/check.c b/tools/objtool/check.c index 37f87c4a0134..d400cb435757 100644 --- a/tools/objtool/check.c +++ b/tools/objtool/check.c @@ -529,6 +529,7 @@ static struct { } pv_ops_tables[] =3D { { .name =3D "pv_ops", }, { .name =3D "pv_ops_lock", }, + { .name =3D "pv_ops_msr", }, { .name =3D NULL, .idx_off =3D -1 } }; =20 --=20 2.53.0