From nobody Fri Jan 9 08:30:23 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=arm.com Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1767612981500476.0425119410255; Mon, 5 Jan 2026 03:36:21 -0800 (PST) Received: from list by lists.xenproject.org with outflank-mailman.1195268.1513273 (Exim 4.92) (envelope-from ) id 1vcisP-0005Fw-F5; Mon, 05 Jan 2026 11:35:57 +0000 Received: by outflank-mailman (output) from mailman id 1195268.1513273; Mon, 05 Jan 2026 11:35:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vcisP-0005F9-8B; Mon, 05 Jan 2026 11:35:57 +0000 Received: by outflank-mailman (input) for mailman id 1195268; Mon, 05 Jan 2026 11:35:56 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1vcisO-00047I-Bb for xen-devel@lists.xenproject.org; Mon, 05 Jan 2026 11:35:56 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id b2a8ba1d-ea2a-11f0-b15e-2bf370ae4941; Mon, 05 Jan 2026 12:35:55 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 488CC497; Mon, 5 Jan 2026 03:35:48 -0800 (PST) Received: from e134099.cambridge.arm.com (e134099.arm.com [10.1.198.34]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C65AF3F5A1; Mon, 5 Jan 2026 03:35:53 -0800 (PST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: b2a8ba1d-ea2a-11f0-b15e-2bf370ae4941 From: Harry Ramsey To: xen-devel@lists.xenproject.org Cc: Luca.Fancellu@arm.com, Penny Zheng , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Penny Zheng , Wei Chen , Luca Fancellu Subject: [PATCH v2 5/6] arm: Use secure hypervisor timer in MPU system Date: Mon, 5 Jan 2026 11:35:02 +0000 Message-ID: <20260105113503.2674777-6-harry.ramsey@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260105113503.2674777-1-harry.ramsey@arm.com> References: <20260105113503.2674777-1-harry.ramsey@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZM-MESSAGEID: 1767612983567154100 Content-Type: text/plain; charset="utf-8" From: Penny Zheng As MPU systems only have one secure state, we have to use secure EL2 hypervisor timer for Xen in secure EL2. Signed-off-by: Penny Zheng Signed-off-by: Wei Chen Signed-off-by: Luca Fancellu Signed-off-by: Harry Ramsey Reviewed-by: Ayan Kumar Halder --- v2: - Remove unncessary kconfig attribute. - Remove unncessary hypervisor timer macro. --- xen/arch/arm/include/asm/arm64/sysregs.h | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/includ= e/asm/arm64/sysregs.h index 7dfd20414d..19d409d3eb 100644 --- a/xen/arch/arm/include/asm/arm64/sysregs.h +++ b/xen/arch/arm/include/asm/arm64/sysregs.h @@ -462,6 +462,17 @@ #define ZCR_ELx_LEN_SIZE 9 #define ZCR_ELx_LEN_MASK 0x1ff =20 +#ifdef CONFIG_MPU +/* + * The Armv8-R AArch64 architecture always executes code in Secure + * state with EL2 as the highest exception level. + * + * Hypervisor timer registers for Secure EL2. + */ +#define CNTHP_CTL_EL2 CNTHPS_CTL_EL2 +#define CNTHP_CVAL_EL2 CNTHPS_CVAL_EL2 +#endif + #define REGION_TEXT_PRBAR 0x38 /* SH=3D11 AP=3D10 XN=3D00 */ #define REGION_RO_PRBAR 0x3A /* SH=3D11 AP=3D10 XN=3D10 */ #define REGION_DATA_PRBAR 0x32 /* SH=3D11 AP=3D00 XN=3D10 */ --=20 2.43.0