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[92.22.57.86]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4255d8a6bbesm9616571f8f.12.2025.10.03.15.53.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Oct 2025 15:53:57 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: d9024e14-a0ab-11f0-9809-7dc792cee155 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1759532038; x=1760136838; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=x7HaizuWoCOqmZuee74baF1kDN75Kwc6FxkeaKG4Enc=; b=k1DGaaqcWANTBp0S61SuRqdWkNCcljlKPNtpK0U0WBU883UJz6gcYs3sXdcyt0MDrT Zrqa0csQJJqYNWu8jbfmNM+c/KfIK3jrotCHmfAPP4d+pzQrzz4NKcVVIZQrA4PhtgP+ 0hxbdribFQTGy7dkDen99l8iC2nQhxzCnd5kI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1759532038; x=1760136838; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=x7HaizuWoCOqmZuee74baF1kDN75Kwc6FxkeaKG4Enc=; b=nnikoz0n8LN6Yzyowwa1U84d/1GZ5XWyTVeGNAn/0vZoOIcarvjl5ZuKrS+40ROp5r Q9yk1w4TeUg67XlZxAhFBETWTskx6h4drkBpTzRX9yEWMv6ugLMk6znESJD1w3WKwR44 76xh8I+IUQZ/Sjp8cP/ZkHRNF5iY6LUQ5H1HcNQSrQmxr5yAzmspU+HYHtzalPV5YeLr 6yC2rQay9SObpYm4YE11kccME9M7ymya033EHCQy7Y1mG/C5AiZIgLcS5vPVTOhgF0wv 7d31T3jioopONp7kq9/6AvbVZcqJuHEPr1HuhA3QAT1gqE2Aq1uP8UKtjPTy5PW6zSNL 0cSQ== X-Gm-Message-State: AOJu0YzQxnrD5Gw4Ip63YQb8/nIfCM7vsc+LXkIjLIUFhtym4EjPIfRZ ElTXZ0VJsGaRCWd6+wN0JmvHGMrLIKn9a+uo5ib/ZDdceTq6N4b5XUNp3jNEk4B6sn92YgAMPxD kC9tPfYqqNw== X-Gm-Gg: ASbGncsKdAnnygK5a9720qolJVWKjDbheHY1B70QrQ0oYpXWN1P3WvpDYXpf5BC5795 ZlfAOBO+eR96CskI1SKKipnkfOLgR+TMpDlCqdW5KpjBQ4Spu51nIud8hxkrdRXDFKxkUk1YPKM r5jRc6/axEPW5fIJ+quFP0ElpPdTfrMmMzIULqFLbmejl/eltZWFiFIJ4PI5VnI4hLnQl40AkUZ TLhyNm0eV5zrO8Gse72ul+5Uz7Nt5YxSZCEfAO/9Yv3yVEP7tLFlCFyCFJYiRg2Sq8bn7Tq2Cdn rkucnOlMtf7mXNHJRHw+GQTEPiT2+S5zStqulfOc9oQgqxua6RBREK4qbueEN7f9Vox+weXqnlA WtiWSMYDcpDjp1wOPgLqYiS1c1yonQ7n1JyWeEY6efbyyJKl+xtdHwTg6K7EqABdN5AQ01Fkjkw G3u32NUEae58t9HGg9lFb6 X-Google-Smtp-Source: AGHT+IELJCVFGLqkCST4IltIhXDZM9S/siO085/FDhprxOh2wFsisvOsYxp1EzupU4fvuGfuKFAMGg== X-Received: by 2002:a05:6000:616:b0:3fe:efa8:7f1d with SMTP id ffacd0b85a97d-42567137428mr2651888f8f.7.1759532038150; Fri, 03 Oct 2025 15:53:58 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v3 15/22] x86/entry: Alter how IRET faults are recognised Date: Fri, 3 Oct 2025 23:53:27 +0100 Message-Id: <20251003225334.2123667-16-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251003225334.2123667-1-andrew.cooper3@citrix.com> References: <20251003225334.2123667-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1759532074996116600 Right now we have two IRET instructions that can fault for guest reasons, a= nd the pre exception table gives handle_exception as the fixup for both. Instead, we can have compat_restore_all_guest() use restore_all_guest()'s I= RET which gives us just a single position to handle specially. In exception_with_ints_disabled(), remove search_pre_exception_table() and = use a simpler check. Explain how the recovery works, because this isn't the fi= rst time I've had to reverse engineer it for my own understanding. The reference to iret_to_guest highlights that any checking here is specific to CONFIG_PV, so exclude it in !PV builds. Later in exception_with_ints_disabled(), it suffices to load %ecx rather th= an %rcx, and remove a stray semi-colon from the rep movsq. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 v2: * New --- xen/arch/x86/x86_64/compat/entry.S | 3 +-- xen/arch/x86/x86_64/entry.S | 31 ++++++++++++++++++++++-------- 2 files changed, 24 insertions(+), 10 deletions(-) diff --git a/xen/arch/x86/x86_64/compat/entry.S b/xen/arch/x86/x86_64/compa= t/entry.S index d7b381ea546d..39925d80a677 100644 --- a/xen/arch/x86/x86_64/compat/entry.S +++ b/xen/arch/x86/x86_64/compat/entry.S @@ -167,8 +167,7 @@ FUNC(compat_restore_all_guest) scf=3DSTK_REL(CPUINFO_scf, CPUINFO_rip), \ sel=3DSTK_REL(CPUINFO_verw_sel, CPUINFO_rip) =20 -.Lft0: iretq - _ASM_PRE_EXTABLE(.Lft0, handle_exception) + jmp iret_to_guest END(compat_restore_all_guest) =20 /* Callers can cope with both %rax and %rcx being clobbered. */ diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S index c02245ac064c..01b431793b7b 100644 --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -241,8 +241,9 @@ iret_exit_to_guest: SPEC_CTRL_COND_VERW /* Req: %rsp=3Deframe C= lob: efl */ =20 addq $8,%rsp -.Lft0: iretq - _ASM_PRE_EXTABLE(.Lft0, handle_exception) + +LABEL(iret_to_guest, 0) + iretq END(restore_all_guest) =20 /* @@ -920,10 +921,23 @@ handle_exception_saved: exception_with_ints_disabled: testb $3,UREGS_cs(%rsp) # interrupts disabled outside Xen? jnz FATAL_exception_with_ints_disabled - movq %rsp,%rdi - call search_pre_exception_table - testq %rax,%rax # no fixup code for faulting EIP? - jz .Ldispatch_exceptions + +#ifndef CONFIG_PV + /* No PV? No IRETs-to-guest to worry about. */ + jmp .Ldispatch_exceptions +#else + /* Check to see if the exception was on the IRET to guest context.= */ + lea iret_to_guest(%rip), %rax + cmp %rax, UREGS_rip(%rsp) + jne .Ldispatch_exceptions + + /* + * Recovery is at handle_exception. It may be necessary to make s= pace + * on the interrupted stack for ec/ev, after which the current ec/= ev + * is copied to make it appear as if this exception occurred in gu= est + * context. + */ + lea handle_exception(%rip), %rax movq %rax,UREGS_rip(%rsp) # fixup regular stack =20 #ifdef CONFIG_XEN_SHSTK @@ -940,13 +954,14 @@ exception_with_ints_disabled: movq %rsp,%rsi subq $8,%rsp movq %rsp,%rdi - movq $UREGS_kernel_sizeof/8,%rcx - rep; movsq # make room for ec/ev + mov $UREGS_kernel_sizeof/8, %ecx + rep movsq # make room for ec/ev 1: movq UREGS_error_code(%rsp),%rax # ec/ev movq %rax,UREGS_kernel_sizeof(%rsp) mov %r15, STACK_CPUINFO_FIELD(xen_cr3)(%r14) mov %r13b, STACK_CPUINFO_FIELD(use_pv_cr3)(%r14) jmp restore_all_xen # return to fixup code +#endif /* !CONFIG_PV */ =20 /* No special register assumptions. */ FATAL_exception_with_ints_disabled: --=20 2.39.5