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none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1759215910; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=DWVg40kg3cCGlbRyjRUpQT7gp/Qt5+z4LTlGPsiGrXQ=; b=GRVg5tr0HEd/zfji2Am9gUzCqwhy/P7cpZ0YqMKn1p2vm/K6PZjvE/xKZ+HTt1e5zEfSPv LOjQd5/AGoxOsinDK3vohhJW6ExL1IshA4USHZvyAShs1Vinh0d0R9nNWByddY4+O84CE8 iDnY1/zxQYKvD6WCT3sUZxg9Y/4NvRc= From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: xin@zytor.com, Juergen Gross , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Boris Ostrovsky , xen-devel@lists.xenproject.org Subject: [PATCH v2 12/12] x86/msr: Reduce number of low level MSR access helpers Date: Tue, 30 Sep 2025 09:03:56 +0200 Message-ID: <20250930070356.30695-13-jgross@suse.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20250930070356.30695-1-jgross@suse.com> References: <20250930070356.30695-1-jgross@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Spamd-Result: default: False [-2.80 / 50.00]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-0.999]; MIME_GOOD(-0.10)[text/plain]; TO_MATCH_ENVRCPT_ALL(0.00)[]; ARC_NA(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; MIME_TRACE(0.00)[0:+]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:mid,suse.com:email,imap1.dmz-prg2.suse.org:helo]; FUZZY_RATELIMITED(0.00)[rspamd.com]; RCPT_COUNT_SEVEN(0.00)[11]; RCVD_COUNT_TWO(0.00)[2]; FROM_EQ_ENVFROM(0.00)[]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; R_RATELIMIT(0.00)[to_ip_from(RLfdszjqhz8kzzb9uwpzdm8png)]; RCVD_TLS_ALL(0.00)[] X-Spam-Flag: NO X-Spam-Level: X-Spam-Score: -2.80 X-ZohoMail-DKIM: pass (identity @suse.com) X-ZM-MESSAGEID: 1759215933538116600 Content-Type: text/plain; charset="utf-8" Some MSR access helpers are redundant now, so remove the no longer needed ones. Signed-off-by: Juergen Gross --- arch/x86/include/asm/msr.h | 14 ++------------ arch/x86/xen/enlighten_pv.c | 4 ++-- 2 files changed, 4 insertions(+), 14 deletions(-) diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h index d42cd2c19818..43924d8a3d66 100644 --- a/arch/x86/include/asm/msr.h +++ b/arch/x86/include/asm/msr.h @@ -290,21 +290,11 @@ static __always_inline void native_wrmsr(u32 msr, u32= low, u32 high) native_wrmsrq(msr, (u64)high << 32 | low); } =20 -static __always_inline u64 native_read_msr(u32 msr) -{ - return native_rdmsrq(msr); -} - static __always_inline int native_read_msr_safe(u32 msr, u64 *val) { return __rdmsr(msr, val, EX_TYPE_RDMSR_SAFE) ? -EIO : 0; } =20 -static __always_inline void native_write_msr(u32 msr, u64 val) -{ - native_wrmsrq(msr, val); -} - static __always_inline int native_write_msr_safe(u32 msr, u64 val) { return __wrmsrq(msr, val, EX_TYPE_WRMSR_SAFE) ? -EIO : 0; @@ -369,7 +359,7 @@ static __always_inline u64 rdpmc(int counter) #else static __always_inline u64 read_msr(u32 msr) { - return native_read_msr(msr); + return native_rdmsrq(msr); } =20 static __always_inline int read_msr_safe(u32 msr, u64 *p) @@ -379,7 +369,7 @@ static __always_inline int read_msr_safe(u32 msr, u64 *= p) =20 static __always_inline void write_msr(u32 msr, u64 val) { - native_write_msr(msr, val); + native_wrmsrq(msr, val); } =20 static __always_inline int write_msr_safe(u32 msr, u64 val) diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c index df653099c567..277e053cf3dd 100644 --- a/arch/x86/xen/enlighten_pv.c +++ b/arch/x86/xen/enlighten_pv.c @@ -1097,7 +1097,7 @@ static u64 xen_do_read_msr(u32 msr, int *err) if (err) *err =3D native_read_msr_safe(msr, &val); else - val =3D native_read_msr(msr); + val =3D native_rdmsrq(msr); =20 switch (msr) { case MSR_IA32_APICBASE: @@ -1156,7 +1156,7 @@ static void xen_do_write_msr(u32 msr, u64 val, int *e= rr) if (err) *err =3D native_write_msr_safe(msr, val); else - native_write_msr(msr, val); + native_wrmsrq(msr, val); } } =20 --=20 2.51.0