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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Sep 2025 04:53:10.4359 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 99349b40-5060-4293-8b9d-08ddf1b845e0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099D5.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB7904 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1757652826884116600 Content-Type: text/plain; charset="utf-8" Function vm_event_is_enabled() is introduced to check if vm event is enable= d, and also make the checking conditional upon CONFIG_VM_EVENT, which could he= lp DCE a lot calls/codes, such as hvm_monitor_io(), etc when VM_EVENT=3Dn. In-place assertion of arch.vm_event is kinds of redundant and could be removed. Signed-off-by: Penny Zheng --- xen/arch/x86/hvm/emulate.c | 6 ++--- xen/arch/x86/hvm/hvm.c | 41 +++++++++++++---------------- xen/arch/x86/hvm/svm/intr.c | 2 +- xen/arch/x86/hvm/vmx/intr.c | 2 +- xen/arch/x86/include/asm/vm_event.h | 9 +++++++ 5 files changed, 33 insertions(+), 27 deletions(-) diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c index 2af4f30359..75567db403 100644 --- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -105,7 +105,7 @@ static int set_context_data(void *buffer, unsigned int = size) { struct vcpu *curr =3D current; =20 - if ( curr->arch.vm_event ) + if ( vm_event_is_enabled(curr) ) { unsigned int safe_size =3D min(size, curr->arch.vm_event->emul.read.size); @@ -771,7 +771,7 @@ static void *hvmemul_map_linear_addr( ASSERT(p2mt =3D=3D p2m_ram_logdirty || !p2m_is_readonly(p2mt)); } =20 - if ( unlikely(curr->arch.vm_event) && + if ( unlikely(vm_event_is_enabled(curr)) && curr->arch.vm_event->send_event && hvm_monitor_check_p2m(addr, gfn, pfec, npfec_kind_with_gla) ) { @@ -1870,7 +1870,7 @@ static int hvmemul_rep_outs_set_context( int rc =3D X86EMUL_OKAY; =20 ASSERT(bytes_per_rep <=3D 4); - if ( !ev ) + if ( !vm_event_is_enabled(current) ) return X86EMUL_UNHANDLEABLE; =20 ptr =3D ev->emul.read.data; diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 23bd7f078a..e3abd2849a 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -532,7 +532,7 @@ void hvm_do_resume(struct vcpu *v) if ( !vcpu_ioreq_handle_completion(v) ) return; =20 - if ( unlikely(v->arch.vm_event) ) + if ( unlikely(vm_event_is_enabled(v)) ) hvm_vm_event_do_resume(v); =20 /* Inject pending hw/sw event */ @@ -546,11 +546,12 @@ void hvm_do_resume(struct vcpu *v) v->arch.hvm.inject_event.vector =3D HVM_EVENT_VECTOR_UNSET; } =20 - if ( unlikely(v->arch.vm_event) && v->arch.monitor.next_interrupt_enab= led ) + if ( unlikely(vm_event_is_enabled(v)) && + v->arch.monitor.next_interrupt_enabled ) { struct x86_event info; =20 - if ( hvm_get_pending_event(v, &info) ) + if ( hvm_get_pending_event(v, &info) && vm_event_is_enabled(v) ) { hvm_monitor_interrupt(info.vector, info.type, info.error_code, info.cr2); @@ -2088,7 +2089,7 @@ int hvm_handle_xsetbv(u32 index, u64 new_bv) { int rc; =20 - if ( index =3D=3D 0 ) + if ( index =3D=3D 0 && vm_event_is_enabled(current) ) hvm_monitor_crX(XCR0, new_bv, current->arch.xcr0); =20 rc =3D x86emul_write_xcr(index, new_bv, NULL); @@ -2337,9 +2338,7 @@ int hvm_set_cr0(unsigned long value, bool may_defer) if ( may_defer && unlikely(v->domain->arch.monitor.write_ctrlreg_enabl= ed & monitor_ctrlreg_bitmask(VM_EVENT_X86_CR0)) ) { - ASSERT(v->arch.vm_event); - - if ( hvm_monitor_crX(CR0, value, old_value) ) + if ( vm_event_is_enabled(v) && hvm_monitor_crX(CR0, value, old_val= ue) ) { /* The actual write will occur in hvm_do_resume(), if permitte= d. */ v->arch.vm_event->write_data.do_write.cr0 =3D 1; @@ -2462,9 +2461,8 @@ int hvm_set_cr3(unsigned long value, bool noflush, bo= ol may_defer) if ( may_defer && unlikely(currd->arch.monitor.write_ctrlreg_enabled & monitor_ctrlreg_bitmask(VM_EVENT_X86_CR3)) ) { - ASSERT(curr->arch.vm_event); - - if ( hvm_monitor_crX(CR3, value, curr->arch.hvm.guest_cr[3]) ) + if ( vm_event_is_enabled(curr) && + hvm_monitor_crX(CR3, value, curr->arch.hvm.guest_cr[3]) ) { /* The actual write will occur in hvm_do_resume(), if permitte= d. */ curr->arch.vm_event->write_data.do_write.cr3 =3D 1; @@ -2544,9 +2542,7 @@ int hvm_set_cr4(unsigned long value, bool may_defer) if ( may_defer && unlikely(v->domain->arch.monitor.write_ctrlreg_enabl= ed & monitor_ctrlreg_bitmask(VM_EVENT_X86_CR4)) ) { - ASSERT(v->arch.vm_event); - - if ( hvm_monitor_crX(CR4, value, old_cr) ) + if ( vm_event_is_enabled(v) && hvm_monitor_crX(CR4, value, old_cr)= ) { /* The actual write will occur in hvm_do_resume(), if permitte= d. */ v->arch.vm_event->write_data.do_write.cr4 =3D 1; @@ -3407,7 +3403,7 @@ static enum hvm_translation_result __hvm_copy( return HVMTRANS_bad_gfn_to_mfn; } =20 - if ( unlikely(v->arch.vm_event) && + if ( unlikely(vm_event_is_enabled(v)) && (flags & HVMCOPY_linear) && v->arch.vm_event->send_event && hvm_monitor_check_p2m(addr, gfn, pfec, npfec_kind_with_gla) ) @@ -3538,6 +3534,7 @@ int hvm_vmexit_cpuid(struct cpu_user_regs *regs, unsi= gned int inst_len) struct vcpu *curr =3D current; unsigned int leaf =3D regs->eax, subleaf =3D regs->ecx; struct cpuid_leaf res; + int ret =3D 0; =20 if ( curr->arch.msrs->misc_features_enables.cpuid_faulting && hvm_get_cpl(curr) > 0 ) @@ -3554,7 +3551,10 @@ int hvm_vmexit_cpuid(struct cpu_user_regs *regs, uns= igned int inst_len) regs->rcx =3D res.c; regs->rdx =3D res.d; =20 - return hvm_monitor_cpuid(inst_len, leaf, subleaf); + if ( vm_event_is_enabled(curr) ) + ret =3D hvm_monitor_cpuid(inst_len, leaf, subleaf); + + return ret; } =20 void hvm_rdtsc_intercept(struct cpu_user_regs *regs) @@ -3694,9 +3694,8 @@ int hvm_msr_write_intercept(unsigned int msr, uint64_= t msr_content, if ( ret !=3D X86EMUL_OKAY ) return ret; =20 - ASSERT(v->arch.vm_event); - - if ( hvm_monitor_msr(msr, msr_content, msr_old_content) ) + if ( vm_event_is_enabled(v) && + hvm_monitor_msr(msr, msr_content, msr_old_content) ) { /* The actual write will occur in hvm_do_resume(), if permitte= d. */ v->arch.vm_event->write_data.do_write.msr =3D 1; @@ -3854,12 +3853,10 @@ int hvm_descriptor_access_intercept(uint64_t exit_i= nfo, struct vcpu *curr =3D current; struct domain *currd =3D curr->domain; =20 - if ( currd->arch.monitor.descriptor_access_enabled ) - { - ASSERT(curr->arch.vm_event); + if ( currd->arch.monitor.descriptor_access_enabled && + vm_event_is_enabled(curr) ) hvm_monitor_descriptor_access(exit_info, vmx_exit_qualification, descriptor, is_write); - } else if ( !hvm_emulate_one_insn(is_sysdesc_access, "sysdesc access") ) domain_crash(currd); =20 diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.c index 46186a1102..557ebc98d8 100644 --- a/xen/arch/x86/hvm/svm/intr.c +++ b/xen/arch/x86/hvm/svm/intr.c @@ -130,7 +130,7 @@ void asmlinkage svm_intr_assist(void) enum hvm_intblk intblk; =20 /* Block event injection while handling a sync vm_event. */ - if ( unlikely(v->arch.vm_event) && v->arch.vm_event->sync_event ) + if ( unlikely(vm_event_is_enabled(v)) && v->arch.vm_event->sync_event ) return; =20 /* Crank the handle on interrupt state. */ diff --git a/xen/arch/x86/hvm/vmx/intr.c b/xen/arch/x86/hvm/vmx/intr.c index b35dc8c586..a8ced95871 100644 --- a/xen/arch/x86/hvm/vmx/intr.c +++ b/xen/arch/x86/hvm/vmx/intr.c @@ -239,7 +239,7 @@ void asmlinkage vmx_intr_assist(void) } =20 /* Block event injection while handling a sync vm_event. */ - if ( unlikely(v->arch.vm_event) && v->arch.vm_event->sync_event ) + if ( unlikely(vm_event_is_enabled(v)) && v->arch.vm_event->sync_event ) return; =20 #ifdef CONFIG_MEM_SHARING diff --git a/xen/arch/x86/include/asm/vm_event.h b/xen/arch/x86/include/asm= /vm_event.h index 46e77ed6d9..446d02c7d5 100644 --- a/xen/arch/x86/include/asm/vm_event.h +++ b/xen/arch/x86/include/asm/vm_event.h @@ -45,4 +45,13 @@ void vm_event_sync_event(struct vcpu *v, bool value); =20 void vm_event_reset_vmtrace(struct vcpu *v); =20 +static inline bool vm_event_is_enabled(struct vcpu *v) +{ +#ifdef CONFIG_VM_EVENT + return v->arch.vm_event !=3D NULL; +#else + return false; +#endif +} + #endif /* __ASM_X86_VM_EVENT_H__ */ --=20 2.34.1