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Add implementation of ns16x50_iir_check_msi(). Signed-off-by: Denis Mukhin --- Changes in v5: - Moved earlier in the series - Link to v5: https://lore.kernel.org/xen-devel/20250828235409.2835815-10-d= mukhin@ford.com/ --- xen/common/emul/vuart/ns16x50.c | 62 ++++++++++++++++++++++++++++++++- 1 file changed, 61 insertions(+), 1 deletion(-) diff --git a/xen/common/emul/vuart/ns16x50.c b/xen/common/emul/vuart/ns16x5= 0.c index 9d1fe0284362..a8ec9f6c3a04 100644 --- a/xen/common/emul/vuart/ns16x50.c +++ b/xen/common/emul/vuart/ns16x50.c @@ -108,7 +108,7 @@ static bool cf_check ns16x50_iir_check_thr(const struct= vuart_ns16x50 *vdev) =20 static bool cf_check ns16x50_iir_check_msi(const struct vuart_ns16x50 *vde= v) { - return false; + return vdev->regs[UART_MSR] & UART_MSR_CHANGE; } =20 /* @@ -230,12 +230,63 @@ static int ns16x50_io_write8( regs[UART_LCR] =3D val; break; =20 + case UART_MCR: { + uint8_t msr_curr, msr_next, msr_delta; + + msr_curr =3D regs[UART_MSR]; + msr_next =3D 0; + msr_delta =3D 0; + + if ( val & UART_MCR_RESERVED0 ) + ns16x50_warn(vdev, "MCR: attempt to set reserved bit: %x\n= ", + UART_MCR_RESERVED0); + + if ( val & UART_MCR_TCRTLR ) + ns16x50_warn(vdev, "MCR: not supported: %x\n", + UART_MCR_TCRTLR); + + if ( val & UART_MCR_RESERVED1 ) + ns16x50_warn(vdev, "MCR: attempt to set reserved bit: %x\n= ", + UART_MCR_RESERVED1); + + /* Set modem status */ + if ( val & UART_MCR_LOOP ) + { + if ( val & UART_MCR_DTR ) + msr_next |=3D UART_MSR_DSR; + if ( val & UART_MCR_RTS ) + msr_next |=3D UART_MSR_CTS; + if ( val & UART_MCR_OUT1 ) + msr_next |=3D UART_MSR_RI; + if ( val & UART_MCR_OUT2 ) + msr_next |=3D UART_MSR_DCD; + } + else + msr_next |=3D UART_MSR_DCD | UART_MSR_DSR | UART_MSR_CTS; + + /* Calculate changes in modem status */ + if ( (msr_curr & UART_MSR_CTS) ^ (msr_next & UART_MSR_CTS) ) + msr_delta |=3D UART_MSR_DCTS; + if ( (msr_curr & UART_MSR_DSR) ^ (msr_next & UART_MSR_DSR) ) + msr_delta |=3D UART_MSR_DDSR; + if ( (msr_curr & UART_MSR_RI) & (msr_next & UART_MSR_RI) ) + msr_delta |=3D UART_MSR_TERI; + if ( (msr_curr & UART_MSR_DCD) ^ (msr_next & UART_MSR_DCD) ) + msr_delta |=3D UART_MSR_DDCD; + + regs[UART_MCR] =3D val & UART_MCR_MASK; + regs[UART_MSR] =3D msr_next | msr_delta; + + break; + } + /* NB: Firmware (e.g. OVMF) may rely on SCR presence. */ case UART_SCR: regs[UART_SCR] =3D val; break; =20 case UART_LSR: /* RO */ + case UART_MSR: /* RO */ default: rc =3D -EINVAL; break; @@ -321,11 +372,20 @@ static int ns16x50_io_read8( val =3D regs[UART_LCR]; break; =20 + case UART_MCR: + val =3D regs[UART_MCR]; + break; + case UART_LSR: val =3D regs[UART_LSR] | UART_LSR_THRE | UART_LSR_TEMT; regs[UART_LSR] =3D val & ~UART_LSR_MASK; break; =20 + case UART_MSR: + val =3D regs[UART_MSR]; + regs[UART_MSR] &=3D ~UART_MSR_CHANGE; + break; + case UART_SCR: val =3D regs[UART_SCR]; break; --=20 2.51.0