From nobody Sun Sep 14 08:23:08 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id F24B52FF649; Thu, 4 Sep 2025 12:58:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756990727; cv=none; b=qzyxxzqRVj5G8ZMg0QqTvesLVfCMkYA+Ql2b+SEdERtSpOqL7x0YT1oCqmiLuE53FoBg8wfGK8HIYFGhrPSP7KK08XFB89ZU+1rz9DMTVaj3C/hH+ZBoEpgq4kAVQRP4tdfpOX5MS54KlLdTYUGFeaHK6qMSWTUVh0s6lnWJX4I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756990727; c=relaxed/simple; bh=Wcg92DRZXcNqlymrmFUfKEEAeGMaOYSIPVR12E7Jvgo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YqkJFeDN8Jm+nF1OjjTN3wG5p5KN1lxkaGrhkSpizbVKDhhgwoU/DUuq+irsBzMAbxIDcISvV3x+z4jCS36p/1Uqs+dy4j+uzn1e9awCI+Azv9g8Bc/ppXQplRiFVuqBvTswG3Jm7VDrJLmlrpGfMlXAv+5faOLx3gRZOLtJL6g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 00A6F2ED2; Thu, 4 Sep 2025 05:58:37 -0700 (PDT) Received: from e123572-lin.arm.com (e123572-lin.cambridge.arm.com [10.1.194.54]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C0CAA3F6A8; Thu, 4 Sep 2025 05:58:40 -0700 (PDT) From: Kevin Brodsky To: linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Kevin Brodsky , Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org Subject: [PATCH 5/7] powerpc/mm: support nested lazy_mmu sections Date: Thu, 4 Sep 2025 13:57:34 +0100 Message-ID: <20250904125736.3918646-6-kevin.brodsky@arm.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20250904125736.3918646-1-kevin.brodsky@arm.com> References: <20250904125736.3918646-1-kevin.brodsky@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The lazy_mmu API now allows nested sections to be handled by arch code: enter() can return a flag if called inside another lazy_mmu section, so that the matching call to leave() leaves any optimisation enabled. This patch implements that new logic for powerpc: if there is an active batch, then enter() returns LAZY_MMU_NESTED and the matching leave() leaves batch->active set. The preempt_{enable,disable} calls are left untouched as they already handle nesting themselves. TLB flushing is still done in leave() regardless of the nesting level, as the caller may rely on it whether nesting is occurring or not. Signed-off-by: Kevin Brodsky --- .../powerpc/include/asm/book3s/64/tlbflush-hash.h | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h b/arch/powe= rpc/include/asm/book3s/64/tlbflush-hash.h index c9f1e819e567..001c474da1fe 100644 --- a/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h +++ b/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h @@ -30,6 +30,7 @@ typedef int lazy_mmu_state_t; static inline lazy_mmu_state_t arch_enter_lazy_mmu_mode(void) { struct ppc64_tlb_batch *batch; + int lazy_mmu_nested; =20 if (radix_enabled()) return LAZY_MMU_DEFAULT; @@ -39,9 +40,14 @@ static inline lazy_mmu_state_t arch_enter_lazy_mmu_mode(= void) */ preempt_disable(); batch =3D this_cpu_ptr(&ppc64_tlb_batch); - batch->active =3D 1; + lazy_mmu_nested =3D batch->active; =20 - return LAZY_MMU_DEFAULT; + if (!lazy_mmu_nested) { + batch->active =3D 1; + return LAZY_MMU_DEFAULT; + } else { + return LAZY_MMU_NESTED; + } } =20 static inline void arch_leave_lazy_mmu_mode(lazy_mmu_state_t state) @@ -54,7 +60,10 @@ static inline void arch_leave_lazy_mmu_mode(lazy_mmu_sta= te_t state) =20 if (batch->index) __flush_tlb_pending(batch); - batch->active =3D 0; + + if (state !=3D LAZY_MMU_NESTED) + batch->active =3D 0; + preempt_enable(); } =20 --=20 2.47.0