From nobody Sun Sep 14 08:23:09 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 92AB4301460; Thu, 4 Sep 2025 12:58:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756990708; cv=none; b=NBvT2ZGLRqxicrqZt3h53zentFGmKq+SZxpGmFY0iA6XmuMgH3mQ3TJOs7PWdrHpqby2Ue6sz0y3i0u7Pesr22y0snNeGJX/KyAwx7tZUNGRiBZ5LPzf/OXl47innYkp67llTpNERfjM7iWP8wevqFCOQSX3CLtecVSFh4TtX+k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1756990708; c=relaxed/simple; bh=J0wrEDhHvhhujJ+9znl+qpww540bRXLf9t4RiPsSpNE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=oOweIR8XsJ7sbmPmP16s8k2RKPapgk8ss9h1wYYSD2CHSVV9K5dbE83s4aq5RFom80QCvGBCPgePc2XvVLy512WABfXiwZnssB+smikqvNjqcSMb6PhNpE5GMO42SxlM9TbL1Ge4uz1A6XtikgOoRuOKLhECqG1xTYb3lkUN4uc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 741D025E0; Thu, 4 Sep 2025 05:58:17 -0700 (PDT) Received: from e123572-lin.arm.com (e123572-lin.cambridge.arm.com [10.1.194.54]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 44AD33F6A8; Thu, 4 Sep 2025 05:58:21 -0700 (PDT) From: Kevin Brodsky To: linux-mm@kvack.org Cc: linux-kernel@vger.kernel.org, Kevin Brodsky , Alexander Gordeev , Andreas Larsson , Andrew Morton , Boris Ostrovsky , Borislav Petkov , Catalin Marinas , Christophe Leroy , Dave Hansen , David Hildenbrand , "David S. Miller" , "H. Peter Anvin" , Ingo Molnar , Jann Horn , Juergen Gross , "Liam R. Howlett" , Lorenzo Stoakes , Madhavan Srinivasan , Michael Ellerman , Michal Hocko , Mike Rapoport , Nicholas Piggin , Peter Zijlstra , Ryan Roberts , Suren Baghdasaryan , Thomas Gleixner , Vlastimil Babka , Will Deacon , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org Subject: [PATCH 1/7] mm: remove arch_flush_lazy_mmu_mode() Date: Thu, 4 Sep 2025 13:57:30 +0100 Message-ID: <20250904125736.3918646-2-kevin.brodsky@arm.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20250904125736.3918646-1-kevin.brodsky@arm.com> References: <20250904125736.3918646-1-kevin.brodsky@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This function has only ever been used in arch/x86, so there is no need for other architectures to implement it. Remove it from linux/pgtable.h and all architectures besides x86. The arm64 implementation is not empty but it is only called from arch_leave_lazy_mmu_mode(), so we can simply fold it there. Signed-off-by: Kevin Brodsky Acked-by: Mike Rapoport (Microsoft) --- arch/arm64/include/asm/pgtable.h | 9 +-------- arch/powerpc/include/asm/book3s/64/tlbflush-hash.h | 2 -- arch/sparc/include/asm/tlbflush_64.h | 1 - arch/x86/include/asm/pgtable.h | 3 ++- include/linux/pgtable.h | 1 - 5 files changed, 3 insertions(+), 13 deletions(-) diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgta= ble.h index abd2dee416b3..728d7b6ed20a 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -101,21 +101,14 @@ static inline void arch_enter_lazy_mmu_mode(void) set_thread_flag(TIF_LAZY_MMU); } =20 -static inline void arch_flush_lazy_mmu_mode(void) +static inline void arch_leave_lazy_mmu_mode(void) { if (in_interrupt()) return; =20 if (test_and_clear_thread_flag(TIF_LAZY_MMU_PENDING)) emit_pte_barriers(); -} - -static inline void arch_leave_lazy_mmu_mode(void) -{ - if (in_interrupt()) - return; =20 - arch_flush_lazy_mmu_mode(); clear_thread_flag(TIF_LAZY_MMU); } =20 diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h b/arch/powe= rpc/include/asm/book3s/64/tlbflush-hash.h index 146287d9580f..176d7fd79eeb 100644 --- a/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h +++ b/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h @@ -55,8 +55,6 @@ static inline void arch_leave_lazy_mmu_mode(void) preempt_enable(); } =20 -#define arch_flush_lazy_mmu_mode() do {} while (0) - extern void hash__tlbiel_all(unsigned int action); =20 extern void flush_hash_page(unsigned long vpn, real_pte_t pte, int psize, diff --git a/arch/sparc/include/asm/tlbflush_64.h b/arch/sparc/include/asm/= tlbflush_64.h index 8b8cdaa69272..cd144eb31bdd 100644 --- a/arch/sparc/include/asm/tlbflush_64.h +++ b/arch/sparc/include/asm/tlbflush_64.h @@ -44,7 +44,6 @@ void flush_tlb_kernel_range(unsigned long start, unsigned= long end); void flush_tlb_pending(void); void arch_enter_lazy_mmu_mode(void); void arch_leave_lazy_mmu_mode(void); -#define arch_flush_lazy_mmu_mode() do {} while (0) =20 /* Local cpu only. */ void __flush_tlb_all(void); diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h index e33df3da6980..14fd672bc9b2 100644 --- a/arch/x86/include/asm/pgtable.h +++ b/arch/x86/include/asm/pgtable.h @@ -117,7 +117,8 @@ extern pmdval_t early_pmd_flags; #define pte_val(x) native_pte_val(x) #define __pte(x) native_make_pte(x) =20 -#define arch_end_context_switch(prev) do {} while(0) +#define arch_end_context_switch(prev) do {} while (0) +#define arch_flush_lazy_mmu_mode() do {} while (0) #endif /* CONFIG_PARAVIRT_XXL */ =20 static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set) diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h index 4c035637eeb7..8848e132a6be 100644 --- a/include/linux/pgtable.h +++ b/include/linux/pgtable.h @@ -234,7 +234,6 @@ static inline int pmd_dirty(pmd_t pmd) #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE #define arch_enter_lazy_mmu_mode() do {} while (0) #define arch_leave_lazy_mmu_mode() do {} while (0) -#define arch_flush_lazy_mmu_mode() do {} while (0) #endif =20 #ifndef pte_batch_hint --=20 2.47.0