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[195.149.20.212]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-45b6f0c6fe5sm78394535e9.5.2025.08.28.08.06.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Aug 2025 08:06:14 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 8b5178ae-8420-11f0-8adc-4578a1afcccb DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1756393575; x=1756998375; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PgmHnEeI6SxfsGeG6rRdPzhs3Pr505V+8fvY4mIUQ20=; b=UeFH2KrrwcE369wqLpu8KeZinEjyJ9eeV2Op4IeYmpcOLV60sFN3vYf8efxAWDMcbL pvzQX+x2/DgQt1h2++DNrHSMVVFh+MdVnCsDNFqxnklVO1zkRxGEkxqYSL8TQENjM3KZ X4ZWlAcOjU0xuKVK7DzaM541EPT9Fkyuz9Y8w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1756393575; x=1756998375; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PgmHnEeI6SxfsGeG6rRdPzhs3Pr505V+8fvY4mIUQ20=; b=MblAlRFz7uR9eXruGW0Zf1ZGjZijJb82ZCXgCSexSab3LD6YkHwAwXl1PEKc0DykZV +RjCt8WSLllhJaFf3AVRcAWi276yetAnKsCMHcg5VJ3EihCqwXwn7kiG+apIDLKMb0sw +I+GrN4WthG+tIFB8Bh1yeuPsYKmtZ/jLvXRyG1jfdYpNJE22dR/TNnencLKUh38E1ZG gNlVVNKDwwp452ySMJY8F1yOPDRkf342wpx1aZ5SwpD4CvxEzJtqgqcu5rL2toMgjurH EfMmhdy7hwTQ/Qbp9bxNZchB8eOE2N8f3Xq00Wln9nSSd9Wfe9rGJwnQVbB6HbVGbVAD 4yxQ== X-Gm-Message-State: AOJu0YxEYFfarcDhQyRc4EU0mlbnNd0arQZjva250d1opl9c4ScPA2NS /e9nu4bge4XbXuNp4f2X++L6GWu+9mDcGBGzFEkM6o36SRfrFP7JuoRIPxAvno/tZVihAo/+OAn GXWpu X-Gm-Gg: ASbGnctlN2IJklEDjcZ8BInqdOWJa9mQsZqvcwx9tkcxqi9k27PoId9oxzxjKwc1Lef 6DvDzKwQIs8qpxXe5TVOj7ZxbI0ATqmZVksRknevlhu/AHlDiYc+MjC5qp4l8JtTwErjjLnOD4U cmPwn+kjC7foPcOE6pOCdwXuBk1kMXs4X/yDGDvGvMA7m9FRy/sYT9wlxYfQdK6fiMA4fLvt2QB y++GCkbCT0HewXLRb+YoxsLiFrJ6ofuIamHQoplAY2DWmY0xlm21dN2NJKPbYPCj2AdueOXAPnN wt7PEg2GYk8DyzoGE341yL0ghdxBIFsiC/ztPg+STWSZgFHP4gtbUnWEz10yYnbChgwMeNNWTbY c5d36j+xdih7j/POeUFNIgYPN5RUrA+afN/qeaxMGiCyJo8drOWnG+zbr5ys9/n+sG8POborDaG Fl X-Google-Smtp-Source: AGHT+IE6wkCmxSjZlDLFodx9e+bViG30EvRU7WG/WSSoEBbdFGwMfQm59jtAuWXGzfWmgd420HIOxg== X-Received: by 2002:a05:6000:250e:b0:3b9:55a:9d0c with SMTP id ffacd0b85a97d-3c5da54e97dmr17845560f8f.3.1756393575031; Thu, 28 Aug 2025 08:06:15 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v2 16/23] x86/entry: Alter how IRET faults are recognised Date: Thu, 28 Aug 2025 16:04:02 +0100 Message-Id: <20250828150409.901315-17-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250828150409.901315-1-andrew.cooper3@citrix.com> References: <20250828150409.901315-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1756393908127116600 Right now we have two IRET instructions that can fault for guest reasons, a= nd the pre exception table gives handle_exception as the fixup for both. Instead, we can have compat_restore_all_guest() use restore_all_guest()'s I= RET which gives us just a single position to handle specially. In exception_with_ints_disabled(), remove search_pre_exception_table() and = use a simpler check. Explain how the recovery works, because this isn't the fi= rst time I've had to figure it out. The reference to iret_to_guest highlights that any checking here is specific to CONFIG_PV, so exclude it in !PV builds. Later in exception_with_ints_disabled(), it suffices to load %ecx rather th= an %rcx, and remove a stray semi-colon from the rep movsq. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 v2: * New --- xen/arch/x86/x86_64/compat/entry.S | 3 +-- xen/arch/x86/x86_64/entry.S | 31 ++++++++++++++++++++++-------- 2 files changed, 24 insertions(+), 10 deletions(-) diff --git a/xen/arch/x86/x86_64/compat/entry.S b/xen/arch/x86/x86_64/compa= t/entry.S index d7b381ea546d..39925d80a677 100644 --- a/xen/arch/x86/x86_64/compat/entry.S +++ b/xen/arch/x86/x86_64/compat/entry.S @@ -167,8 +167,7 @@ FUNC(compat_restore_all_guest) scf=3DSTK_REL(CPUINFO_scf, CPUINFO_rip), \ sel=3DSTK_REL(CPUINFO_verw_sel, CPUINFO_rip) =20 -.Lft0: iretq - _ASM_PRE_EXTABLE(.Lft0, handle_exception) + jmp iret_to_guest END(compat_restore_all_guest) =20 /* Callers can cope with both %rax and %rcx being clobbered. */ diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S index c02245ac064c..01b431793b7b 100644 --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -241,8 +241,9 @@ iret_exit_to_guest: SPEC_CTRL_COND_VERW /* Req: %rsp=3Deframe C= lob: efl */ =20 addq $8,%rsp -.Lft0: iretq - _ASM_PRE_EXTABLE(.Lft0, handle_exception) + +LABEL(iret_to_guest, 0) + iretq END(restore_all_guest) =20 /* @@ -920,10 +921,23 @@ handle_exception_saved: exception_with_ints_disabled: testb $3,UREGS_cs(%rsp) # interrupts disabled outside Xen? jnz FATAL_exception_with_ints_disabled - movq %rsp,%rdi - call search_pre_exception_table - testq %rax,%rax # no fixup code for faulting EIP? - jz .Ldispatch_exceptions + +#ifndef CONFIG_PV + /* No PV? No IRETs-to-guest to worry about. */ + jmp .Ldispatch_exceptions +#else + /* Check to see if the exception was on the IRET to guest context.= */ + lea iret_to_guest(%rip), %rax + cmp %rax, UREGS_rip(%rsp) + jne .Ldispatch_exceptions + + /* + * Recovery is at handle_exception. It may be necessary to make s= pace + * on the interrupted stack for ec/ev, after which the current ec/= ev + * is copied to make it appear as if this exception occurred in gu= est + * context. + */ + lea handle_exception(%rip), %rax movq %rax,UREGS_rip(%rsp) # fixup regular stack =20 #ifdef CONFIG_XEN_SHSTK @@ -940,13 +954,14 @@ exception_with_ints_disabled: movq %rsp,%rsi subq $8,%rsp movq %rsp,%rdi - movq $UREGS_kernel_sizeof/8,%rcx - rep; movsq # make room for ec/ev + mov $UREGS_kernel_sizeof/8, %ecx + rep movsq # make room for ec/ev 1: movq UREGS_error_code(%rsp),%rax # ec/ev movq %rax,UREGS_kernel_sizeof(%rsp) mov %r15, STACK_CPUINFO_FIELD(xen_cr3)(%r14) mov %r13b, STACK_CPUINFO_FIELD(use_pv_cr3)(%r14) jmp restore_all_xen # return to fixup code +#endif /* !CONFIG_PV */ =20 /* No special register assumptions. */ FATAL_exception_with_ints_disabled: --=20 2.39.5