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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 May 2025 12:54:40.1799 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 05757956-fbb6-4eeb-cc03-08dda0424e86 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00029929.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ5PPF7B9E98CB6 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1748696109359116600 Content-Type: text/plain; charset="utf-8" Currently, Xen vPCI refuses BAR writes if the BAR is mapped in p2m. If firmware initializes a 32-bit BAR to a bad address, Linux may try to write a new address to the BAR without disabling memory decoding. Since Xen refuses such writes, the BAR (and thus PCI device) will be non-functional. Currently the deferred mapping machinery supports only map or unmap operations. Rework the deferred mapping machinery to support unmap-then-map (VPCI_MOVE) operations. Allow the hardware domain to issue 32-bit BAR writes with memory decoding enabled, using the VPCI_MOVE operation to remap the BAR in p2m. Take the opportunity to remove a stray newline in bar_write(). Resolves: https://gitlab.com/xen-project/xen/-/issues/197 Signed-off-by: Stewart Hildebrand --- RFC->v1: * keep memory decoding enabled in hardware * allow write while memory decoding is enabled for 32-bit BARs only * rework BAR mapping machinery to support unmap-then-map operation --- xen/drivers/vpci/header.c | 86 +++++++++++++++++++++++++++------------ xen/include/xen/vpci.h | 5 +++ 2 files changed, 66 insertions(+), 25 deletions(-) diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c index c9519c804d97..f2ffad2ace32 100644 --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -214,7 +214,6 @@ bool vpci_process_pending(struct vcpu *v) const struct pci_dev *pdev =3D v->vpci.pdev; struct vpci_header *header =3D NULL; unsigned int i; - int rc; =20 if ( !pdev ) return false; @@ -229,16 +228,34 @@ bool vpci_process_pending(struct vcpu *v) } =20 header =3D &pdev->vpci->header; - rc =3D map_bars(header, v->domain, v->vpci.cmd & PCI_COMMAND_MEMORY); =20 - if ( rc =3D=3D -ERESTART ) + if ( v->vpci.map_op =3D=3D VPCI_UNMAP || v->vpci.map_op =3D=3D VPCI_MO= VE ) { - read_unlock(&v->domain->pci_lock); - return true; + int rc =3D map_bars(header, v->domain, false); + + if ( rc =3D=3D -ERESTART ) + { + read_unlock(&v->domain->pci_lock); + return true; + } + + if ( rc ) + goto fail; } =20 - if ( rc ) - goto fail; + if ( v->vpci.map_op =3D=3D VPCI_MAP || v->vpci.map_op =3D=3D VPCI_MOVE= ) + { + int rc =3D map_bars(header, v->domain, true); + + if ( rc =3D=3D -ERESTART ) + { + read_unlock(&v->domain->pci_lock); + return true; + } + + if ( rc ) + goto fail; + } =20 v->vpci.pdev =3D NULL; =20 @@ -312,7 +329,8 @@ static int __init apply_map(struct domain *d, const str= uct pci_dev *pdev, return rc; } =20 -static void defer_map(const struct pci_dev *pdev, uint16_t cmd, bool rom_o= nly) +static void defer_map(const struct pci_dev *pdev, uint16_t cmd, + enum vpci_map_op map_op, bool rom_only) { struct vcpu *curr =3D current; =20 @@ -324,6 +342,7 @@ static void defer_map(const struct pci_dev *pdev, uint1= 6_t cmd, bool rom_only) */ curr->vpci.pdev =3D pdev; curr->vpci.cmd =3D cmd; + curr->vpci.map_op =3D map_op; curr->vpci.rom_only =3D rom_only; /* * Raise a scheduler softirq in order to prevent the guest from resumi= ng @@ -333,7 +352,8 @@ static void defer_map(const struct pci_dev *pdev, uint1= 6_t cmd, bool rom_only) raise_softirq(SCHEDULE_SOFTIRQ); } =20 -static int modify_bars(const struct pci_dev *pdev, uint16_t cmd, bool rom_= only) +static int modify_bars(const struct pci_dev *pdev, uint16_t cmd, + enum vpci_map_op map_op, bool rom_only) { struct vpci_header *header =3D &pdev->vpci->header; struct pci_dev *tmp; @@ -344,9 +364,9 @@ static int modify_bars(const struct pci_dev *pdev, uint= 16_t cmd, bool rom_only) =20 ASSERT(rw_is_write_locked(&pdev->domain->pci_lock)); =20 - if ( !(cmd & PCI_COMMAND_MEMORY) ) + if ( map_op =3D=3D VPCI_UNMAP ) { - defer_map(pdev, cmd, rom_only); + defer_map(pdev, cmd, map_op, rom_only); =20 return 0; } @@ -378,7 +398,8 @@ static int modify_bars(const struct pci_dev *pdev, uint= 16_t cmd, bool rom_only) (rom_only ? bar->type !=3D VPCI_BAR_ROM : (bar->type =3D=3D VPCI_BAR_ROM && !header->rom_en= abled)) || /* Skip BARs already in the requested state. */ - bar->enabled =3D=3D !!(cmd & PCI_COMMAND_MEMORY) ) + (bar->enabled =3D=3D !!(cmd & PCI_COMMAND_MEMORY) && + map_op !=3D VPCI_MOVE) ) continue; =20 if ( !pci_check_bar(pdev, _mfn(start), _mfn(end)) ) @@ -551,7 +572,7 @@ static int modify_bars(const struct pci_dev *pdev, uint= 16_t cmd, bool rom_only) return apply_map(pdev->domain, pdev, cmd); } =20 - defer_map(pdev, cmd, rom_only); + defer_map(pdev, cmd, map_op, rom_only); =20 return 0; } @@ -584,7 +605,8 @@ static void cf_check cmd_write( * memory decoding bit has not been changed, so leave everything a= s-is, * hoping the guest will realize and try again. */ - modify_bars(pdev, cmd, false); + modify_bars(pdev, cmd, cmd & PCI_COMMAND_MEMORY ? VPCI_MAP : VPCI_= UNMAP, + false); else pci_conf_write16(pdev->sbdf, reg, cmd); } @@ -615,20 +637,27 @@ static void cf_check bar_write( val &=3D PCI_BASE_ADDRESS_MEM_MASK; =20 /* - * Xen only cares whether the BAR is mapped into the p2m, so allow BAR - * writes as long as the BAR is not mapped into the p2m. + * Allow 64-bit BAR writes only when the BAR is not mapped in p2m. Alw= ays + * allow 32-bit BAR writes, but skip unnecessary p2m operations when m= apped. */ if ( bar->enabled ) { - /* If the value written is the current one avoid printing a warnin= g. */ - if ( val !=3D (uint32_t)(bar->addr >> (hi ? 32 : 0)) ) - gprintk(XENLOG_WARNING, - "%pp: ignored BAR %zu write while mapped\n", - &pdev->sbdf, bar - pdev->vpci->header.bars + hi); - return; + if ( bar->type =3D=3D VPCI_BAR_MEM32 ) + { + if ( val =3D=3D bar->addr ) + return; + } + else + { + /* If the value written is the same avoid printing a warning. = */ + if ( val !=3D (uint32_t)(bar->addr >> (hi ? 32 : 0)) ) + gprintk(XENLOG_WARNING, + "%pp: ignored BAR %zu write while mapped\n", + &pdev->sbdf, bar - pdev->vpci->header.bars + hi); + return; + } } =20 - /* * Update the cached address, so that when memory decoding is enabled * Xen can map the BAR into the guest p2m. @@ -647,6 +676,10 @@ static void cf_check bar_write( } =20 pci_conf_write32(pdev->sbdf, reg, val); + + if ( bar->enabled ) + modify_bars(pdev, pci_conf_read16(pdev->sbdf, PCI_COMMAND), VPCI_M= OVE, + false); } =20 static void cf_check guest_mem_bar_write(const struct pci_dev *pdev, @@ -752,7 +785,8 @@ static void cf_check rom_write( * Pass PCI_COMMAND_MEMORY or 0 to signal a map/unmap request, note th= at * this fabricated command is never going to be written to the registe= r. */ - else if ( modify_bars(pdev, new_enabled ? PCI_COMMAND_MEMORY : 0, true= ) ) + else if ( modify_bars(pdev, new_enabled ? PCI_COMMAND_MEMORY : 0, + new_enabled ? VPCI_MAP : VPCI_UNMAP, true) ) /* * No memory has been added or removed from the p2m (because the a= ctual * p2m changes are deferred in defer_map) and the ROM enable bit h= as @@ -1054,7 +1088,9 @@ static int cf_check init_header(struct pci_dev *pdev) goto fail; } =20 - return (cmd & PCI_COMMAND_MEMORY) ? modify_bars(pdev, cmd, false) : 0; + return (cmd & PCI_COMMAND_MEMORY) + ? modify_bars(pdev, cmd, VPCI_MAP, false) + : 0; =20 fail: pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd); diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h index e74359848440..2ddfb147e7b7 100644 --- a/xen/include/xen/vpci.h +++ b/xen/include/xen/vpci.h @@ -197,6 +197,11 @@ struct vpci_vcpu { /* Per-vcpu structure to store state while {un}mapping of PCI BARs. */ const struct pci_dev *pdev; uint16_t cmd; + enum vpci_map_op { + VPCI_MAP, + VPCI_UNMAP, + VPCI_MOVE, + } map_op; bool rom_only : 1; }; =20 --=20 2.49.0