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h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=odOrILESrhnnD+KMb8PsZKWET0NUPER1gv9psvhTkOQ=; b=GaKGjpiX5esZx7ZrAYpe6ryRzA/j/efXMc12OJ8eAq1AstpIe+9wzCx14dc4DR1uJMuhC2Ffl0edE3145dbqm/x40nwb1zdrl0XbO6ppSWT3ErWO/uBUQKcCQRJYkKN4VYiSzmih0kD81BDaVKWd+AF092PNNMmUQ3LKWXx/wn8= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Jiqian Chen To: CC: Huang Rui , Jiqian Chen , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v3 07/11] vpci: Hide extended capability when it fails to initialize Date: Mon, 21 Apr 2025 14:18:59 +0800 Message-ID: <20250421061903.1542652-8-Jiqian.Chen@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250421061903.1542652-1-Jiqian.Chen@amd.com> References: <20250421061903.1542652-1-Jiqian.Chen@amd.com> MIME-Version: 1.0 Content-Type: text/plain; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Apr 2025 06:19:34.9908 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: da781faf-2e47-4a79-a585-08dd809c7ca8 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000026C9.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB7246 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1745216407101019000 When vpci fails to initialize a extended capability of device for dom0, it just return error instead of catching and processing exception. That makes the entire device unusable. So, add new a function to hide extended capability when initialization fails. And remove the failed extended capability handler from vpci extended capability list. Signed-off-by: Jiqian Chen --- cc: "Roger Pau Monn=C3=A9" --- v2->v3 changes: * Separated from the last version patch "vpci: Hide capability when it fail= s to initialize". * Whole implementation changed because last version is wrong. This version gets target handler and previous handler from vpci->handlers= , then remove the target. * Note: a case in function vpci_ext_capability_mask() needs to be discussed, because it may change the offset of next capability when the offset of ta= rget capability is 0x100U(the first extended capability), my implementation is= just to ignore and let hardware to handle the target capability. v1->v2 changes: * Removed the "priorities" of initializing capabilities since it isn't used= anymore. * Added new function vpci_capability_mask() and vpci_ext_capability_mask() = to remove failed capability from list. * Called vpci_make_msix_hole() in the end of init_msix(). Best regards, Jiqian Chen. --- xen/drivers/vpci/vpci.c | 79 ++++++++++++++++++++++++++++++++++++++ xen/include/xen/pci_regs.h | 1 + 2 files changed, 80 insertions(+) diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c index f97c7cc460a0..8ff5169bdd18 100644 --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -183,6 +183,83 @@ static void vpci_capability_mask(struct pci_dev *pdev, xfree(next_r); } =20 +static struct vpci_register *vpci_get_previous_ext_cap_register + (struct vpci *vpci, const unsigned int offset) +{ + uint32_t header; + unsigned int pos =3D PCI_CFG_SPACE_SIZE; + struct vpci_register *r; + + if ( offset <=3D PCI_CFG_SPACE_SIZE ) + return NULL; + + r =3D vpci_get_register(vpci, pos, 4); + ASSERT(r); + + header =3D (uint32_t)(uintptr_t)r->private; + pos =3D PCI_EXT_CAP_NEXT(header); + while ( pos > PCI_CFG_SPACE_SIZE && pos !=3D offset ) + { + r =3D vpci_get_register(vpci, pos, 4); + ASSERT(r); + header =3D (uint32_t)(uintptr_t)r->private; + pos =3D PCI_EXT_CAP_NEXT(header); + } + + if ( pos <=3D PCI_CFG_SPACE_SIZE ) + return NULL; + + return r; +} + +static void vpci_ext_capability_mask(struct pci_dev *pdev, + const unsigned int cap) +{ + const unsigned int offset =3D pci_find_ext_capability(pdev->sbdf, cap); + struct vpci_register *rm, *prev_r; + struct vpci *vpci =3D pdev->vpci; + uint32_t header, pre_header; + + spin_lock(&vpci->lock); + rm =3D vpci_get_register(vpci, offset, 4); + if ( !rm ) + { + spin_unlock(&vpci->lock); + return; + } + + header =3D (uint32_t)(uintptr_t)rm->private; + if ( offset =3D=3D PCI_CFG_SPACE_SIZE ) + { + if ( PCI_EXT_CAP_NEXT(header) <=3D PCI_CFG_SPACE_SIZE ) + rm->private =3D (void *)(uintptr_t)0; + else + /* + * Else case needs to remove the capability in position 0x100U= and + * moves the next capability to be in position 0x100U, that wo= uld + * cause the offset of next capability in vpci different from = the + * hardware, then cause error accesses, so just ignore it here= and + * hope hardware would handle the capability well. + */ + printk(XENLOG_ERR "%pd %pp: ext cap %u is first cap, can't mas= k it\n", + pdev->domain, &pdev->sbdf, cap); + spin_unlock(&vpci->lock); + return; + } + + prev_r =3D vpci_get_previous_ext_cap_register(vpci, offset); + ASSERT(prev_r); + + pre_header =3D (uint32_t)(uintptr_t)prev_r->private; + prev_r->private =3D (void *)(uintptr_t)((pre_header & + ~PCI_EXT_CAP_NEXT_MASK) | + (header & PCI_EXT_CAP_NEXT_MASK)= ); + + list_del(&rm->node); + spin_unlock(&vpci->lock); + xfree(rm); +} + static void vpci_init_capabilities(struct pci_dev *pdev) { for ( unsigned int i =3D 0; i < NUM_VPCI_INIT; i++ ) @@ -216,6 +293,8 @@ static void vpci_init_capabilities(struct pci_dev *pdev) is_ext ? "extended" : "legacy", cap, rc); if ( !is_ext ) vpci_capability_mask(pdev, cap); + else + vpci_ext_capability_mask(pdev, cap); } } } diff --git a/xen/include/xen/pci_regs.h b/xen/include/xen/pci_regs.h index 27b4f44eedf3..5fe6653fded4 100644 --- a/xen/include/xen/pci_regs.h +++ b/xen/include/xen/pci_regs.h @@ -449,6 +449,7 @@ #define PCI_EXT_CAP_ID(header) ((header) & 0x0000ffff) #define PCI_EXT_CAP_VER(header) (((header) >> 16) & 0xf) #define PCI_EXT_CAP_NEXT(header) (((header) >> 20) & 0xffc) +#define PCI_EXT_CAP_NEXT_MASK 0xFFC00000U =20 #define PCI_EXT_CAP_ID_ERR 1 #define PCI_EXT_CAP_ID_VC 2 --=20 2.34.1