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Thu, 06 Mar 2025 06:57:48 -0800 (PST) From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , Jan Beulich , Andrew Cooper Subject: [PATCH v2 1/3] x86/apic: remove delivery and destination mode fields from drivers Date: Thu, 6 Mar 2025 15:57:31 +0100 Message-ID: <20250306145733.99927-2-roger.pau@citrix.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250306145733.99927-1-roger.pau@citrix.com> References: <20250306145733.99927-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1741273094336019100 All local APIC drivers use physical destination and fixed delivery modes, remove the fields from the genapic struct and simplify the logic. No functional change intended. Signed-off-by: Roger Pau Monn=C3=A9 Reviewed-by: Andrew Cooper --- xen/arch/x86/genapic/bigsmp.c | 2 -- xen/arch/x86/genapic/default.c | 2 -- xen/arch/x86/genapic/x2apic.c | 4 ---- xen/arch/x86/include/asm/genapic.h | 5 ----- xen/arch/x86/io_apic.c | 16 ++++++++-------- xen/arch/x86/msi.c | 11 +++-------- 6 files changed, 11 insertions(+), 29 deletions(-) diff --git a/xen/arch/x86/genapic/bigsmp.c b/xen/arch/x86/genapic/bigsmp.c index b2e721845275..ddb3a0b5d727 100644 --- a/xen/arch/x86/genapic/bigsmp.c +++ b/xen/arch/x86/genapic/bigsmp.c @@ -46,8 +46,6 @@ static int __init cf_check probe_bigsmp(void) =20 const struct genapic __initconst_cf_clobber apic_bigsmp =3D { APIC_INIT("bigsmp", probe_bigsmp), - .int_delivery_mode =3D dest_Fixed, - .int_dest_mode =3D 0, /* physical delivery */ .init_apic_ldr =3D init_apic_ldr_phys, .vector_allocation_cpumask =3D vector_allocation_cpumask_phys, .cpu_mask_to_apicid =3D cpu_mask_to_apicid_phys, diff --git a/xen/arch/x86/genapic/default.c b/xen/arch/x86/genapic/default.c index 59c79afdb8fa..16e1875f6378 100644 --- a/xen/arch/x86/genapic/default.c +++ b/xen/arch/x86/genapic/default.c @@ -16,8 +16,6 @@ /* should be called last. */ const struct genapic __initconst_cf_clobber apic_default =3D { APIC_INIT("default", NULL), - .int_delivery_mode =3D dest_Fixed, - .int_dest_mode =3D 0, /* physical delivery */ .init_apic_ldr =3D init_apic_ldr_flat, .vector_allocation_cpumask =3D vector_allocation_cpumask_phys, .cpu_mask_to_apicid =3D cpu_mask_to_apicid_phys, diff --git a/xen/arch/x86/genapic/x2apic.c b/xen/arch/x86/genapic/x2apic.c index c277f4f79b0a..74a6d808ac30 100644 --- a/xen/arch/x86/genapic/x2apic.c +++ b/xen/arch/x86/genapic/x2apic.c @@ -140,8 +140,6 @@ static void cf_check send_IPI_mask_x2apic_cluster( =20 static const struct genapic __initconst_cf_clobber apic_x2apic_phys =3D { APIC_INIT("x2apic_phys", NULL), - .int_delivery_mode =3D dest_Fixed, - .int_dest_mode =3D 0 /* physical delivery */, .init_apic_ldr =3D init_apic_ldr_phys, .vector_allocation_cpumask =3D vector_allocation_cpumask_phys, .cpu_mask_to_apicid =3D cpu_mask_to_apicid_phys, @@ -163,8 +161,6 @@ static const struct genapic __initconst_cf_clobber apic= _x2apic_mixed =3D { * The following fields are exclusively used by external interrupts and * hence are set to use Physical destination mode handlers. */ - .int_delivery_mode =3D dest_Fixed, - .int_dest_mode =3D 0 /* physical delivery */, .vector_allocation_cpumask =3D vector_allocation_cpumask_phys, .cpu_mask_to_apicid =3D cpu_mask_to_apicid_phys, =20 diff --git a/xen/arch/x86/include/asm/genapic.h b/xen/arch/x86/include/asm/= genapic.h index cf36d48f3b07..04d3f1de7a1f 100644 --- a/xen/arch/x86/include/asm/genapic.h +++ b/xen/arch/x86/include/asm/genapic.h @@ -23,9 +23,6 @@ struct genapic { const char *name; int (*probe)(void); =20 - /* Interrupt delivery parameters ('physical' vs. 'logical flat'). */ - int int_delivery_mode; - int int_dest_mode; void (*init_apic_ldr)(void); const cpumask_t *(*vector_allocation_cpumask)(int cpu); unsigned int (*cpu_mask_to_apicid)(const cpumask_t *cpumask); @@ -37,8 +34,6 @@ struct genapic { .name =3D aname, \ .probe =3D aprobe =20 -#define INT_DELIVERY_MODE (genapic.int_delivery_mode) -#define INT_DEST_MODE (genapic.int_dest_mode) #define TARGET_CPUS ((const typeof(cpu_online_map) *)&cpu_online_map) #define init_apic_ldr() alternative_vcall(genapic.init_apic_ldr) #define cpu_mask_to_apicid(mask) ({ \ diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c index 776dd57720a2..60b39827c851 100644 --- a/xen/arch/x86/io_apic.c +++ b/xen/arch/x86/io_apic.c @@ -1080,8 +1080,8 @@ static void __init setup_IO_APIC_irqs(void) */ memset(&entry,0,sizeof(entry)); =20 - entry.delivery_mode =3D INT_DELIVERY_MODE; - entry.dest_mode =3D INT_DEST_MODE; + entry.delivery_mode =3D dest_Fixed; + entry.dest_mode =3D 0; entry.mask =3D 0; /* enable IRQ */ =20 idx =3D find_irq_entry(apic,pin,mp_INT); @@ -1150,10 +1150,10 @@ static void __init setup_ExtINT_IRQ0_pin(unsigned i= nt apic, unsigned int pin, in * We use logical delivery to get the timer IRQ * to the first CPU. */ - entry.dest_mode =3D INT_DEST_MODE; + entry.dest_mode =3D 0; entry.mask =3D 0; /* unmask IRQ now */ SET_DEST(entry, logical, cpu_mask_to_apicid(TARGET_CPUS)); - entry.delivery_mode =3D INT_DELIVERY_MODE; + entry.delivery_mode =3D dest_Fixed; entry.polarity =3D 0; entry.trigger =3D 0; entry.vector =3D vector; @@ -2338,8 +2338,8 @@ int io_apic_set_pci_routing (int ioapic, int pin, int= irq, int edge_level, int a =20 memset(&entry,0,sizeof(entry)); =20 - entry.delivery_mode =3D INT_DELIVERY_MODE; - entry.dest_mode =3D INT_DEST_MODE; + entry.delivery_mode =3D dest_Fixed; + entry.dest_mode =3D 0; entry.trigger =3D edge_level; entry.polarity =3D active_high_low; entry.mask =3D 1; @@ -2473,8 +2473,8 @@ int ioapic_guest_write(unsigned long physbase, unsign= ed int reg, u32 val) * The guest does not know physical APIC arrangement (flat vs. cluster= ). * Apply genapic conventions for this platform. */ - rte.delivery_mode =3D INT_DELIVERY_MODE; - rte.dest_mode =3D INT_DEST_MODE; + rte.delivery_mode =3D dest_Fixed; + rte.dest_mode =3D 0; =20 irq =3D apic_pin_2_gsi_irq(apic, pin); if ( irq < 0 ) diff --git a/xen/arch/x86/msi.c b/xen/arch/x86/msi.c index bf5b71822ea9..6c11d76015fb 100644 --- a/xen/arch/x86/msi.c +++ b/xen/arch/x86/msi.c @@ -174,18 +174,13 @@ void msi_compose_msg(unsigned vector, const cpumask_t= *cpu_mask, struct msi_msg =20 msg->address_hi =3D MSI_ADDR_BASE_HI; msg->address_lo =3D MSI_ADDR_BASE_LO | - (INT_DEST_MODE ? MSI_ADDR_DESTMODE_LOGIC - : MSI_ADDR_DESTMODE_PHYS) | - ((INT_DELIVERY_MODE !=3D dest_LowestPrio) - ? MSI_ADDR_REDIRECTION_CPU - : MSI_ADDR_REDIRECTION_LOWPRI) | + MSI_ADDR_DESTMODE_PHYS | + MSI_ADDR_REDIRECTION_CPU | MSI_ADDR_DEST_ID(msg->dest32); =20 msg->data =3D MSI_DATA_TRIGGER_EDGE | MSI_DATA_LEVEL_ASSERT | - ((INT_DELIVERY_MODE !=3D dest_LowestPrio) - ? MSI_DATA_DELIVERY_FIXED - : MSI_DATA_DELIVERY_LOWPRI) | + MSI_DATA_DELIVERY_FIXED | MSI_DATA_VECTOR(vector); } =20 --=20 2.48.1