From nobody Sun Nov 2 18:46:13 2025 Received: from mail-pj1-f74.google.com (mail-pj1-f74.google.com [209.85.216.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F1AF11ABEC5 for ; Thu, 27 Feb 2025 02:19:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.74 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740622748; cv=none; b=jE2A1zNo8rseQBfF1V1jkOnRn5DNKpNk8Uxup4/WBeySV9y6JcIzyn/bq5iCGX7T+cEA7Po2eJnOwk914++zt/c4hfEaxXWtUUlmmmnMXAxNvo0bHmaRF+w2DFmPqQzdza5dgyDfwSFbTYiBiLU1oyK5ueJdmEX0cLCLFTjgPTM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740622748; c=relaxed/simple; bh=YIm02xTVNm0eSDO98sEQL1tUrXbpItcdQ7Va1EiMjyI=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=DwxtEbd2vws+ayPNfscGegw4gwa6MaVwroSYcRL7DxT7d8wFAmU7sdJOcmfyrn7A65yRLTmnZsqT9bGW5jpqJIFH1JbUYpy/JiALZ33wEzvqH7yaywk9g83TnqUpk6/pX1AlI0Rtt2hhroMuEkqeeN2fWJ1+oYy3AtmUx8q9teA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=Zxx7mXR/; arc=none smtp.client-ip=209.85.216.74 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="Zxx7mXR/" Received: by mail-pj1-f74.google.com with SMTP id 98e67ed59e1d1-2fe9527c041so1100242a91.0 for ; Wed, 26 Feb 2025 18:19:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1740622746; x=1741227546; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=Dwfv1w4tsOCmi3NCgULhIMD4IZcsOFfau2ULDYaMRLg=; b=Zxx7mXR/tph5hMWT+eMpiZUfB7LGnjo3vm++s+G/pOqzIlPRSB21YJk9W9ItALFEsc LDGTNDirm9YWggc4IQQxPUP/RG8Z17EYC9PV+t2EWJDiHFXh50A0CoWUK3ESCZxHm9kc /oQV/J94l19TNCfKU7fpofF0vP2Pj58nrs+8c8tHYJx7y5LQw4jG20WBvQveWqTLrWcv nOOmiQt48iS/OG4IrYpYzkOgd8OL2zvZaj1Pq0inJDoH86KwywJZ4UmvkDBphA7QYDpk taIKCdFuviMzaNpm9JaXKFYWdr8I/6psRCnzM4jBRT1DropZT+srUYkuL54B81g+vn2t a4fw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740622746; x=1741227546; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=Dwfv1w4tsOCmi3NCgULhIMD4IZcsOFfau2ULDYaMRLg=; b=Xe3IZXkPBbkYUCuW4bIOTsgJXm1Mfyl8bSjYuUcz5Nq7lehm8Kj7JPk/RUvaTpbt8x 8NKhbpkJOHh3HLpgLsx0UEFu9t6Vq+EZPu/gx/Th2XoqjCx+UyJJQuWOxbxzwjMtLMKw 9c+yTJRqwrK3W0PpQv7fbsx8gyQu6yPXcyf0GbEtjfEunmEYOfvBjk7dBrjT4a9/DJxV HHs2fNlTEmaTTX8pdCM28zhkIhn1yxKFAs5MDdZlOGLRRAjGdYSIWWKp9LamIawNTf1o O1dmxLEKScRFNkN0OjW/017c0QqChCL+27M5DUQnkk7DBW89u96OHZrGJMwfQTXdCWf7 s9ZQ== X-Gm-Message-State: AOJu0YxAm2TgtC/4Xq18mg0aBnX4RNCTHawYBJZ1LM+KLzvz49g7iT4k pKftxXVit08sgfLVYoXXpBlgg3V+WeniBCrXUAIcAgdigimlvpRUAV45Igtkj8vhy7GCoNJzTAt baQ== X-Google-Smtp-Source: AGHT+IH6wZ/mGewjHTQw2W+siQpDLDG/G2QvagXg40e21ebxNRSjKEBR8DQxe4UjV6eqsE0kkd3QFpygjvI= X-Received: from pjbsn14.prod.google.com ([2002:a17:90b:2e8e:b0:2fc:15bf:92f6]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:90b:1d83:b0:2fc:3264:3666 with SMTP id 98e67ed59e1d1-2fce7b221c3mr36215820a91.30.1740622746375; Wed, 26 Feb 2025 18:19:06 -0800 (PST) Reply-To: Sean Christopherson Date: Wed, 26 Feb 2025 18:18:18 -0800 In-Reply-To: <20250227021855.3257188-1-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250227021855.3257188-1-seanjc@google.com> X-Mailer: git-send-email 2.48.1.711.g2feabab25a-goog Message-ID: <20250227021855.3257188-3-seanjc@google.com> Subject: [PATCH v2 02/38] x86/tsc: Add standalone helper for getting CPU frequency from CPUID From: Sean Christopherson To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "Kirill A. Shutemov" , Paolo Bonzini , Sean Christopherson , Juergen Gross , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Ajay Kaher , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Daniel Lezcano , John Stultz Cc: linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, virtualization@lists.linux.dev, linux-hyperv@vger.kernel.org, xen-devel@lists.xenproject.org, Tom Lendacky , Nikunj A Dadhania Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Extract the guts of cpu_khz_from_cpuid() to a standalone helper that doesn't restrict the usage to Intel CPUs. This will allow sharing the core logic with kvmclock, as (a) CPUID.0x16 may be enumerated alongside kvmclock, and (b) KVM generally doesn't restrict CPUID based on vendor. No functional change intended. Signed-off-by: Sean Christopherson --- arch/x86/include/asm/tsc.h | 1 + arch/x86/kernel/tsc.c | 37 +++++++++++++++++++++++-------------- 2 files changed, 24 insertions(+), 14 deletions(-) diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h index a4d84f721775..c3a14df46327 100644 --- a/arch/x86/include/asm/tsc.h +++ b/arch/x86/include/asm/tsc.h @@ -36,6 +36,7 @@ struct cpuid_tsc_info { }; extern int cpuid_get_tsc_info(struct cpuid_tsc_info *info); extern int cpuid_get_tsc_freq(struct cpuid_tsc_info *info); +extern int cpuid_get_cpu_freq(unsigned int *cpu_khz); =20 extern void tsc_early_init(void); extern void tsc_init(void); diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 93713eb81f52..bb4619148161 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -688,6 +688,24 @@ int cpuid_get_tsc_freq(struct cpuid_tsc_info *info) return 0; } =20 +int cpuid_get_cpu_freq(unsigned int *cpu_khz) +{ + unsigned int eax_base_mhz, ebx, ecx, edx; + + *cpu_khz =3D 0; + + if (boot_cpu_data.cpuid_level < CPUID_LEAF_FREQ) + return -ENOENT; + + cpuid(CPUID_LEAF_FREQ, &eax_base_mhz, &ebx, &ecx, &edx); + + if (!eax_base_mhz) + return -ENOENT; + + *cpu_khz =3D eax_base_mhz * 1000; + return 0; +} + /** * native_calibrate_tsc - determine TSC frequency * Determine TSC frequency via CPUID, else return 0. @@ -723,13 +741,8 @@ unsigned long native_calibrate_tsc(void) * clock, but we can easily calculate it to a high degree of accuracy * by considering the crystal ratio and the CPU speed. */ - if (!info.crystal_khz && boot_cpu_data.cpuid_level >=3D CPUID_LEAF_FREQ) { - unsigned int eax_base_mhz, ebx, ecx, edx; - - cpuid(CPUID_LEAF_FREQ, &eax_base_mhz, &ebx, &ecx, &edx); - info.crystal_khz =3D eax_base_mhz * 1000 * - info.denominator / info.numerator; - } + if (!info.crystal_khz && !cpuid_get_cpu_freq(&cpu_khz)) + info.crystal_khz =3D cpu_khz * info.denominator / info.numerator; =20 if (!info.crystal_khz) return 0; @@ -756,19 +769,15 @@ unsigned long native_calibrate_tsc(void) =20 static unsigned long cpu_khz_from_cpuid(void) { - unsigned int eax_base_mhz, ebx_max_mhz, ecx_bus_mhz, edx; + unsigned int cpu_khz; =20 if (boot_cpu_data.x86_vendor !=3D X86_VENDOR_INTEL) return 0; =20 - if (boot_cpu_data.cpuid_level < CPUID_LEAF_FREQ) + if (cpuid_get_cpu_freq(&cpu_khz)) return 0; =20 - eax_base_mhz =3D ebx_max_mhz =3D ecx_bus_mhz =3D edx =3D 0; - - cpuid(CPUID_LEAF_FREQ, &eax_base_mhz, &ebx_max_mhz, &ecx_bus_mhz, &edx); - - return eax_base_mhz * 1000; + return cpu_khz; } =20 /* --=20 2.48.1.711.g2feabab25a-goog