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Wed, 08 Jan 2025 06:30:34 -0800 (PST) From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , Jan Beulich , Andrew Cooper Subject: [PATCH v2 11/18] x86/pv: untie issuing FLUSH_ROOT_PGTBL from XPTI Date: Wed, 8 Jan 2025 15:26:51 +0100 Message-ID: <20250108142659.99490-12-roger.pau@citrix.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20250108142659.99490-1-roger.pau@citrix.com> References: <20250108142659.99490-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1736346667576116600 The current logic gates issuing flush TLB requests with the FLUSH_ROOT_PGTBL flag to XPTI being enabled. In preparation for FLUSH_ROOT_PGTBL also being needed when not using XPTI, untie it from the xpti domain boolean and instead introduce a new flush_roo= t_pt field. No functional change intended, as flush_root_pt =3D=3D xpti. Signed-off-by: Roger Pau Monn=C3=A9 --- xen/arch/x86/include/asm/domain.h | 2 ++ xen/arch/x86/include/asm/flushtlb.h | 2 +- xen/arch/x86/mm.c | 2 +- xen/arch/x86/pv/domain.c | 2 ++ 4 files changed, 6 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/d= omain.h index 7c143d2a6c46..5af414fa64ac 100644 --- a/xen/arch/x86/include/asm/domain.h +++ b/xen/arch/x86/include/asm/domain.h @@ -281,6 +281,8 @@ struct pv_domain bool pcid; /* Mitigate L1TF with shadow/crashing? */ bool check_l1tf; + /* Issue FLUSH_ROOT_PGTBL for root page-table changes. */ + bool flush_root_pt; =20 /* map_domain_page() mapping cache. */ struct mapcache_domain mapcache; diff --git a/xen/arch/x86/include/asm/flushtlb.h b/xen/arch/x86/include/asm= /flushtlb.h index bb0ad58db49b..1b98d03decdc 100644 --- a/xen/arch/x86/include/asm/flushtlb.h +++ b/xen/arch/x86/include/asm/flushtlb.h @@ -177,7 +177,7 @@ void flush_area_mask(const cpumask_t *mask, const void = *va, =20 #define flush_root_pgtbl_domain(d) \ { \ - if ( is_pv_domain(d) && (d)->arch.pv.xpti ) \ + if ( is_pv_domain(d) && (d)->arch.pv.flush_root_pt ) \ flush_mask((d)->dirty_cpumask, FLUSH_ROOT_PGTBL); \ } =20 diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index c321f5723b04..49403196d56e 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -4178,7 +4178,7 @@ long do_mmu_update( cmd =3D=3D MMU_PT_UPDATE_PRESERVE_AD= , v); if ( !rc ) flush_linear_pt =3D true; - if ( !rc && pt_owner->arch.pv.xpti ) + if ( !rc && pt_owner->arch.pv.flush_root_pt ) { bool local_in_use =3D false; =20 diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c index 534d2899100f..5bda168eadff 100644 --- a/xen/arch/x86/pv/domain.c +++ b/xen/arch/x86/pv/domain.c @@ -368,6 +368,8 @@ int pv_domain_initialise(struct domain *d) =20 d->arch.ctxt_switch =3D &pv_csw; =20 + d->arch.pv.flush_root_pt =3D d->arch.pv.xpti; + if ( !is_pv_32bit_domain(d) && use_invpcid && cpu_has_pcid ) switch ( ACCESS_ONCE(opt_pcid) ) { --=20 2.46.0