From nobody Thu Jan 30 18:47:48 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1 dmarc=pass fromdomain=amd.com); dmarc=pass(p=quarantine dis=none) header.from=amd.com ARC-Seal: i=2; a=rsa-sha256; t=1731932029; cv=pass; d=zohomail.com; s=zohoarc; b=iT6WetyjfNnzRAjuzeFkqxmwk2hpU9u0048oPqKPa73AYmX3W9ISFa+68ogL9iJBN4VYRvNqLZdlH1y6Jt95rTPOzyxsCbNFzLwA/R3Ve9hjY651meeXyh91GfML+3LED947fR50Z0SbDNf+6Ol5qNto72HIaAnPHOZuWH5A7Kw= ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1731932029; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=Pf5rKI3RCPGFn3GWmPsWPEZ7LwVUj9QdIKHlVuEvfDQ=; b=PbAmx0Y96p+IcgUsmbkVSKhmaiUH2wgTN//IgyqKa4pPnPnBKd8s8lP79HAPsupeFJuT+U1/I4OgDGwwDBBe0VNRtLamfV8g7550b+BRG1Xq4+jjsnqHB877f2AIvNBcCdNRtx4BoUDjRjWhWboS7uDbTAxQOXJx7M/+uWXjwwg= ARC-Authentication-Results: i=2; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1 dmarc=pass fromdomain=amd.com); dmarc=pass header.from= (p=quarantine dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1731932029742437.8520282756135; Mon, 18 Nov 2024 04:13:49 -0800 (PST) Received: from list by lists.xenproject.org with outflank-mailman.839317.1255135 (Exim 4.92) (envelope-from ) id 1tD0dJ-00078t-F9; Mon, 18 Nov 2024 12:13:33 +0000 Received: by outflank-mailman (output) from mailman id 839317.1255135; Mon, 18 Nov 2024 12:13:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tD0dJ-00078k-CY; Mon, 18 Nov 2024 12:13:33 +0000 Received: by outflank-mailman (input) for mailman id 839317; Mon, 18 Nov 2024 12:13:32 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tD0dH-0006nk-Up for xen-devel@lists.xenproject.org; Mon, 18 Nov 2024 12:13:31 +0000 Received: from NAM12-DM6-obe.outbound.protection.outlook.com (mail-dm6nam12on2062f.outbound.protection.outlook.com [2a01:111:f403:2417::62f]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 849eef51-a5a6-11ef-a0c8-8be0dac302b0; Mon, 18 Nov 2024 13:13:29 +0100 (CET) Received: from DS7PR03CA0053.namprd03.prod.outlook.com (2603:10b6:5:3b5::28) by CY8PR12MB7587.namprd12.prod.outlook.com (2603:10b6:930:9a::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8158.22; Mon, 18 Nov 2024 12:13:25 +0000 Received: from DS2PEPF00003447.namprd04.prod.outlook.com (2603:10b6:5:3b5:cafe::c5) by DS7PR03CA0053.outlook.office365.com (2603:10b6:5:3b5::28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8158.20 via Frontend Transport; Mon, 18 Nov 2024 12:13:25 +0000 Received: from SATLEXMB04.amd.com (165.204.84.12) by DS2PEPF00003447.mail.protection.outlook.com (10.167.17.74) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8158.14 via Frontend Transport; Mon, 18 Nov 2024 12:13:24 +0000 Received: from SATLEXMB03.amd.com (10.181.40.144) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Mon, 18 Nov 2024 06:13:23 -0600 Received: from xcbayankuma40.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2507.39 via Frontend Transport; Mon, 18 Nov 2024 06:13:22 -0600 X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 849eef51-a5a6-11ef-a0c8-8be0dac302b0 X-Custom-Connection: eyJyZW1vdGVpcCI6IjJhMDE6MTExOmY0MDM6MjQxNzo6NjJmIiwiaGVsbyI6Ik5BTTEyLURNNi1vYmUub3V0Ym91bmQucHJvdGVjdGlvbi5vdXRsb29rLmNvbSJ9 X-Custom-Transaction: eyJpZCI6Ijg0OWVlZjUxLWE1YTYtMTFlZi1hMGM4LThiZTBkYWMzMDJiMCIsInRzIjoxNzMxOTMyMDA5LjIzNDYzNiwic2VuZGVyIjoiYXlhbi5rdW1hci5oYWxkZXJAYW1kLmNvbSIsInJlY2lwaWVudCI6Inhlbi1kZXZlbEBsaXN0cy54ZW5wcm9qZWN0Lm9yZyJ9 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=HgIxYZ6oW2R1GmwX5wGwcEC2QZh+wm1f/tB/SQKUXBavUfmYLGh1WlfHQXnekzK9dHJdj23/E9BtNdHPzW0b4q9TF9YXH/xRf5OTEC/irkYvmIvbjt0GXcXDO66CjrHHSKgPXeedlqEMkfknewKwRCKipF9Mu3sngygtec3iXfL0eIMPwiZSHoTSeF0VzatHX5kktoZFCdNmcByO0iVm9cla4zN6vk9nHsjhsYQTX6bjJ3O56FqMp3wPeWpztgeR34bN28MXwMRHh3Am6kLyyPIYVEcNeEorSIFWwBYsmVofvack2xEpKC6u4KMJwF60Qm1G9TZ4UKs/nwB8YeD70g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=Pf5rKI3RCPGFn3GWmPsWPEZ7LwVUj9QdIKHlVuEvfDQ=; b=w4Dx2mclJNo77LhujtR/xrj6pikK3NtMMFm+0mEAMf+u6t3UuEroOYAtxUuGqbIfPk5SCU8iH553UJP+MIm1gaf6p599/I0wAG14+lXC1okzoatjByGk/6NOrNAspQz9Ysid4+ed5v3yhXFav4Z067EUSPcVs1nxxCYgw2Nmh5NnCWiITACAbah+0R1n/5+YMmN7WPBdFUxnlxTM7LaNSHPyke37FFVZLmveybQAOKnWhLkB0wXUCNDNyn7fncEf9w5oqppQ8C35wr2REPm1Kzd6S2VfGeEes/5dpepzWZmhB0JMAYye2mmzsA9yDVpK7sXIWdlm2sOotfB/nJ1EWQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=softfail (sender ip is 165.204.84.12) smtp.rcpttodomain=lists.xenproject.org smtp.mailfrom=amd.com; dmarc=fail (p=quarantine sp=quarantine pct=100) action=quarantine header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Pf5rKI3RCPGFn3GWmPsWPEZ7LwVUj9QdIKHlVuEvfDQ=; b=bGuwEd6N0+Fw1lt88r6XI2et6BuWcXmbbFLq1T9Ag6eMDa3UHWS/iuBaHgqG/FijLinVm4KC0RkZYPtQimg63ixlvEtvLv9wXXXXQup42cymtmNxT2hHi9/3xGyulJnMDbC0r1By5vIMwN6954Nh4LavAtEJZH7R8SkjG5ljbHE= X-MS-Exchange-Authentication-Results: spf=softfail (sender IP is 165.204.84.12) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=fail action=quarantine header.from=amd.com; Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Received-SPF: SoftFail (protection.outlook.com: domain of transitioning amd.com discourages use of 165.204.84.12 as permitted sender) From: Ayan Kumar Halder To: CC: Ayan Kumar Halder , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , "Volodymyr Babchuk" , Luca Fancellu , Julien Grall Subject: [PATCH v6 2/3] xen/arm: mpu: Enable MPU Date: Mon, 18 Nov 2024 12:12:49 +0000 Message-ID: <20241118121250.4027441-3-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241118121250.4027441-1-ayan.kumar.halder@amd.com> References: <20241118121250.4027441-1-ayan.kumar.halder@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: None (SATLEXMB04.amd.com: ayan.kumar.halder@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS2PEPF00003447:EE_|CY8PR12MB7587:EE_ X-MS-Office365-Filtering-Correlation-Id: b9b904da-e4f7-4005-4c43-08dd07ca66d2 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|36860700013|376014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?siOztfXVwhd2dAmEfNf19u0hWVCeQI0O3dB2g7a4pmdfKka5qPaYXj7m688V?= =?us-ascii?Q?+YlsSFuzHpnrrX4xfDrr8V+HGTle+o+CVHWeMJJ/a6BJvgUQ4fQE48uq78sA?= =?us-ascii?Q?ghdDtiyHK3KCXWkwFSAACLjwyR4VxXF70jgropeEfJD0r7CE20Hcch3NnNrI?= =?us-ascii?Q?XMCLEfx8M1c+1NpLPqqvoTaucdKBwq74ibhD/Xz1HTeq2UC++qQNRn/O2X++?= =?us-ascii?Q?fDM9Q5w8JElfG9tjQZmfY33XLNYN/Kh7ZwbbSmlID6gRajqRbeMH2PV17Lk7?= =?us-ascii?Q?o51jcAdXQMhUgh5weyeOtXW5j6GuCJ7prbgrTD+kFINvLUL9XzonPi5OLMIm?= =?us-ascii?Q?QtHCyMdLtt+kdV5pVvaoMKUumChrcGQClvrsk/zYnhl2T3da7PJMeut24xP1?= =?us-ascii?Q?XBGJAQPs79nQxonqPNR/v2ornwHNxDcvPdAsvsi87U8aONVV+fH0I0KCN1Dn?= =?us-ascii?Q?20UC7hmchOia6gj9O0XChKfgS2ijaRbJSYvYsE9798o9IbrruNuQ7nw6yWXu?= =?us-ascii?Q?YkRsFJuOLoCDsse9jZjBwP7Rxkcx6dPegxrzxFVzIdheRZIlgj4J6JIiwrRq?= =?us-ascii?Q?7vaSaI/glE41YjFBhAl3h7VTfyQqKtLdYpIg9eAUmXzjTsk61py9LOm45hNX?= =?us-ascii?Q?PvZ/un8Gvv3wQB6lIFh3qyYCE2PlzsmWMQemBWpl+F+UYXeZBpnwFW6uQcZw?= =?us-ascii?Q?IVbkg3c3S/x0qn9p5fpraXJfzOvK6gi4QbkqNn/PkjGEL21YihiAwSGW04Cq?= =?us-ascii?Q?HpWpM4fCNcTI7q1y+qE0YFWH7nOYLcpW1xgGrt11E1SRhvR46x3OGmmUsE7F?= =?us-ascii?Q?4G03II9KvVJZB9B+WvsOAiDh99lJ4kENCsL65WHhTSB0DgnW97bV2gH5xYv+?= =?us-ascii?Q?dZOaqHSHI3D2CXKxPUiM7ZM1Lq1zIL69+4PoP9VVmgCBn3TaLl9RweicIulz?= =?us-ascii?Q?dfOYgWsYg59upwjR/zA6hjIgO97TtACwEiIyyZ+GPl0pCBZox0wKgYFqzvhA?= =?us-ascii?Q?qQHH689DlbkHg31GBwsOjY6wfoDxgVcyBzVzN9S9dJRT+QYSeqA/zolDrH+I?= =?us-ascii?Q?/ZURPFZxiYb2rdRW0akHrcSWU1kO79HRxwnA9bA0CVAHx4GNplzG8gqHgDxo?= =?us-ascii?Q?zoFncrEJrMMrNta7X8BaC4U+mxczIBHq0cL5L2n1JX3PkUz/QKuL80GQwwvL?= =?us-ascii?Q?0nhTi84dn+InhrynS0LuN8K/1mFCVF5eGFV0sjNd0Q9xSyLZdLJMjdf5aXk3?= =?us-ascii?Q?9bz7tH40iAJUXGTiIex+ZbGZW9KZ4zuhzwe8g6sc2gBL9PaxObUodhcatbS0?= =?us-ascii?Q?GDHE9eI38zVPeVPw1YBg+A4pJSvAOIsH8UuzBS8DdMdVP3JwYzrmGS43PqFD?= =?us-ascii?Q?vvrtZXm8oXaRVpyuOOtZLHLVD+F3GbSVU1/W8lDHkOKVsqavBQ=3D=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.12;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:atlvpn-bp.amd.com;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(36860700013)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Nov 2024 12:13:24.5387 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b9b904da-e4f7-4005-4c43-08dd07ca66d2 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.12];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF00003447.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB7587 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1731932030675116600 Content-Type: text/plain; charset="utf-8" After the regions have been created, now we enable the MPU. For this we dis= able the background region so that the new memory map created for the regions ta= ke effect. Also, we treat all RW regions as non executable and the data cache = is enabled. Signed-off-by: Ayan Kumar Halder Reviewed-by: Luca Fancellu Acked-by: Julien Grall --- Changes from :- v2 - 1. Extracted from the previous patch into a new one. 2. Disabled background region. v3 - 1. Removed dsb before setting SCTLR_EL2. The reason being From ARM DDI 0487K.a D23-7349: "Direct writes to these registers (includes SCTLR_EL2) are not allowed to a= ffect any instructions appearing in program order before the direct write." So, we don't need a synchronization barrier before writing to SCTLR_EL2. Further, we do have synchronization barriers after writing the MPU region registers (which happens before we read SCTLR_EL2). So, SCTLR_EL2 is written after the MPU registers are synchronized. And, thus adding a 'isb' to flush= the instruction pipeline ensures that the subsequent instructions are fetched a= fter the MPU has been enabled. 2. Saved and restored lr in enable_boot_cpu_mm(). v4 - 1. Moved the definition of SCTLR_ELx_BR from sysregs.h from head.S. The reason being sysregs.h does not exist any longer (refer to previous patch f= or details) and SCTLR_ELx_BR is used in head.S only. (I have preserved the R-b abd A-b, let me know if that is ok). v5 - 1. No changes. xen/arch/arm/arm64/mpu/head.S | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/xen/arch/arm/arm64/mpu/head.S b/xen/arch/arm/arm64/mpu/head.S index 1ab65e8ebb..c56c693cc2 100644 --- a/xen/arch/arm/arm64/mpu/head.S +++ b/xen/arch/arm/arm64/mpu/head.S @@ -5,6 +5,9 @@ =20 #include =20 +/* Backgroud region enable/disable */ +#define SCTLR_ELx_BR BIT(17, UL) + #define REGION_TEXT_PRBAR 0x38 /* SH=3D11 AP=3D10 XN=3D00 */ #define REGION_RO_PRBAR 0x3A /* SH=3D11 AP=3D10 XN=3D10 */ #define REGION_DATA_PRBAR 0x32 /* SH=3D11 AP=3D00 XN=3D10 */ @@ -73,6 +76,29 @@ FUNC_LOCAL(fail_insufficient_regions) b 1b END(fail_insufficient_regions) =20 +/* + * Enable EL2 MPU and data cache + * If the Background region is enabled, then the MPU uses the default memo= ry + * map as the Background region for generating the memory + * attributes when MPU is disabled. + * Since the default memory map of the Armv8-R AArch64 architecture is + * IMPLEMENTATION DEFINED, we intend to turn off the Background region her= e. + * + * Clobbers x0 + * + */ +FUNC_LOCAL(enable_mpu) + mrs x0, SCTLR_EL2 + bic x0, x0, #SCTLR_ELx_BR /* Disable Background region */ + orr x0, x0, #SCTLR_Axx_ELx_M /* Enable MPU */ + orr x0, x0, #SCTLR_Axx_ELx_C /* Enable D-cache */ + orr x0, x0, #SCTLR_Axx_ELx_WXN /* Enable WXN */ + msr SCTLR_EL2, x0 + isb + + ret +END(enable_mpu) + /* * Maps the various sections of Xen (described in xen.lds.S) as different = MPU * regions. @@ -112,6 +138,7 @@ FUNC(enable_boot_cpu_mm) ldr x2, =3D__bss_end prepare_xen_region x0, x1, x2, x3, x4, x5 =20 + b enable_mpu ret END(enable_boot_cpu_mm) =20 --=20 2.25.1