From nobody Mon Nov 3 06:32:46 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=reject dis=none) header.from=citrix.com ARC-Seal: i=1; a=rsa-sha256; t=1731077004; cv=none; d=zohomail.com; s=zohoarc; b=DVJWOFd7U64VMKzelahvCofxgY4XK+7ua35mH14OYuuiXJiLfmI7Nxqyc6o+S53pvy0+2fqpaMBTQGjN19/0CKsyOq73f7HOZNMBm0hxPk/Hhvs00lwJbIAuYLkv7/treCAYc7sxEya34uS7LQsJaAcNuBCAWf9ibJNG1pJLuM8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1731077004; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=FzOnLS8oEDSa6W+7YLbE30LQXdw68icgkxCi29QgKBU=; b=CSRBz9/sFQYzJLTtwV80glxy95Bo4L7m9peaN1vd8NpFaKR5EDUU7pN4xYhZItVahzU25AXMVEK01tIQxpa575fcddV1lgS79e4aGqkN4lMyG7USwvSzk4T38AB3OiAanv2lM9TNPr9RCCaFeNEIARhKF+hUIZcNcJUHfcGO3gY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1731077004759300.69168357461433; Fri, 8 Nov 2024 06:43:24 -0800 (PST) Received: from list by lists.xenproject.org with outflank-mailman.832619.1247914 (Exim 4.92) (envelope-from ) id 1t9QCX-0004VQ-A0; Fri, 08 Nov 2024 14:43:05 +0000 Received: by outflank-mailman (output) from mailman id 832619.1247914; Fri, 08 Nov 2024 14:43:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1t9QCX-0004UL-4G; Fri, 08 Nov 2024 14:43:05 +0000 Received: by outflank-mailman (input) for mailman id 832619; Fri, 08 Nov 2024 14:43:03 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1t9QCV-0004Ek-5c for xen-devel@lists.xenproject.org; Fri, 08 Nov 2024 14:43:03 +0000 Received: from mail-ej1-x62e.google.com (mail-ej1-x62e.google.com [2a00:1450:4864:20::62e]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id beb32690-9ddf-11ef-99a3-01e77a169b0f; Fri, 08 Nov 2024 15:42:57 +0100 (CET) Received: by mail-ej1-x62e.google.com with SMTP id a640c23a62f3a-a9a0c7abaa6so257497566b.2 for ; Fri, 08 Nov 2024 06:42:57 -0800 (PST) Received: from andrewcoop.eng.citrite.net ([185.25.67.249]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a9ee0a1769asm242652866b.1.2024.11.08.06.42.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Nov 2024 06:42:55 -0800 (PST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: beb32690-9ddf-11ef-99a3-01e77a169b0f X-Custom-Connection: eyJyZW1vdGVpcCI6IjJhMDA6MTQ1MDo0ODY0OjIwOjo2MmUiLCJoZWxvIjoibWFpbC1lajEteDYyZS5nb29nbGUuY29tIn0= X-Custom-Transaction: eyJpZCI6ImJlYjMyNjkwLTlkZGYtMTFlZi05OWEzLTAxZTc3YTE2OWIwZiIsInRzIjoxNzMxMDc2OTc3LjY4ODMxOCwic2VuZGVyIjoiYW5kcmV3LmNvb3BlckBjbG91ZC5jb20iLCJyZWNpcGllbnQiOiJ4ZW4tZGV2ZWxAbGlzdHMueGVucHJvamVjdC5vcmcifQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1731076976; x=1731681776; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FzOnLS8oEDSa6W+7YLbE30LQXdw68icgkxCi29QgKBU=; b=dZYwQHfZ4OFiZE8ubGjLp6Lnbmv7vPDKzKYMlreL9qBWEmCsHZhDQr7OR0d/t2C6Bj USyy6jblzzLOwH/4qNeTSnbpyCNj8UM7JlYjtQRmsu2ZYMiYN9MyePGbDTUTtxid5hMy 9Uu7KxyRl9GnHKLVEIL3fJHBboMnW7QdjdKbU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731076976; x=1731681776; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FzOnLS8oEDSa6W+7YLbE30LQXdw68icgkxCi29QgKBU=; b=CmDepuanYpAU7Yg6RJL5FwVlJImvtdHJK6KCzY9ZJSloHIdezpRTACqw3eWr/YZf5i H+qUQYp7KpPEtHJ/4KMjVUegpexip+6FS+t03ouxmauGqju+O66Q7FAde5yi15JxN4IO A0KgtJwbDesIfSt9WgcQVYbPHZEoFy/6y1jpCD488w9sa1ac3xqTJQoqoJrnUjzETDKD 0lWivEkkYEsSkySegM4PamfR8dLlP5sv2nHu0/Ud6DIy0EXc4t13lD3/2MWHHUTk5xct kEuJnoB45kCt3KUEF/LD1HYUBwkx/jTxTS7hw76u2h8CWKYEvoKhMZjYPX+XzuG7U4Ud fPGA== X-Gm-Message-State: AOJu0YxiBHO0PnAShJk7dy1D5zJOKEeqNUL1MzE5+wxl2N1aCiWYVLs9 bYrKbr0fTnBEpW8M4odRK5Lr//nePljXP9D+C8hRWT9ubbFThBRhdxVbXU7jTuJOqsiS0Xcd0On q X-Google-Smtp-Source: AGHT+IEQ6sbZoLMaTddFbkrfA1iRfdl7IHL/JmblKm5yn3lEQSqpnR+YO+84Ndq0KeFDNh/gVny08w== X-Received: by 2002:a17:907:1c98:b0:a99:543e:94b4 with SMTP id a640c23a62f3a-a9ef001909amr264353766b.56.1731076976421; Fri, 08 Nov 2024 06:42:56 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH 1/3] x86/ucode: Rework Intel's microcode_update_match() Date: Fri, 8 Nov 2024 14:42:50 +0000 Message-Id: <20241108144252.315604-2-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20241108144252.315604-1-andrew.cooper3@citrix.com> References: <20241108144252.315604-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1731077006200116600 This function is overloaded, creating complexity; 3 of 4 callers already on= ly want it for it's "applicable to this CPU or not" answer, and handle revision calculations separately. Change it to be microcode_fits_cpu(), returning a simple boolean. Notably, this removes a path where cpu_request_microcode() inspects currently-loaded microcode revision, just to discard the answer. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 --- xen/arch/x86/cpu/microcode/intel.c | 26 +++++++++++--------------- 1 file changed, 11 insertions(+), 15 deletions(-) diff --git a/xen/arch/x86/cpu/microcode/intel.c b/xen/arch/x86/cpu/microcod= e/intel.c index aad6a693e800..3f37792ab4b5 100644 --- a/xen/arch/x86/cpu/microcode/intel.c +++ b/xen/arch/x86/cpu/microcode/intel.c @@ -248,9 +248,8 @@ static enum microcode_match_result compare_revisions( return OLD_UCODE; } =20 -/* Check an update against the CPU signature and current update revision */ -static enum microcode_match_result microcode_update_match( - const struct microcode_patch *mc) +/* Check whether this microcode patch is applicable for the current CPU. */ +static bool microcode_fits_cpu(const struct microcode_patch *mc) { const struct extended_sigtable *ext; unsigned int i; @@ -260,18 +259,15 @@ static enum microcode_match_result microcode_update_m= atch( =20 /* Check the main microcode signature. */ if ( signature_matches(cpu_sig, mc->sig, mc->pf) ) - goto found; + return true; =20 /* If there is an extended signature table, check each of them. */ if ( (ext =3D get_ext_sigtable(mc)) !=3D NULL ) for ( i =3D 0; i < ext->count; ++i ) if ( signature_matches(cpu_sig, ext->sigs[i].sig, ext->sigs[i]= .pf) ) - goto found; - - return MIS_UCODE; + return true; =20 - found: - return compare_revisions(cpu_sig->rev, mc->rev); + return false; } =20 static enum microcode_match_result cf_check compare_patch( @@ -281,8 +277,8 @@ static enum microcode_match_result cf_check compare_pat= ch( * Both patches to compare are supposed to be applicable to local CPU. * Just compare the revision number. */ - ASSERT(microcode_update_match(old) !=3D MIS_UCODE); - ASSERT(microcode_update_match(new) !=3D MIS_UCODE); + ASSERT(microcode_fits_cpu(old)); + ASSERT(microcode_fits_cpu(new)); =20 return compare_revisions(old->rev, new->rev); } @@ -297,11 +293,11 @@ static int cf_check apply_microcode(const struct micr= ocode_patch *patch, enum microcode_match_result result; bool ucode_force =3D flags & XENPF_UCODE_FORCE; =20 - result =3D microcode_update_match(patch); - - if ( result =3D=3D MIS_UCODE ) + if ( !microcode_fits_cpu(patch) ) return -EINVAL; =20 + result =3D compare_revisions(old_rev, patch->rev); + if ( !ucode_force && (result =3D=3D SAME_UCODE || result =3D=3D OLD_UC= ODE) ) return -EEXIST; =20 @@ -365,7 +361,7 @@ static struct microcode_patch *cf_check cpu_request_mic= rocode( * If the new update covers current CPU, compare updates and store= the * one with higher revision. */ - if ( (microcode_update_match(mc) !=3D MIS_UCODE) && + if ( microcode_fits_cpu(mc) && (!saved || compare_revisions(saved->rev, mc->rev) =3D=3D NEW_= UCODE) ) saved =3D mc; =20 --=20 2.39.5 From nobody Mon Nov 3 06:32:46 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=reject dis=none) header.from=citrix.com ARC-Seal: i=1; a=rsa-sha256; t=1731077009; cv=none; d=zohomail.com; s=zohoarc; b=RM88cCOTHomjlZu5uzNczP+eL1k3tc1u07UIFe1BbSBWJoqA1VA2NmAhhg7SPRWXHuWkosaSbqefdBRI0J7ehKL4KJ1q1oZh+d5Bw92LwD1UfPP7phzptq0rKo/Gja82ROqC7msCHhiXzQA2jHVb/j0RfaTnj7cWsP6v9ZN/dbA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1731077009; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=Rvx6e7hDDh9yfZyKvdLwUiSvDhDIqKekI/oIecuoc9s=; b=Qv5Ok97B1VyOSYjbsgfbn2T/6AoDoj5l6jiTvZFnQphNLTVuXx0RtA3rx7CtBZ7cL3zxy7H1ZKM9+Ly8eM/gJLOaFwqf6IyQ730IVPtZFfF1JMn8uqd3Q+xf0cc1SC800qVg7AS99lSBxbQ17nNe1O8HA/sRvXQZMua74ZC8gqw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1731077009794189.53658327351263; Fri, 8 Nov 2024 06:43:29 -0800 (PST) Received: from list by lists.xenproject.org with outflank-mailman.832618.1247908 (Exim 4.92) (envelope-from ) id 1t9QCX-0004TT-1j; Fri, 08 Nov 2024 14:43:05 +0000 Received: by outflank-mailman (output) from mailman id 832618.1247908; Fri, 08 Nov 2024 14:43:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1t9QCW-0004TM-Un; Fri, 08 Nov 2024 14:43:04 +0000 Received: by outflank-mailman (input) for mailman id 832618; Fri, 08 Nov 2024 14:43:03 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1t9QCU-0004Ee-VT for xen-devel@lists.xenproject.org; Fri, 08 Nov 2024 14:43:02 +0000 Received: from mail-ed1-x534.google.com (mail-ed1-x534.google.com [2a00:1450:4864:20::534]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id bfafcbe4-9ddf-11ef-a0c6-8be0dac302b0; Fri, 08 Nov 2024 15:42:59 +0100 (CET) Received: by mail-ed1-x534.google.com with SMTP id 4fb4d7f45d1cf-5c9c28c1ecbso2798355a12.0 for ; Fri, 08 Nov 2024 06:42:59 -0800 (PST) Received: from andrewcoop.eng.citrite.net ([185.25.67.249]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a9ee0a1769asm242652866b.1.2024.11.08.06.42.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Nov 2024 06:42:56 -0800 (PST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: bfafcbe4-9ddf-11ef-a0c6-8be0dac302b0 X-Custom-Connection: eyJyZW1vdGVpcCI6IjJhMDA6MTQ1MDo0ODY0OjIwOjo1MzQiLCJoZWxvIjoibWFpbC1lZDEteDUzNC5nb29nbGUuY29tIn0= X-Custom-Transaction: eyJpZCI6ImJmYWZjYmU0LTlkZGYtMTFlZi1hMGM2LThiZTBkYWMzMDJiMCIsInRzIjoxNzMxMDc2OTc5LjM1ODY2OCwic2VuZGVyIjoiYW5kcmV3LmNvb3BlckBjbG91ZC5jb20iLCJyZWNpcGllbnQiOiJ4ZW4tZGV2ZWxAbGlzdHMueGVucHJvamVjdC5vcmcifQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1731076978; x=1731681778; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Rvx6e7hDDh9yfZyKvdLwUiSvDhDIqKekI/oIecuoc9s=; b=l205x1p77vc/Cxpr+wZpBJLew2Hk2dTK2fwRinlrn+PcXuQ8fwT378DAH0YQEcn2Mo J5MkqZBfk2f4ApOWtYIBJ9wQKcmSqO3cuFjookg+5590Q0KtTQsDR88QYYfZlbGFGV+n dFd5Zmv8ENwLAGZ72L3KW2yVBlMKuMkxWseL0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731076978; x=1731681778; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Rvx6e7hDDh9yfZyKvdLwUiSvDhDIqKekI/oIecuoc9s=; b=FdGDcoqVttsOsZjKmDSiXscswDd4uj+9tPbXCiXqDRUNi181mHEbus82NtNNKZLSS4 7SsmQ9yqtY+gIgqY5e0T5Z/yqL29Etoeb8/Xmk/yqE39UnkhOBqCiPO2yCJ8LJzRqivJ 5HTOqS0OaPOL4GNhNGpDRkGXHVoD9YLF3fzKsdJyzDB+iz6wjKiIqXNF6/KSp0LDkMve 6v0he7HNoSDw14LSZ4vqKVc6e5Ll9v8nz5uF1Ca1D9r9N4HzrPMj+evPKr2WG/kvq2tt mWqEl1oKMvQTHhAb8zPq04DhJu/zA7xiSGjZbake+Wc9z/nnjoqxFqgSglDfPdTthRQB oUew== X-Gm-Message-State: AOJu0YxfNJGr5XHSknFQis4rfNsh2abwSpTdPx9REp6YdsfeLmXlPk77 ioyDw9wteySV7xUso1xl7uKocE3eGtkanXQZrd7jcHt1Ca+OrZCl4bUL1Qg/Tk1sC9GopitZHli v X-Google-Smtp-Source: AGHT+IHh0V7LDjgbTI/cZZA70SUOsc2LiajlysWqvUWIbghIxkfUHTGMhcMvw2D8NLjByq4xxdb2IA== X-Received: by 2002:a17:907:7f1f:b0:a99:f4be:7a6a with SMTP id a640c23a62f3a-a9eeffdc630mr299757066b.47.1731076977862; Fri, 08 Nov 2024 06:42:57 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH 2/3] x86/ucode: Rework AMD's microcode_fits() Date: Fri, 8 Nov 2024 14:42:51 +0000 Message-Id: <20241108144252.315604-3-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20241108144252.315604-1-andrew.cooper3@citrix.com> References: <20241108144252.315604-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1731077010248116600 This function is overloaded, creating complexity; 3 of 4 callers already on= ly want it for it's "applicable to this CPU or not" answer, and handle revision calculations separately. Change it to be microcode_fits_cpu(), returning a simple boolean. The checking of the equiv table can be simplified substantially too; A mapping will only be inserted if it's correct for the CPU, so any nonzero equiv.sig suffices to know that equiv.id is correct. Drop compare_header() too, which is simiarly overloaded, and use compare_revisions() directly. Notably, this removes a path where cpu_request_microcode() inspects currently-loaded microcode revision, just to discard the answer. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 --- xen/arch/x86/cpu/microcode/amd.c | 49 ++++++++++++++++---------------- 1 file changed, 24 insertions(+), 25 deletions(-) diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/= amd.c index c7a779c1d885..3861fec6565a 100644 --- a/xen/arch/x86/cpu/microcode/amd.c +++ b/xen/arch/x86/cpu/microcode/amd.c @@ -182,36 +182,31 @@ static enum microcode_match_result compare_revisions( return OLD_UCODE; } =20 -static enum microcode_match_result microcode_fits( - const struct microcode_patch *patch) -{ - unsigned int cpu =3D smp_processor_id(); - const struct cpu_signature *sig =3D &per_cpu(cpu_sig, cpu); - - if ( equiv.sig !=3D sig->sig || - equiv.id !=3D patch->processor_rev_id ) - return MIS_UCODE; - - return compare_revisions(sig->rev, patch->patch_id); -} - -static enum microcode_match_result compare_header( - const struct microcode_patch *new, const struct microcode_patch *old) +/* + * Check whether this microcode patch is applicable for the current CPU. + * + * AMD microcode blobs only have the "equivalent CPU identifier" which is = a 16 + * bit contraction of the 32 bit Family/Model/Stepping. + * + * We expect to only be run after scan_equiv_cpu_table() has found a valid + * mapping for the current CPU. If this is violated, the 0 in equiv.id wi= ll + * cause the patch to be rejected too. + */ +static bool microcode_fits_cpu(const struct microcode_patch *patch) { - if ( new->processor_rev_id !=3D old->processor_rev_id ) - return MIS_UCODE; + ASSERT(equiv.sig); =20 - return compare_revisions(old->patch_id, new->patch_id); + return equiv.id =3D=3D patch->processor_rev_id; } =20 static enum microcode_match_result cf_check compare_patch( const struct microcode_patch *new, const struct microcode_patch *old) { /* Both patches to compare are supposed to be applicable to local CPU.= */ - ASSERT(microcode_fits(new) !=3D MIS_UCODE); - ASSERT(microcode_fits(old) !=3D MIS_UCODE); + ASSERT(microcode_fits_cpu(new)); + ASSERT(microcode_fits_cpu(old)); =20 - return compare_header(new, old); + return compare_revisions(old->patch_id, new->patch_id); } =20 static int cf_check apply_microcode(const struct microcode_patch *patch, @@ -221,12 +216,14 @@ static int cf_check apply_microcode(const struct micr= ocode_patch *patch, unsigned int cpu =3D smp_processor_id(); struct cpu_signature *sig =3D &per_cpu(cpu_sig, cpu); uint32_t rev, old_rev =3D sig->rev; - enum microcode_match_result result =3D microcode_fits(patch); + enum microcode_match_result result; bool ucode_force =3D flags & XENPF_UCODE_FORCE; =20 - if ( result =3D=3D MIS_UCODE ) + if ( !microcode_fits_cpu(patch) ) return -EINVAL; =20 + result =3D compare_revisions(old_rev, patch->patch_id); + /* * Allow application of the same revision to pick up SMT-specific chan= ges * even if the revision of the other SMT thread is already up-to-date. @@ -396,8 +393,10 @@ static struct microcode_patch *cf_check cpu_request_mi= crocode( * If the new ucode covers current CPU, compare ucodes and sto= re the * one with higher revision. */ - if ( (microcode_fits(mc->patch) !=3D MIS_UCODE) && - (!saved || (compare_header(mc->patch, saved) =3D=3D NEW_U= CODE)) ) + if ( microcode_fits_cpu(mc->patch) && + (!saved || + compare_revisions(saved->patch_id, + mc->patch->patch_id) =3D=3D NEW_UCODE)= ) { saved =3D mc->patch; saved_size =3D mc->len; --=20 2.39.5 From nobody Mon Nov 3 06:32:46 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=reject dis=none) header.from=citrix.com ARC-Seal: i=1; a=rsa-sha256; t=1731077011; cv=none; d=zohomail.com; s=zohoarc; b=mS2Q1xR/shl+03sU924yW/b/4MbdlCfBT5zbOcmSQfkMw5hocW+jfbF/MlSm/EX8Tv+XIuNFklOu5WwTiKECoTNFfX5VKE9FvBCNOTcitQbIkH2UHG1qlx1ENzEJRk5cWFnA4pdVJ09om4JwY25sNljTWYVUWcRxq2Ri0A8jb44= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1731077011; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=eAYyhUk3NiNBRpvH7yor3qXtJxAbrlhbvjZAvpbioVA=; b=I79TOb+X1I8VlSBUoQrQSPTeBPLzu5mOhD/z/ZcR01dNgLwwq6i3CkCUfqgPBgOxxoCO4IjKBu5xoFj3XQmYou+awyMVzWRJwHhf8rzkt23UyifnpkQ9sdDQyOfoABscXBKy6K+6K34A5QhQs70sPtecrZ+XF0ijW5jO7AkqKKo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1731077011917331.8808099061931; Fri, 8 Nov 2024 06:43:31 -0800 (PST) Received: from list by lists.xenproject.org with outflank-mailman.832620.1247919 (Exim 4.92) (envelope-from ) id 1t9QCX-0004bK-Ii; Fri, 08 Nov 2024 14:43:05 +0000 Received: by outflank-mailman (output) from mailman id 832620.1247919; Fri, 08 Nov 2024 14:43:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1t9QCX-0004a3-DJ; Fri, 08 Nov 2024 14:43:05 +0000 Received: by outflank-mailman (input) for mailman id 832620; Fri, 08 Nov 2024 14:43:04 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1t9QCV-0004Ee-Vn for xen-devel@lists.xenproject.org; Fri, 08 Nov 2024 14:43:03 +0000 Received: from mail-lf1-x136.google.com (mail-lf1-x136.google.com [2a00:1450:4864:20::136]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c007c9dc-9ddf-11ef-a0c6-8be0dac302b0; Fri, 08 Nov 2024 15:42:59 +0100 (CET) Received: by mail-lf1-x136.google.com with SMTP id 2adb3069b0e04-539fb49c64aso3405888e87.0 for ; Fri, 08 Nov 2024 06:42:59 -0800 (PST) Received: from andrewcoop.eng.citrite.net ([185.25.67.249]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a9ee0a1769asm242652866b.1.2024.11.08.06.42.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Nov 2024 06:42:58 -0800 (PST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c007c9dc-9ddf-11ef-a0c6-8be0dac302b0 X-Custom-Connection: eyJyZW1vdGVpcCI6IjJhMDA6MTQ1MDo0ODY0OjIwOjoxMzYiLCJoZWxvIjoibWFpbC1sZjEteDEzNi5nb29nbGUuY29tIn0= X-Custom-Transaction: eyJpZCI6ImMwMDdjOWRjLTlkZGYtMTFlZi1hMGM2LThiZTBkYWMzMDJiMCIsInRzIjoxNzMxMDc2OTc5Ljc1MDI0Niwic2VuZGVyIjoiYW5kcmV3LmNvb3BlckBjbG91ZC5jb20iLCJyZWNpcGllbnQiOiJ4ZW4tZGV2ZWxAbGlzdHMueGVucHJvamVjdC5vcmcifQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1731076979; x=1731681779; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=eAYyhUk3NiNBRpvH7yor3qXtJxAbrlhbvjZAvpbioVA=; b=KJeSDo5Y5/WyGjExdFR8TK/i5F1QnzOQ30Ma6/Jc3ZKxzbZhBlHAviIUkAk9pGOJwr uUpOa7vtO4jk64wWN1j5bW+LKBN+odENUQIKlrqIncvCZFOOdVZ0OylVrMaZo42ljuax XVT8v3qvyf9VNHsT6pGUXl41FpQxEMBEyBjRE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1731076979; x=1731681779; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=eAYyhUk3NiNBRpvH7yor3qXtJxAbrlhbvjZAvpbioVA=; b=MJtMHVXgDHVX6RqT5p0ip55q86063DrKmJBOdCfYIJ5IhlE9d+t2ovlAJ9xESpdP+Z ciM7gKNd+R642LW0UTul2VTxw3s1iGQkIyMxZqWjywmHDzaTBQml+JyG7faI1YaavdFD gmkps2/gDPXxgycrnvu7qu5ZGw74JPOHVrH0qHWUdUX5TalvGibV8ITnUpW9UIx70TJn jrccd+pMS84auaX2d5WuwCpkdl7GUqJ06+bPMCKvEHiGP+I0i8B9A3gYX6PZTKMdA/EN 5kf8mDDFFY8uN5a7Vb3Fj458mM9jeY6GeW6c/4OdIjG0hMt8KiGR50aOaoCIlbRu52ol vitw== X-Gm-Message-State: AOJu0Yy+73gvmkBl9AG8LD94T2ogGs1irbSqQtoSUAYn/umlODu7VTA4 MaD8GGnxVlh0dfSQoia/lR4UFSL1TkTqzH6GUTuLtDTES2cYOVqDSYGFnE89/pDUOWbC7cr9TwK C X-Google-Smtp-Source: AGHT+IGnPqf8jybKj6TO83BLp1vxdYvmZx+c0I1+Ak4JN/eWFn0gbiR4NvaiWXKrze/JnFqBp02Irg== X-Received: by 2002:a05:6512:2348:b0:53b:1fd1:df34 with SMTP id 2adb3069b0e04-53d862ee36bmr2606893e87.45.1731076978612; Fri, 08 Nov 2024 06:42:58 -0800 (PST) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH 3/3] x86/ucode: Drop MIS_UCODE and microcode_match_result Date: Fri, 8 Nov 2024 14:42:52 +0000 Message-Id: <20241108144252.315604-4-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20241108144252.315604-1-andrew.cooper3@citrix.com> References: <20241108144252.315604-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1731077014502116600 All uses of MIS_UCODE, have been removed, leaving only a simple ordering relation, and microcode_match_result being a stale name. Drop the enum entirely, and use a simple int -1/0/1 scheme like other stand= ard ordering primitives in C. Swap the order or parameters to compare_patch(), to reduce cognitive complexity; all other logic operates the other way around. No functional change. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 I don't particular like keeping "result" as a variable name, but nothing better comes to mind. --- xen/arch/x86/cpu/microcode/amd.c | 10 ++++------ xen/arch/x86/cpu/microcode/core.c | 5 ++--- xen/arch/x86/cpu/microcode/intel.c | 9 ++++----- xen/arch/x86/cpu/microcode/private.h | 21 ++++++++++----------- 4 files changed, 20 insertions(+), 25 deletions(-) diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/= amd.c index 3861fec6565a..366c8c59e93a 100644 --- a/xen/arch/x86/cpu/microcode/amd.c +++ b/xen/arch/x86/cpu/microcode/amd.c @@ -170,8 +170,7 @@ static bool check_final_patch_levels(const struct cpu_s= ignature *sig) return false; } =20 -static enum microcode_match_result compare_revisions( - uint32_t old_rev, uint32_t new_rev) +static int compare_revisions(uint32_t old_rev, uint32_t new_rev) { if ( new_rev > old_rev ) return NEW_UCODE; @@ -199,8 +198,8 @@ static bool microcode_fits_cpu(const struct microcode_p= atch *patch) return equiv.id =3D=3D patch->processor_rev_id; } =20 -static enum microcode_match_result cf_check compare_patch( - const struct microcode_patch *new, const struct microcode_patch *old) +static int cf_check compare_patch( + const struct microcode_patch *old, const struct microcode_patch *new) { /* Both patches to compare are supposed to be applicable to local CPU.= */ ASSERT(microcode_fits_cpu(new)); @@ -212,11 +211,10 @@ static enum microcode_match_result cf_check compare_p= atch( static int cf_check apply_microcode(const struct microcode_patch *patch, unsigned int flags) { - int hw_err; + int hw_err, result; unsigned int cpu =3D smp_processor_id(); struct cpu_signature *sig =3D &per_cpu(cpu_sig, cpu); uint32_t rev, old_rev =3D sig->rev; - enum microcode_match_result result; bool ucode_force =3D flags & XENPF_UCODE_FORCE; =20 if ( !microcode_fits_cpu(patch) ) diff --git a/xen/arch/x86/cpu/microcode/core.c b/xen/arch/x86/cpu/microcode= /core.c index 0cc5daa251e2..05d0d68d8158 100644 --- a/xen/arch/x86/cpu/microcode/core.c +++ b/xen/arch/x86/cpu/microcode/core.c @@ -470,8 +470,7 @@ struct ucode_buf { static long cf_check microcode_update_helper(void *data) { struct microcode_patch *patch =3D NULL; - enum microcode_match_result result; - int ret; + int ret, result; struct ucode_buf *buffer =3D data; unsigned int cpu, updated; struct patch_with_flags patch_with_flags; @@ -527,7 +526,7 @@ static long cf_check microcode_update_helper(void *data) spin_lock(µcode_mutex); if ( microcode_cache ) { - result =3D alternative_call(ucode_ops.compare_patch, patch, microc= ode_cache); + result =3D alternative_call(ucode_ops.compare_patch, microcode_cac= he, patch); =20 if ( result !=3D NEW_UCODE && !(ucode_force && (result =3D=3D OLD_UCODE || result =3D=3D SA= ME_UCODE)) ) diff --git a/xen/arch/x86/cpu/microcode/intel.c b/xen/arch/x86/cpu/microcod= e/intel.c index 3f37792ab4b5..9616a5e9db4b 100644 --- a/xen/arch/x86/cpu/microcode/intel.c +++ b/xen/arch/x86/cpu/microcode/intel.c @@ -229,8 +229,7 @@ static int microcode_sanity_check(const struct microcod= e_patch *patch) * Production microcode has a positive revision. Pre-production microcode= has * a negative revision. */ -static enum microcode_match_result compare_revisions( - int32_t old_rev, int32_t new_rev) +static int compare_revisions(int32_t old_rev, int32_t new_rev) { if ( new_rev > old_rev ) return NEW_UCODE; @@ -270,8 +269,8 @@ static bool microcode_fits_cpu(const struct microcode_p= atch *mc) return false; } =20 -static enum microcode_match_result cf_check compare_patch( - const struct microcode_patch *new, const struct microcode_patch *old) +static int cf_check compare_patch( + const struct microcode_patch *old, const struct microcode_patch *new) { /* * Both patches to compare are supposed to be applicable to local CPU. @@ -290,7 +289,7 @@ static int cf_check apply_microcode(const struct microc= ode_patch *patch, unsigned int cpu =3D smp_processor_id(); struct cpu_signature *sig =3D &this_cpu(cpu_sig); uint32_t rev, old_rev =3D sig->rev; - enum microcode_match_result result; + int result; bool ucode_force =3D flags & XENPF_UCODE_FORCE; =20 if ( !microcode_fits_cpu(patch) ) diff --git a/xen/arch/x86/cpu/microcode/private.h b/xen/arch/x86/cpu/microc= ode/private.h index c9dd8ba066f9..957d4d4293d0 100644 --- a/xen/arch/x86/cpu/microcode/private.h +++ b/xen/arch/x86/cpu/microcode/private.h @@ -5,13 +5,6 @@ =20 #include =20 -enum microcode_match_result { - OLD_UCODE, /* signature matched, but revision id is older */ - SAME_UCODE, /* signature matched, but revision id is the same */ - NEW_UCODE, /* signature matched, but revision id is newer */ - MIS_UCODE, /* signature mismatched */ -}; - /* Opaque. Internals are vendor-specific. */ struct microcode_patch; =20 @@ -54,11 +47,17 @@ struct microcode_ops { unsigned int flags); =20 /* - * Given two patches, are they both applicable to the current CPU, and= is - * new a higher revision than old? + * Given a current patch, and a proposed new patch, order them based o= n revision. + * + * This operation is not necessarily symmetrical. In some cases, a de= bug + * "new" patch will always considered to be newer, on the expectation = that + * whomever is using debug patches knows exactly what they're doing. */ - enum microcode_match_result (*compare_patch)( - const struct microcode_patch *new, const struct microcode_patch *o= ld); +#define OLD_UCODE -1 +#define SAME_UCODE 0 +#define NEW_UCODE 1 + int (*compare_patch)(const struct microcode_patch *old, + const struct microcode_patch *new); =20 /* * For Linux inird microcode compatibliity. --=20 2.39.5