From nobody Wed Dec 4 18:52:13 2024 Received: from szxga04-in.huawei.com (szxga04-in.huawei.com [45.249.212.190]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9ADF61F8F08 for ; Fri, 25 Oct 2024 10:08:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.249.212.190 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729850929; cv=none; b=XXynemGqk3EzNX5NbMwlAlY2Z97kIU7K13LtZQoA1ND1ZfyeVJTlx1M15m8B0+PIH04dwJeevdl4zQG3TLi9pK3kgNUeZZufaPvr4afASkpEhsCMAcOT/rlAAiDCFDa6kwk5TFAHo/fmUFyDx+mIsvIR8foEYKjlgYQjbxcyqMk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729850929; c=relaxed/simple; bh=9kqHcB+7k53qLeynfgYZAgp7xh2N7UyG6JIxMziXokc=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=BYJalRdAL5RlMAvX0HkvWgTd2o0uhhkutinCI1g3Sgry7404jxbFPrA/ongisFZDsakDLefY6EFzBImHSx39valZJHQK0xHQGNbtKYU9RxX7Ajn6Py9oSo+48/SowwYxKWyALuQ+oXchEziL6MuXVgIpE7nOcy6G5TwkXjqt83o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; arc=none smtp.client-ip=45.249.212.190 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Received: from mail.maildlp.com (unknown [172.19.163.17]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4XZdkr6FBHz20qdN; Fri, 25 Oct 2024 18:07:48 +0800 (CST) Received: from kwepemg200008.china.huawei.com (unknown [7.202.181.35]) by mail.maildlp.com (Postfix) with ESMTPS id B7E6D1A0188; Fri, 25 Oct 2024 18:08:42 +0800 (CST) Received: from huawei.com (10.90.53.73) by kwepemg200008.china.huawei.com (7.202.181.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Fri, 25 Oct 2024 18:08:41 +0800 From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH -next v4 07/19] arm64: entry: Call arm64_preempt_schedule_irq() only if irqs enabled Date: Fri, 25 Oct 2024 18:06:48 +0800 Message-ID: <20241025100700.3714552-8-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241025100700.3714552-1-ruanjinjie@huawei.com> References: <20241025100700.3714552-1-ruanjinjie@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: dggems701-chm.china.huawei.com (10.3.19.178) To kwepemg200008.china.huawei.com (7.202.181.35) Content-Type: text/plain; charset="utf-8" Only if irqs are enabled when the interrupt trapped, there may be a chance to reschedule after the interrupt has been handled, so move arm64_preempt_schedule_irq() into regs_irqs_disabled() check false if block. As Mark pointed out, this change will have the following key impact: "We will not preempt when taking interrupts from a region of kernel code where IRQs are enabled but RCU is not watching, matching the behaviour of the generic entry code. This has the potential to introduce livelock if we can ever have a screaming interrupt in such a region, so we'll need to go figure out whether that's actually a problem. Having this as a separate patch will make it easier to test/bisect for that specifically." Suggested-by: Mark Rutland Signed-off-by: Jinjie Ruan --- arch/arm64/kernel/entry-common.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-com= mon.c index e0380812d71e..b57f6dc66115 100644 --- a/arch/arm64/kernel/entry-common.c +++ b/arch/arm64/kernel/entry-common.c @@ -114,8 +114,6 @@ static void __sched arm64_preempt_schedule_irq(void) static void noinstr exit_to_kernel_mode(struct pt_regs *regs, irqentry_state_t state) { - arm64_preempt_schedule_irq(); - mte_check_tfsr_exit(); =20 lockdep_assert_irqs_disabled(); @@ -129,6 +127,8 @@ static void noinstr exit_to_kernel_mode(struct pt_regs = *regs, return; } =20 + arm64_preempt_schedule_irq(); + trace_hardirqs_on(); } else { if (state.exit_rcu) --=20 2.34.1