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Wed, 02 Oct 2024 08:27:38 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v2 4/7] x86/alternative: Indent the relocation logic Date: Wed, 2 Oct 2024 16:27:22 +0100 Message-Id: <20241002152725.1841575-5-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20241002152725.1841575-1-andrew.cooper3@citrix.com> References: <20241002152725.1841575-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1727882884757116600 ... to make subsequent patches legible. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 --- xen/arch/x86/alternative.c | 124 +++++++++++++++++++------------------ 1 file changed, 63 insertions(+), 61 deletions(-) diff --git a/xen/arch/x86/alternative.c b/xen/arch/x86/alternative.c index 2dc759abd858..5ea7f51b007c 100644 --- a/xen/arch/x86/alternative.c +++ b/xen/arch/x86/alternative.c @@ -264,78 +264,80 @@ static int init_or_livepatch _apply_alternatives(stru= ct alt_instr *start, =20 memcpy(buf, repl, a->repl_len); =20 - /* 0xe8/0xe9 are relative branches; fix the offset. */ - if ( a->repl_len >=3D 5 && (*buf & 0xfe) =3D=3D 0xe8 ) { - /* - * Detect the special case of indirect-to-direct branch patchi= ng: - * - replacement is a direct CALL/JMP (opcodes 0xE8/0xE9; alre= ady - * checked above), - * - replacement's displacement is -5 (pointing back at the ve= ry - * insn, which makes no sense in a real replacement insn), - * - original is an indirect CALL/JMP (opcodes 0xFF/2 or 0xFF/= 4) - * using RIP-relative addressing. - * Some branch destinations may still be NULL when we come here - * the first time. Defer patching of those until the post-pres= mp- - * initcalls re-invocation (with force set to true). If at that - * point the branch destination is still NULL, insert "UD2; UD= 0" - * (for ease of recognition) instead of CALL/JMP. - */ - if ( a->cpuid =3D=3D X86_FEATURE_ALWAYS && - *(int32_t *)(buf + 1) =3D=3D -5 && - a->orig_len >=3D 6 && - orig[0] =3D=3D 0xff && - orig[1] =3D=3D (*buf & 1 ? 0x25 : 0x15) ) + /* 0xe8/0xe9 are relative branches; fix the offset. */ + if ( a->repl_len >=3D 5 && (*buf & 0xfe) =3D=3D 0xe8 ) { - long disp =3D *(int32_t *)(orig + 2); - const uint8_t *dest =3D *(void **)(orig + 6 + disp); - - if ( dest ) + /* + * Detect the special case of indirect-to-direct branch pa= tching: + * - replacement is a direct CALL/JMP (opcodes 0xE8/0xE9; = already + * checked above), + * - replacement's displacement is -5 (pointing back at th= e very + * insn, which makes no sense in a real replacement insn= ), + * - original is an indirect CALL/JMP (opcodes 0xFF/2 or 0= xFF/4) + * using RIP-relative addressing. + * Some branch destinations may still be NULL when we come= here + * the first time. Defer patching of those until the post-= presmp- + * initcalls re-invocation (with force set to true). If at= that + * point the branch destination is still NULL, insert "UD2= ; UD0" + * (for ease of recognition) instead of CALL/JMP. + */ + if ( a->cpuid =3D=3D X86_FEATURE_ALWAYS && + *(int32_t *)(buf + 1) =3D=3D -5 && + a->orig_len >=3D 6 && + orig[0] =3D=3D 0xff && + orig[1] =3D=3D (*buf & 1 ? 0x25 : 0x15) ) { - /* - * When building for CET-IBT, all function pointer tar= gets - * should have an endbr64 instruction. - * - * If this is not the case, leave a warning because - * something is probably wrong with the build. A CET-= IBT - * enabled system might have exploded already. - * - * Otherwise, skip the endbr64 instruction. This is a - * marginal perf improvement which saves on instruction - * decode bandwidth. - */ - if ( IS_ENABLED(CONFIG_XEN_IBT) ) + long disp =3D *(int32_t *)(orig + 2); + const uint8_t *dest =3D *(void **)(orig + 6 + disp); + + if ( dest ) { - if ( is_endbr64(dest) ) - dest +=3D ENDBR64_LEN; - else - printk(XENLOG_WARNING - "altcall %ps dest %ps has no endbr64\n", - orig, dest); + /* + * When building for CET-IBT, all function pointer= targets + * should have an endbr64 instruction. + * + * If this is not the case, leave a warning because + * something is probably wrong with the build. A = CET-IBT + * enabled system might have exploded already. + * + * Otherwise, skip the endbr64 instruction. This = is a + * marginal perf improvement which saves on instru= ction + * decode bandwidth. + */ + if ( IS_ENABLED(CONFIG_XEN_IBT) ) + { + if ( is_endbr64(dest) ) + dest +=3D ENDBR64_LEN; + else + printk(XENLOG_WARNING + "altcall %ps dest %ps has no endbr6= 4\n", + orig, dest); + } + + disp =3D dest - (orig + 5); + ASSERT(disp =3D=3D (int32_t)disp); + *(int32_t *)(buf + 1) =3D disp; } - - disp =3D dest - (orig + 5); - ASSERT(disp =3D=3D (int32_t)disp); - *(int32_t *)(buf + 1) =3D disp; - } - else if ( force ) - { - buf[0] =3D 0x0f; - buf[1] =3D 0x0b; - buf[2] =3D 0x0f; - buf[3] =3D 0xff; - buf[4] =3D 0xff; + else if ( force ) + { + buf[0] =3D 0x0f; + buf[1] =3D 0x0b; + buf[2] =3D 0x0f; + buf[3] =3D 0xff; + buf[4] =3D 0xff; + } + else + continue; } + else if ( force && system_state < SYS_STATE_active ) + ASSERT_UNREACHABLE(); else - continue; + *(int32_t *)(buf + 1) +=3D repl - orig; } else if ( force && system_state < SYS_STATE_active ) ASSERT_UNREACHABLE(); - else - *(int32_t *)(buf + 1) +=3D repl - orig; } - else if ( force && system_state < SYS_STATE_active ) - ASSERT_UNREACHABLE(); =20 a->priv =3D 1; =20 --=20 2.39.5