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Tue, 3 Sep 2024 03:26:16 -0400 (EDT) (envelope-from sakib@darkstar.site) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: cfad377f-69c5-11ef-a0b2-8be0dac302b0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed; d=pobox.com; h=from:to:cc :subject:date:message-id:mime-version:content-transfer-encoding; s=sasl; bh=h5N0iXa3hJfHnwvrylkrQh0a0aEXV3QI2OpAYy71Hs0=; b=JOMs H75W+XlXtvZ5OqtNhIqNUpf57gso+6nw0FkwcI9JPouuavC1OOYQD99npi+WbNW0 J/slrd4cFVHVQZHrLMCxEk3Y8bD+Qn+zNUm4A4rKEJAt/9trPRlZKWiCSiexeIf7 lfrdo7qYVu6JWjqr6CZiiCtDqatXGYeMJp8JiJo= From: Sergiy Kibrik To: xen-devel@lists.xenproject.org Cc: Sergiy Kibrik , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Jan Beulich , Andrew Cooper Subject: [XEN PATCH v4] x86/intel: optional build of PSR support Date: Tue, 3 Sep 2024 10:26:14 +0300 Message-Id: <20240903072614.291048-1-Sergiy_Kibrik@epam.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Pobox-Relay-ID: CEAFD4E6-69C5-11EF-8B18-9B0F950A682E-90055647!pb-smtp2.pobox.com Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @pobox.com) X-ZM-MESSAGEID: 1725348425686116600 Content-Type: text/plain; charset="utf-8" Platform Shared Resource feature is available for certain Intel's CPUs only, Xen's implementation of PSR only supports Intel CPUs right now, hence it ca= n be made dependant on CONFIG_INTEL build option. Since platform implementation is not limited to single vendor, intermediate option CONFIG_PSR introduced, which selected by CONFIG_INTEL. When !PSR then PSR-related sysctls XEN_SYSCTL_psr_cmt_op & XEN_SYSCTL_psr_alloc are off as well. Signed-off-by: Sergiy Kibrik CC: Jan Beulich CC: Andrew Cooper --- v3 patch here: https://lore.kernel.org/xen-devel/20240829090559.149249-1-Sergiy_Kibrik@epa= m.com/ changes in v4: - introduced CONFIG_PSR - changed description - changes to psr stubs changes in v3: - drop stubs for psr_domain_{init,free} & psr_ctxt_switch_to() and guard t= hese routines at call sites - add stub for psr_cmt_enabled() - drop some of #ifdef-s from arch_do_{domctl,sysctl} --- xen/arch/x86/Kconfig | 3 +++ xen/arch/x86/Kconfig.cpu | 1 + xen/arch/x86/Makefile | 2 +- xen/arch/x86/domctl.c | 3 +++ xen/arch/x86/include/asm/psr.h | 10 ++++++++-- xen/arch/x86/sysctl.c | 4 +++- 6 files changed, 19 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/Kconfig b/xen/arch/x86/Kconfig index 7ef5c8bc48..1fcb7b3a26 100644 --- a/xen/arch/x86/Kconfig +++ b/xen/arch/x86/Kconfig @@ -284,6 +284,9 @@ endchoice config GUEST bool =20 +config PSR + bool + config XEN_GUEST bool "Xen Guest" select GUEST diff --git a/xen/arch/x86/Kconfig.cpu b/xen/arch/x86/Kconfig.cpu index 5fb18db1aa..7c649a478b 100644 --- a/xen/arch/x86/Kconfig.cpu +++ b/xen/arch/x86/Kconfig.cpu @@ -13,6 +13,7 @@ config AMD config INTEL bool "Support Intel CPUs" default y + select PSR help Detection, tunings and quirks for Intel platforms. =20 diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index 286c003ec3..4db3c214b0 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -57,7 +57,7 @@ obj-y +=3D pci.o obj-y +=3D percpu.o obj-y +=3D physdev.o obj-$(CONFIG_COMPAT) +=3D x86_64/physdev.o -obj-y +=3D psr.o +obj-$(CONFIG_PSR) +=3D psr.o obj-y +=3D setup.o obj-y +=3D shutdown.o obj-y +=3D smp.o diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 68b5b46d1a..182f5fb11b 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -1195,6 +1195,7 @@ long arch_do_domctl( case XEN_DOMCTL_psr_alloc: switch ( domctl->u.psr_alloc.cmd ) { +#ifdef CONFIG_PSR case XEN_DOMCTL_PSR_SET_L3_CBM: ret =3D psr_set_val(d, domctl->u.psr_alloc.target, domctl->u.psr_alloc.data, @@ -1257,6 +1258,8 @@ long arch_do_domctl( =20 #undef domctl_psr_get_val =20 +#endif /* CONFIG_PSR */ + default: ret =3D -EOPNOTSUPP; break; diff --git a/xen/arch/x86/include/asm/psr.h b/xen/arch/x86/include/asm/psr.h index 51df78794c..7fa51f0cb3 100644 --- a/xen/arch/x86/include/asm/psr.h +++ b/xen/arch/x86/include/asm/psr.h @@ -69,12 +69,11 @@ extern struct psr_cmt *psr_cmt; =20 static inline bool psr_cmt_enabled(void) { - return !!psr_cmt; + return IS_ENABLED(CONFIG_PSR) ? !!psr_cmt : false; } =20 int psr_alloc_rmid(struct domain *d); void psr_free_rmid(struct domain *d); -void psr_ctxt_switch_to(struct domain *d); =20 int psr_get_info(unsigned int socket, enum psr_type type, uint32_t data[], unsigned int array_len); @@ -83,8 +82,15 @@ int psr_get_val(struct domain *d, unsigned int socket, int psr_set_val(struct domain *d, unsigned int socket, uint64_t new_val, enum psr_type type); =20 +#ifdef CONFIG_PSR +void psr_ctxt_switch_to(struct domain *d); void psr_domain_init(struct domain *d); void psr_domain_free(struct domain *d); +#else +static inline void psr_ctxt_switch_to(struct domain *d) {} +static inline void psr_domain_init(struct domain *d) {} +static inline void psr_domain_free(struct domain *d) {} +#endif =20 #endif /* __ASM_PSR_H__ */ =20 diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index 1d40d82c5a..fedb533ce5 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -225,10 +225,11 @@ long arch_do_sysctl( =20 case XEN_SYSCTL_psr_alloc: { - uint32_t data[PSR_INFO_ARRAY_SIZE] =3D { }; + uint32_t __maybe_unused data[PSR_INFO_ARRAY_SIZE] =3D { }; =20 switch ( sysctl->u.psr_alloc.cmd ) { +#ifdef CONFIG_PSR case XEN_SYSCTL_PSR_get_l3_info: ret =3D psr_get_info(sysctl->u.psr_alloc.target, PSR_TYPE_L3_CBM, data, ARRAY_SIZE(data)); @@ -279,6 +280,7 @@ long arch_do_sysctl( if ( __copy_field_to_guest(u_sysctl, sysctl, u.psr_alloc) ) ret =3D -EFAULT; break; +#endif /* CONFIG_PSR */ =20 default: ret =3D -EOPNOTSUPP; --=20 2.25.1