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Wed, 28 Aug 2024 15:03:56 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Oleksii Kurochko , Shawn Anastasio Subject: [PATCH v2 01/11] xen/compiler: Rename __attribute_const__ to attr_const Date: Wed, 28 Aug 2024 23:03:41 +0100 Message-Id: <20240828220351.2686408-2-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240828220351.2686408-1-andrew.cooper3@citrix.com> References: <20240828220351.2686408-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1724882667533116600 There's no need for the name to be so verbose. No functional change. Suggest-by: Jan Beulich Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Oleksii Kurochko CC: Shawn Anastasio v2: * New --- tools/libs/guest/xg_dom_decompress_unsafe_zstd.c | 2 +- xen/arch/arm/include/asm/arm64/cpufeature.h | 12 ++++++------ xen/arch/x86/include/asm/byteorder.h | 4 ++-- xen/arch/x86/include/asm/endbr.h | 4 ++-- xen/include/xen/byteorder/swab.h | 6 +++--- xen/include/xen/compiler.h | 2 +- 6 files changed, 15 insertions(+), 15 deletions(-) diff --git a/tools/libs/guest/xg_dom_decompress_unsafe_zstd.c b/tools/libs/= guest/xg_dom_decompress_unsafe_zstd.c index 7cd266444bb1..ff45732a3616 100644 --- a/tools/libs/guest/xg_dom_decompress_unsafe_zstd.c +++ b/tools/libs/guest/xg_dom_decompress_unsafe_zstd.c @@ -22,7 +22,7 @@ typedef uint16_t __be16; typedef uint32_t __be32; typedef uint64_t __be64; =20 -#define __attribute_const__ +#define attr_const #define __force #define always_inline #define noinline diff --git a/xen/arch/arm/include/asm/arm64/cpufeature.h b/xen/arch/arm/inc= lude/asm/arm64/cpufeature.h index d9b9fa77cbd2..1bb503e857e9 100644 --- a/xen/arch/arm/include/asm/arm64/cpufeature.h +++ b/xen/arch/arm/include/asm/arm64/cpufeature.h @@ -44,25 +44,25 @@ struct arm64_ftr_bits { s64 safe_val; /* safe value for FTR_EXACT features */ }; =20 -static inline int __attribute_const__ +static inline int attr_const cpuid_feature_extract_signed_field_width(u64 features, int field, int widt= h) { return (s64)(features << (64 - width - field)) >> (64 - width); } =20 -static inline int __attribute_const__ +static inline int attr_const cpuid_feature_extract_signed_field(u64 features, int field) { return cpuid_feature_extract_signed_field_width(features, field, 4); } =20 -static inline unsigned int __attribute_const__ +static inline unsigned int attr_const cpuid_feature_extract_unsigned_field_width(u64 features, int field, int wi= dth) { return (u64)(features << (64 - width - field)) >> (64 - width); } =20 -static inline unsigned int __attribute_const__ +static inline unsigned int attr_const cpuid_feature_extract_unsigned_field(u64 features, int field) { return cpuid_feature_extract_unsigned_field_width(features, field, 4); @@ -73,7 +73,7 @@ static inline u64 arm64_ftr_mask(const struct arm64_ftr_b= its *ftrp) return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift); } =20 -static inline int __attribute_const__ +static inline int attr_const cpuid_feature_extract_field_width(u64 features, int field, int width, bool= sign) { return (sign) ? @@ -81,7 +81,7 @@ cpuid_feature_extract_field_width(u64 features, int field= , int width, bool sign) cpuid_feature_extract_unsigned_field_width(features, field, width); } =20 -static inline int __attribute_const__ +static inline int attr_const cpuid_feature_extract_field(u64 features, int field, bool sign) { return cpuid_feature_extract_field_width(features, field, 4, sign); diff --git a/xen/arch/x86/include/asm/byteorder.h b/xen/arch/x86/include/as= m/byteorder.h index e935f7b2b03b..a877c07f6796 100644 --- a/xen/arch/x86/include/asm/byteorder.h +++ b/xen/arch/x86/include/asm/byteorder.h @@ -4,13 +4,13 @@ #include #include =20 -static inline __attribute_const__ __u32 ___arch__swab32(__u32 x) +static inline attr_const __u32 ___arch__swab32(__u32 x) { asm("bswap %0" : "=3Dr" (x) : "0" (x)); return x; } =20 -static inline __attribute_const__ __u64 ___arch__swab64(__u64 val) +static inline attr_const __u64 ___arch__swab64(__u64 val) {=20 union {=20 struct { __u32 a,b; } s; diff --git a/xen/arch/x86/include/asm/endbr.h b/xen/arch/x86/include/asm/en= dbr.h index 3033e40d29a8..ba3bae714787 100644 --- a/xen/arch/x86/include/asm/endbr.h +++ b/xen/arch/x86/include/asm/endbr.h @@ -19,7 +19,7 @@ * gen_endbr64() is written deliberately to avoid the problematic operand,= and * marked __const__ as it is safe for the optimiser to hoist/merge/etc. */ -static inline uint32_t __attribute_const__ gen_endbr64(void) +static inline uint32_t attr_const gen_endbr64(void) { uint32_t res; =20 @@ -45,7 +45,7 @@ static inline void place_endbr64(void *ptr) * contain an ENDBR64 instruction. Use an encoding which isn't the default * P6_NOP4. Specifically, nopw (%rcx) */ -static inline uint32_t __attribute_const__ gen_endbr64_poison(void) +static inline uint32_t attr_const gen_endbr64_poison(void) { uint32_t res; =20 diff --git a/xen/include/xen/byteorder/swab.h b/xen/include/xen/byteorder/s= wab.h index b7e30f050385..9f817e3c4492 100644 --- a/xen/include/xen/byteorder/swab.h +++ b/xen/include/xen/byteorder/swab.h @@ -123,7 +123,7 @@ #endif /* OPTIMIZE */ =20 =20 -static inline __attribute_const__ __u16 __fswab16(__u16 x) +static inline attr_const __u16 __fswab16(__u16 x) { return __arch__swab16(x); } @@ -136,7 +136,7 @@ static inline void __swab16s(__u16 *addr) __arch__swab16s(addr); } =20 -static inline __attribute_const__ __u32 __fswab32(__u32 x) +static inline attr_const __u32 __fswab32(__u32 x) { return __arch__swab32(x); } @@ -150,7 +150,7 @@ static inline void __swab32s(__u32 *addr) } =20 #ifdef __BYTEORDER_HAS_U64__ -static inline __attribute_const__ __u64 __fswab64(__u64 x) +static inline attr_const __u64 __fswab64(__u64 x) { # ifdef __SWAB_64_THRU_32__ __u32 h =3D x >> 32; diff --git a/xen/include/xen/compiler.h b/xen/include/xen/compiler.h index 444bf80142c7..b118e4ba62eb 100644 --- a/xen/include/xen/compiler.h +++ b/xen/include/xen/compiler.h @@ -88,7 +88,7 @@ =20 #define __constructor __attribute__((__constructor__)) cf_check #define __pure __attribute__((__pure__)) -#define __attribute_const__ __attribute__((__const__)) +#define attr_const __attribute__((__const__)) #define __transparent__ __attribute__((__transparent_union__)) =20 /* --=20 2.39.2 From nobody Sat Nov 23 13:00:49 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=reject dis=none) header.from=citrix.com ARC-Seal: i=1; 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Wed, 28 Aug 2024 15:03:57 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Oleksii Kurochko , Shawn Anastasio Subject: [PATCH v2 02/11] xen/bitops: Switch from __pure to attr_const Date: Wed, 28 Aug 2024 23:03:42 +0100 Message-Id: <20240828220351.2686408-3-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240828220351.2686408-1-andrew.cooper3@citrix.com> References: <20240828220351.2686408-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1724882663612116600 All of the ffs()/fls() infrastructure is in fact (attr) const, because it doesn't even read global state. This allows the compiler even more flexibility to optimise. No functional change. Reported-by: Jan Beulich Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Oleksii Kurochko CC: Shawn Anastasio v2: * New --- xen/include/xen/bitops.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h index 1cd43e464d9e..94af6da18b9b 100644 --- a/xen/include/xen/bitops.h +++ b/xen/include/xen/bitops.h @@ -32,8 +32,8 @@ extern void __bitop_bad_size(void); * * Bits are labelled from 1. Returns 0 if given 0. */ -unsigned int __pure generic_ffsl(unsigned long x); -unsigned int __pure generic_flsl(unsigned long x); +unsigned int attr_const generic_ffsl(unsigned long x); +unsigned int attr_const generic_flsl(unsigned long x); =20 /** * generic__test_and_set_bit - Set a bit and return its old value @@ -204,7 +204,7 @@ static always_inline bool test_bit(int nr, const volati= le void *addr) test_bit(nr, addr); \ }) =20 -static always_inline __pure unsigned int ffs(unsigned int x) +static always_inline attr_const unsigned int ffs(unsigned int x) { if ( __builtin_constant_p(x) ) return __builtin_ffs(x); @@ -216,7 +216,7 @@ static always_inline __pure unsigned int ffs(unsigned i= nt x) #endif } =20 -static always_inline __pure unsigned int ffsl(unsigned long x) +static always_inline attr_const unsigned int ffsl(unsigned long x) { if ( __builtin_constant_p(x) ) return __builtin_ffsl(x); @@ -228,7 +228,7 @@ static always_inline __pure unsigned int ffsl(unsigned = long x) #endif } =20 -static always_inline __pure unsigned int ffs64(uint64_t x) +static always_inline attr_const unsigned int ffs64(uint64_t x) { if ( BITS_PER_LONG =3D=3D 64 ) return ffsl(x); @@ -246,7 +246,7 @@ static always_inline __pure unsigned int ffs64(uint64_t= x) sizeof(x) <=3D sizeof(uint64_t) ? ffs64(x) : \ ({ BUILD_ERROR("ffs_g() Bad input type"); 0; })) =20 -static always_inline __pure unsigned int fls(unsigned int x) +static always_inline attr_const unsigned int fls(unsigned int x) { if ( __builtin_constant_p(x) ) return x ? 32 - __builtin_clz(x) : 0; @@ -258,7 +258,7 @@ static always_inline __pure unsigned int fls(unsigned i= nt x) #endif } =20 -static always_inline __pure unsigned int flsl(unsigned long x) +static always_inline attr_const unsigned int flsl(unsigned long x) { if ( __builtin_constant_p(x) ) return x ? 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1724882663457116600 Recent additions have undone prior tidying at the top of the file. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Oleksii Kurochko CC: Shawn Anastasio --- xen/include/xen/bitops.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h index 94af6da18b9b..9f0a0ce4a73b 100644 --- a/xen/include/xen/bitops.h +++ b/xen/include/xen/bitops.h @@ -204,6 +204,8 @@ static always_inline bool test_bit(int nr, const volati= le void *addr) test_bit(nr, addr); \ }) =20 +/* --------------------- Please tidy above here --------------------- */ + static always_inline attr_const unsigned int ffs(unsigned int x) { if ( __builtin_constant_p(x) ) --=20 2.39.2 From nobody Sat Nov 23 13:00:49 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; 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Wed, 28 Aug 2024 15:04:00 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Oleksii Kurochko , Shawn Anastasio Subject: [PATCH v2 04/11] xen/bitops: Introduce a multiple_bits_set() helper Date: Wed, 28 Aug 2024 23:03:44 +0100 Message-Id: <20240828220351.2686408-5-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240828220351.2686408-1-andrew.cooper3@citrix.com> References: <20240828220351.2686408-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1724882665497116600 This will be used to simplify real logic in the following patch. Add compi= le and boot time testing as with other bitops. Because the expression is so simple, implement it as a function-like macro which is generic on the type of it's argument, rather than having multiple variants. Testing function-like macros needs a minor adjustments to the infrastructure in xen/self-tests.h to avoid bracketing the fn parameter. The utility of t= his outweighs the associated risks. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Oleksii Kurochko CC: Shawn Anastasio Name inevitably subject to nitpicking. I'd prefer it to be shorter but I can't think of anything suitable. v2: * Drop redundant CHECK() in the BITS_PER_LONG > 32 case. --- xen/common/bitops.c | 23 +++++++++++++++++++++++ xen/include/xen/bitops.h | 10 ++++++++++ xen/include/xen/self-tests.h | 10 ++++++++-- 3 files changed, 41 insertions(+), 2 deletions(-) diff --git a/xen/common/bitops.c b/xen/common/bitops.c index 9e532f0d87aa..b504dd1308b8 100644 --- a/xen/common/bitops.c +++ b/xen/common/bitops.c @@ -112,9 +112,32 @@ static void __init test_for_each_set_bit(void) panic("for_each_set_bit(uint64) expected %#"PRIx64", got %#"PRIx64= "\n", ull, ull_res); } =20 +static void __init test_multiple_bits_set(void) +{ + /* + * multiple_bits_set() is generic on the type of it's parameter, as the + * internal expression is so simple. + */ + + CHECK(multiple_bits_set, 0, false); + CHECK(multiple_bits_set, 1, false); + CHECK(multiple_bits_set, 2, false); + CHECK(multiple_bits_set, 3, true); + + CHECK(multiple_bits_set, 1 | (1UL << (BITS_PER_LONG - 1)), true); +#if BITS_PER_LONG > 32 + CHECK(multiple_bits_set, 1 | (1UL << 32), true); +#endif + + CHECK(multiple_bits_set, 0x8000000000000001ULL, true); + CHECK(multiple_bits_set, 0xc000000000000000ULL, true); +} + static void __init __constructor test_bitops(void) { test_ffs(); test_fls(); test_for_each_set_bit(); + + test_multiple_bits_set(); } diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h index 9f0a0ce4a73b..e7c2c5598275 100644 --- a/xen/include/xen/bitops.h +++ b/xen/include/xen/bitops.h @@ -298,6 +298,16 @@ static always_inline attr_const unsigned int fls64(uin= t64_t x) __v && ((iter) =3D ffs_g(__v) - 1, true); \ __v &=3D __v - 1 ) =20 +/* + * Calculate if a value has two or more bits set. Always use this in + * preference to an expression of the form 'hweight(x) > 1'. + */ +#define multiple_bits_set(x) \ + ({ \ + typeof(x) _v =3D (x); \ + (_v & (_v - 1)) !=3D 0; \ + }) + /* --------------------- Please tidy below here --------------------- */ =20 #ifndef find_next_bit diff --git a/xen/include/xen/self-tests.h b/xen/include/xen/self-tests.h index e9a879489363..bd8a4867aa40 100644 --- a/xen/include/xen/self-tests.h +++ b/xen/include/xen/self-tests.h @@ -15,11 +15,14 @@ * * Clang < 8 can't fold constants through static inlines, causing this to * fail. Simply skip it for incredibly old compilers. + * + * N.B. fn is intentionally not bracketed to allow us to test function-like + * macros too. */ #if !defined(CONFIG_CC_IS_CLANG) || CONFIG_CLANG_VERSION >=3D 80000 #define COMPILE_CHECK(fn, val, res) \ do { \ - typeof((fn)(val)) real =3D (fn)(val); \ + typeof(fn(val)) real =3D fn(val); \ \ if ( !__builtin_constant_p(real) ) \ BUILD_ERROR("'" STR(fn(val)) "' not compile-time constant"); \ @@ -34,10 +37,13 @@ * Check that Xen's runtime logic for fn(val) gives the expected answer. = This * requires using HIDE() to prevent the optimiser from collapsing the logic * into a constant. + * + * N.B. fn is intentionally not bracketed to allow us to test function-like + * macros too. */ #define RUNTIME_CHECK(fn, val, res) \ do { \ - typeof((fn)(val)) real =3D (fn)(HIDE(val)); \ + typeof(fn(val)) real =3D fn(HIDE(val)); \ \ if ( real !=3D (res) ) \ panic("%s: %s(%s) expected %u, got %u\n", \ --=20 2.39.2 From nobody Sat Nov 23 13:00:49 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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Wed, 28 Aug 2024 15:04:01 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Oleksii Kurochko , Shawn Anastasio Subject: [PATCH v2 05/11] xen/bitops: Convert 'hweight(x) > 1' to new multiple_bits_set() Date: Wed, 28 Aug 2024 23:03:45 +0100 Message-Id: <20240828220351.2686408-6-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240828220351.2686408-1-andrew.cooper3@citrix.com> References: <20240828220351.2686408-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1724882667511116600 Using hweight() is an especially expensive way of determining simply if multiple bits are set in a value. Worse, 4 of the 10 hweight() calls in Xen are of this form. Switch to the new multiple_bits_set() helper. This is far more efficient t= han the longhand hweight() algorithm and, owing to its simplicity, likely more efficient than even a dedicated instruction on a superscalar processor. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Oleksii Kurochko CC: Shawn Anastasio For future work, do related work for bitmap_weight() so cpumask_weight() in particular can stop being used for so many 0/1 special cases. On x86, the code reduction speaks for itself: add/remove: 0/0 grow/shrink: 0/3 up/down: 0/-240 (-240) Function old new delta vlapic_ipi 722 650 -72 numa_emulation 577 497 -80 do_xenpmu_op 1665 1577 -88 That's an aweful lot of wasted calculation for the same answer. I can't find a way of enabling CONFIG_NUMA on ARM (yet?) so right now there= 's no change in any other architecture. However, a synthetic helper shows the following on ARM32: add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-128 (-128) Function old new delta test_mbs 176 48 -128 and on ARM64: add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-44 (-44) Function old new delta test_mbs 60 16 -44 PPC64 has POPCNTD in a default build of Xen and by chance both algorithms compile to the same number of instructions. RISC-V doesn't have hweight() wired up yet at all. --- xen/arch/x86/cpu/vpmu.c | 2 +- xen/arch/x86/hvm/vlapic.c | 10 ++++++---- xen/common/numa.c | 2 +- 3 files changed, 8 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/cpu/vpmu.c b/xen/arch/x86/cpu/vpmu.c index b2ba9994129b..a5bb1689c7d5 100644 --- a/xen/arch/x86/cpu/vpmu.c +++ b/xen/arch/x86/cpu/vpmu.c @@ -673,7 +673,7 @@ long do_xenpmu_op( { if ( (pmu_params.val & ~(XENPMU_MODE_SELF | XENPMU_MODE_HV | XENPMU_MODE_ALL)) || - (hweight64(pmu_params.val) > 1) ) + multiple_bits_set(pmu_params.val) ) return -EINVAL; =20 /* 32-bit dom0 can only sample itself. */ diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c index 2ec95942713e..4a3e21a65f9d 100644 --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -467,12 +467,14 @@ static bool is_multicast_dest(struct vlapic *vlapic, = unsigned int short_hand, return short_hand !=3D APIC_DEST_SELF; =20 if ( vlapic_x2apic_mode(vlapic) ) - return dest_mode ? hweight16(dest) > 1 : dest =3D=3D 0xffffffffU; + return dest_mode ? multiple_bits_set((uint16_t)dest) + : dest =3D=3D 0xffffffffU; =20 if ( dest_mode ) - return hweight8(dest & - GET_xAPIC_DEST_FIELD(vlapic_get_reg(vlapic, - APIC_DFR))) > = 1; + { + dest &=3D GET_xAPIC_DEST_FIELD(vlapic_get_reg(vlapic, APIC_DFR)); + return multiple_bits_set((uint8_t)dest); + } =20 return dest =3D=3D 0xff; } diff --git a/xen/common/numa.c b/xen/common/numa.c index 28a09766fabc..ce3991929ce5 100644 --- a/xen/common/numa.c +++ b/xen/common/numa.c @@ -546,7 +546,7 @@ static int __init numa_emulation(unsigned long start_pf= n, uint64_t sz =3D pfn_to_paddr(end_pfn - start_pfn) / numa_fake; =20 /* Kludge needed for the hash function */ - if ( hweight64(sz) > 1 ) + if ( multiple_bits_set(sz) ) { uint64_t x =3D 1; =20 --=20 2.39.2 From nobody Sat Nov 23 13:00:49 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; 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Wed, 28 Aug 2024 15:04:02 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Oleksii Kurochko , Shawn Anastasio Subject: [PATCH v2 06/11] xen/bitops: Drop the remnants of hweight{8,16}() Date: Wed, 28 Aug 2024 23:03:46 +0100 Message-Id: <20240828220351.2686408-7-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240828220351.2686408-1-andrew.cooper3@citrix.com> References: <20240828220351.2686408-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1724882669529116600 They are no more. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Oleksii Kurochko CC: Shawn Anastasio --- xen/arch/arm/include/asm/bitops.h | 2 -- xen/arch/ppc/include/asm/bitops.h | 2 -- xen/arch/x86/include/asm/bitops.h | 2 -- xen/include/xen/bitops.h | 17 ----------------- 4 files changed, 23 deletions(-) diff --git a/xen/arch/arm/include/asm/bitops.h b/xen/arch/arm/include/asm/b= itops.h index 3c023103f734..91cd167b6bbb 100644 --- a/xen/arch/arm/include/asm/bitops.h +++ b/xen/arch/arm/include/asm/bitops.h @@ -86,8 +86,6 @@ bool clear_mask16_timeout(uint16_t mask, volatile void *p, */ #define hweight64(x) generic_hweight64(x) #define hweight32(x) generic_hweight32(x) -#define hweight16(x) generic_hweight16(x) -#define hweight8(x) generic_hweight8(x) =20 #endif /* _ARM_BITOPS_H */ /* diff --git a/xen/arch/ppc/include/asm/bitops.h b/xen/arch/ppc/include/asm/b= itops.h index eb3355812ea3..a62c4f99c3bb 100644 --- a/xen/arch/ppc/include/asm/bitops.h +++ b/xen/arch/ppc/include/asm/bitops.h @@ -132,7 +132,5 @@ static inline int test_and_set_bit(unsigned int nr, vol= atile void *addr) */ #define hweight64(x) __builtin_popcountll(x) #define hweight32(x) __builtin_popcount(x) -#define hweight16(x) __builtin_popcount((uint16_t)(x)) -#define hweight8(x) __builtin_popcount((uint8_t)(x)) =20 #endif /* _ASM_PPC_BITOPS_H */ diff --git a/xen/arch/x86/include/asm/bitops.h b/xen/arch/x86/include/asm/b= itops.h index 8c0403405aa2..4c5b21907a64 100644 --- a/xen/arch/x86/include/asm/bitops.h +++ b/xen/arch/x86/include/asm/bitops.h @@ -483,7 +483,5 @@ static always_inline unsigned int arch_flsl(unsigned lo= ng x) */ #define hweight64(x) generic_hweight64(x) #define hweight32(x) generic_hweight32(x) -#define hweight16(x) generic_hweight16(x) -#define hweight8(x) generic_hweight8(x) =20 #endif /* _X86_BITOPS_H */ diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h index e7c2c5598275..1c160b643ed6 100644 --- a/xen/include/xen/bitops.h +++ b/xen/include/xen/bitops.h @@ -395,23 +395,6 @@ static inline unsigned int generic_hweight32(unsigned = int w) return (w + (w >> 16)) & 0xff; } =20 -static inline unsigned int generic_hweight16(unsigned int w) -{ - w -=3D ((w >> 1) & 0x5555); - w =3D (w & 0x3333) + ((w >> 2) & 0x3333); - w =3D (w + (w >> 4)) & 0x0f0f; - - return (w + (w >> 8)) & 0xff; -} - -static inline unsigned int generic_hweight8(unsigned int w) -{ - w -=3D ((w >> 1) & 0x55); - w =3D (w & 0x33) + ((w >> 2) & 0x33); - - return (w + (w >> 4)) & 0x0f; -} - static inline unsigned int generic_hweight64(uint64_t w) { if ( BITS_PER_LONG < 64 ) --=20 2.39.2 From nobody Sat Nov 23 13:00:49 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=reject dis=none) header.from=citrix.com ARC-Seal: i=1; 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Wed, 28 Aug 2024 15:04:04 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Oleksii Kurochko , Shawn Anastasio Subject: [PATCH v2 07/11] xen/bitops: Introduce generic_hweightl() and hweightl() Date: Wed, 28 Aug 2024 23:03:47 +0100 Message-Id: <20240828220351.2686408-8-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240828220351.2686408-1-andrew.cooper3@citrix.com> References: <20240828220351.2686408-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1724882671564116600 There are 6 remaining callers in Xen: * The two hweight32() calls, _domain_struct_bits() and efi_find_gop_mode(= ), are __init only. * The two hweight_long() calls are both in bitmap_weight(). * The two hweight64() calls are hv_vpset_nr_banks() and x86_emulate(). Only bitmap_weight() and possibly hv_vpset_nr_banks() can be considered fast paths, and they're all of GPR-width form. Furthermore, the differences between a generic int and generic long form is only an ADD and SHIFT, and only in !CONFIG_HAS_FAST_MULTIPLY builds. Therefore, it is definitely not worth having both generic implemenations. Implement generic_hweightl() based on the current generic_hweight64(), adjusted to be compatible with ARM32, along with standard SELF_TESTS. Implement hweightl() with usual constant-folding and arch opt-in support. = PPC is the only architecture that devates from generic, and it simply uses the builtin. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Oleksii Kurochko CC: Shawn Anastasio v2: * s/MASK/BCST/. Extend testing * s/__pure/attr_const/. --- xen/arch/ppc/include/asm/bitops.h | 2 ++ xen/common/bitops.c | 14 +++++++++ xen/include/xen/bitops.h | 18 ++++++++++++ xen/lib/Makefile | 1 + xen/lib/generic-hweightl.c | 49 +++++++++++++++++++++++++++++++ 5 files changed, 84 insertions(+) create mode 100644 xen/lib/generic-hweightl.c diff --git a/xen/arch/ppc/include/asm/bitops.h b/xen/arch/ppc/include/asm/b= itops.h index a62c4f99c3bb..64512e949530 100644 --- a/xen/arch/ppc/include/asm/bitops.h +++ b/xen/arch/ppc/include/asm/bitops.h @@ -124,6 +124,8 @@ static inline int test_and_set_bit(unsigned int nr, vol= atile void *addr) #define arch_fls(x) ((x) ? 32 - __builtin_clz(x) : 0) #define arch_flsl(x) ((x) ? BITS_PER_LONG - __builtin_clzl(x) : 0) =20 +#define arch_hweightl(x) __builtin_popcountl(x) + /** * hweightN - returns the hamming weight of a N-bit word * @x: the word to weigh diff --git a/xen/common/bitops.c b/xen/common/bitops.c index b504dd1308b8..5e5d20d225d7 100644 --- a/xen/common/bitops.c +++ b/xen/common/bitops.c @@ -133,6 +133,19 @@ static void __init test_multiple_bits_set(void) CHECK(multiple_bits_set, 0xc000000000000000ULL, true); } =20 +static void __init test_hweight(void) +{ + /* unsigned int hweightl(unsigned long) */ + CHECK(hweightl, 0, 0); + CHECK(hweightl, 1, 1); + CHECK(hweightl, 3, 2); + CHECK(hweightl, 7, 3); + CHECK(hweightl, 0xff, 8); + + CHECK(hweightl, 1 | (1UL << (BITS_PER_LONG - 1)), 2); + CHECK(hweightl, -1UL, BITS_PER_LONG); +} + static void __init __constructor test_bitops(void) { test_ffs(); @@ -140,4 +153,5 @@ static void __init __constructor test_bitops(void) test_for_each_set_bit(); =20 test_multiple_bits_set(); + test_hweight(); } diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h index 1c160b643ed6..96dfe0f2c71a 100644 --- a/xen/include/xen/bitops.h +++ b/xen/include/xen/bitops.h @@ -35,6 +35,12 @@ extern void __bitop_bad_size(void); unsigned int attr_const generic_ffsl(unsigned long x); unsigned int attr_const generic_flsl(unsigned long x); =20 +/* + * Hamming Weight, also called Population Count. Returns the number of set + * bits in @x. + */ +unsigned int attr_const generic_hweightl(unsigned long x); + /** * generic__test_and_set_bit - Set a bit and return its old value * @nr: Bit to set @@ -308,6 +314,18 @@ static always_inline attr_const unsigned int fls64(uin= t64_t x) (_v & (_v - 1)) !=3D 0; \ }) =20 +static always_inline attr_const unsigned int hweightl(unsigned long x) +{ + if ( __builtin_constant_p(x) ) + return __builtin_popcountl(x); + +#ifdef arch_hweightl + return arch_hweightl(x); +#else + return generic_hweightl(x); +#endif +} + /* --------------------- Please tidy below here --------------------- */ =20 #ifndef find_next_bit diff --git a/xen/lib/Makefile b/xen/lib/Makefile index a48541596470..b6558e108bd9 100644 --- a/xen/lib/Makefile +++ b/xen/lib/Makefile @@ -6,6 +6,7 @@ lib-y +=3D ctype.o lib-y +=3D find-next-bit.o lib-y +=3D generic-ffsl.o lib-y +=3D generic-flsl.o +lib-y +=3D generic-hweightl.o lib-y +=3D list-sort.o lib-y +=3D memchr.o lib-y +=3D memchr_inv.o diff --git a/xen/lib/generic-hweightl.c b/xen/lib/generic-hweightl.c new file mode 100644 index 000000000000..c242d4c2d9ab --- /dev/null +++ b/xen/lib/generic-hweightl.c @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include + +/* Value @b broadcast to every byte in a long */ +#if BITS_PER_LONG =3D=3D 32 +# define BCST(b) ((b) * 0x01010101UL) +#elif BITS_PER_LONG =3D=3D 64 +# define BCST(b) ((b) * 0x0101010101010101UL) +#else +# error Extend me please +#endif + +unsigned int generic_hweightl(unsigned long x) +{ + x -=3D (x >> 1) & BCST(0x55); + x =3D (x & BCST(0x33)) + ((x >> 2) & BCST(0x33)); + x =3D (x + (x >> 4)) & BCST(0x0f); + + if ( IS_ENABLED(CONFIG_HAS_FAST_MULTIPLY) ) + return (x * BCST(0x01)) >> (BITS_PER_LONG - 8); + + x +=3D x >> 8; + x +=3D x >> 16; +#if BITS_PER_LONG > 32 + x +=3D x >> 32; +#endif + + return x & 0xff; +} + +#ifdef CONFIG_SELF_TESTS +static void __init __constructor test_generic_hweightl(void) +{ + RUNTIME_CHECK(generic_hweightl, 0, 0); + RUNTIME_CHECK(generic_hweightl, 1, 1); + RUNTIME_CHECK(generic_hweightl, 3, 2); + RUNTIME_CHECK(generic_hweightl, 7, 3); + RUNTIME_CHECK(generic_hweightl, 0xff, 8); + + RUNTIME_CHECK(generic_hweightl, BCST(0x55), BITS_PER_LONG / 2); + RUNTIME_CHECK(generic_hweightl, BCST(0xaa), BITS_PER_LONG / 2); + + RUNTIME_CHECK(generic_hweightl, 1 | (1UL << (BITS_PER_LONG - 1)), 2); + RUNTIME_CHECK(generic_hweightl, -1UL, BITS_PER_LONG); +} +#endif /* CONFIG_SELF_TESTS */ --=20 2.39.2 From nobody Sat Nov 23 13:00:49 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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Wed, 28 Aug 2024 15:04:05 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Oleksii Kurochko , Shawn Anastasio Subject: [PATCH v2 08/11] xen/bitops: Drop hweight_long() and use hweightl() Date: Wed, 28 Aug 2024 23:03:48 +0100 Message-Id: <20240828220351.2686408-9-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240828220351.2686408-1-andrew.cooper3@citrix.com> References: <20240828220351.2686408-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1724882667467116600 No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Oleksii Kurochko CC: Shawn Anastasio --- xen/common/bitmap.c | 4 ++-- xen/include/xen/bitops.h | 5 ----- 2 files changed, 2 insertions(+), 7 deletions(-) diff --git a/xen/common/bitmap.c b/xen/common/bitmap.c index 9d9ff09f3dde..3da63a32a680 100644 --- a/xen/common/bitmap.c +++ b/xen/common/bitmap.c @@ -191,10 +191,10 @@ unsigned int __bitmap_weight(const unsigned long *bit= map, unsigned int bits) unsigned int k, w =3D 0, lim =3D bits / BITS_PER_LONG; =20 for (k =3D 0; k < lim; k++) - w +=3D hweight_long(bitmap[k]); + w +=3D hweightl(bitmap[k]); =20 if (bits % BITS_PER_LONG) - w +=3D hweight_long(bitmap[k] & BITMAP_LAST_WORD_MASK(bits)); + w +=3D hweightl(bitmap[k] & BITMAP_LAST_WORD_MASK(bits)); =20 return w; } diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h index 96dfe0f2c71a..58c600155f7e 100644 --- a/xen/include/xen/bitops.h +++ b/xen/include/xen/bitops.h @@ -431,11 +431,6 @@ static inline unsigned int generic_hweight64(uint64_t = w) return (w + (w >> 32)) & 0xFF; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1724882675472116600 ... and drop generic_hweight32(). As noted previously, the only two users of hweight32() are in __init paths. The int-optimised form of generic_hweight() is only two instructions shorter than the long-optimised form, and even then only on architectures which lack fast multiplication, so there's no point providing an int-optimised form. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Oleksii Kurochko CC: Shawn Anastasio v2: * Reorder with respect to the hweight64() patch * Rerwrite the commit message * s/__pure/attr_const/ --- xen/arch/arm/include/asm/bitops.h | 1 - xen/arch/ppc/include/asm/bitops.h | 1 - xen/arch/x86/include/asm/bitops.h | 1 - xen/include/xen/bitops.h | 5 +++++ 4 files changed, 5 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/include/asm/bitops.h b/xen/arch/arm/include/asm/b= itops.h index 91cd167b6bbb..b28c25b3d52d 100644 --- a/xen/arch/arm/include/asm/bitops.h +++ b/xen/arch/arm/include/asm/bitops.h @@ -85,7 +85,6 @@ bool clear_mask16_timeout(uint16_t mask, volatile void *p, * The Hamming Weight of a number is the total number of bits set in it. */ #define hweight64(x) generic_hweight64(x) -#define hweight32(x) generic_hweight32(x) =20 #endif /* _ARM_BITOPS_H */ /* diff --git a/xen/arch/ppc/include/asm/bitops.h b/xen/arch/ppc/include/asm/b= itops.h index 64512e949530..f488a7c03425 100644 --- a/xen/arch/ppc/include/asm/bitops.h +++ b/xen/arch/ppc/include/asm/bitops.h @@ -133,6 +133,5 @@ static inline int test_and_set_bit(unsigned int nr, vol= atile void *addr) * The Hamming Weight of a number is the total number of bits set in it. */ #define hweight64(x) __builtin_popcountll(x) -#define hweight32(x) __builtin_popcount(x) =20 #endif /* _ASM_PPC_BITOPS_H */ diff --git a/xen/arch/x86/include/asm/bitops.h b/xen/arch/x86/include/asm/b= itops.h index 4c5b21907a64..507b043b8a86 100644 --- a/xen/arch/x86/include/asm/bitops.h +++ b/xen/arch/x86/include/asm/bitops.h @@ -482,6 +482,5 @@ static always_inline unsigned int arch_flsl(unsigned lo= ng x) * The Hamming Weight of a number is the total number of bits set in it. */ #define hweight64(x) generic_hweight64(x) -#define hweight32(x) generic_hweight32(x) =20 #endif /* _X86_BITOPS_H */ diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h index 58c600155f7e..a462c3065158 100644 --- a/xen/include/xen/bitops.h +++ b/xen/include/xen/bitops.h @@ -326,6 +326,11 @@ static always_inline attr_const unsigned int hweightl(= unsigned long x) #endif } =20 +static always_inline attr_const unsigned int hweight32(uint32_t x) +{ + return hweightl(x); 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1724882675506116600 ... and drop generic_hweight{32,64}(). This is identical on all architectures except ARM32. Add one extra SELF_TE= ST to check that hweight64() works when the input is split in half. No functional change. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Oleksii Kurochko CC: Shawn Anastasio v2: * Reorder with respect to the hweight32() patch * s/__pure/attr_const/ --- xen/arch/arm/include/asm/bitops.h | 8 ------ xen/arch/ppc/include/asm/bitops.h | 8 ------ xen/arch/x86/include/asm/bitops.h | 8 ------ xen/common/bitops.c | 3 +++ xen/include/xen/bitops.h | 45 ++++++------------------------- 5 files changed, 11 insertions(+), 61 deletions(-) diff --git a/xen/arch/arm/include/asm/bitops.h b/xen/arch/arm/include/asm/b= itops.h index b28c25b3d52d..f163d9bb4578 100644 --- a/xen/arch/arm/include/asm/bitops.h +++ b/xen/arch/arm/include/asm/bitops.h @@ -78,14 +78,6 @@ bool clear_mask16_timeout(uint16_t mask, volatile void *= p, #define arch_fls(x) ((x) ? 32 - __builtin_clz(x) : 0) #define arch_flsl(x) ((x) ? BITS_PER_LONG - __builtin_clzl(x) : 0) =20 -/** - * hweightN - returns the hamming weight of a N-bit word - * @x: the word to weigh - * - * The Hamming Weight of a number is the total number of bits set in it. - */ -#define hweight64(x) generic_hweight64(x) - #endif /* _ARM_BITOPS_H */ /* * Local variables: diff --git a/xen/arch/ppc/include/asm/bitops.h b/xen/arch/ppc/include/asm/b= itops.h index f488a7c03425..c942e9432e20 100644 --- a/xen/arch/ppc/include/asm/bitops.h +++ b/xen/arch/ppc/include/asm/bitops.h @@ -126,12 +126,4 @@ static inline int test_and_set_bit(unsigned int nr, vo= latile void *addr) =20 #define arch_hweightl(x) __builtin_popcountl(x) =20 -/** - * hweightN - returns the hamming weight of a N-bit word - * @x: the word to weigh - * - * The Hamming Weight of a number is the total number of bits set in it. - */ -#define hweight64(x) __builtin_popcountll(x) - #endif /* _ASM_PPC_BITOPS_H */ diff --git a/xen/arch/x86/include/asm/bitops.h b/xen/arch/x86/include/asm/b= itops.h index 507b043b8a86..642d8e58b288 100644 --- a/xen/arch/x86/include/asm/bitops.h +++ b/xen/arch/x86/include/asm/bitops.h @@ -475,12 +475,4 @@ static always_inline unsigned int arch_flsl(unsigned l= ong x) } #define arch_flsl arch_flsl =20 -/** - * hweightN - returns the hamming weight of a N-bit word - * @x: the word to weigh - * - * The Hamming Weight of a number is the total number of bits set in it. - */ -#define hweight64(x) generic_hweight64(x) - #endif /* _X86_BITOPS_H */ diff --git a/xen/common/bitops.c b/xen/common/bitops.c index 5e5d20d225d7..91ae961440af 100644 --- a/xen/common/bitops.c +++ b/xen/common/bitops.c @@ -144,6 +144,9 @@ static void __init test_hweight(void) =20 CHECK(hweightl, 1 | (1UL << (BITS_PER_LONG - 1)), 2); CHECK(hweightl, -1UL, BITS_PER_LONG); + + /* unsigned int hweight64(uint64_t) */ + CHECK(hweight64, -1ULL, 64); } =20 static void __init __constructor test_bitops(void) diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h index a462c3065158..c4cb432eed23 100644 --- a/xen/include/xen/bitops.h +++ b/xen/include/xen/bitops.h @@ -331,6 +331,14 @@ static always_inline attr_const unsigned int hweight32= (uint32_t x) return hweightl(x); } =20 +static always_inline attr_const unsigned int hweight64(uint64_t x) +{ + if ( BITS_PER_LONG =3D=3D 64 ) + return hweightl(x); + else + return hweight32(x >> 32) + hweight32(x); +} + /* --------------------- Please tidy below here --------------------- */ =20 #ifndef find_next_bit @@ -399,43 +407,6 @@ static inline int get_count_order(unsigned int count) return order; } =20 -/* - * hweightN: returns the hamming weight (i.e. the number - * of bits set) of a N-bit word - */ - -static inline unsigned int generic_hweight32(unsigned int w) -{ - w -=3D (w >> 1) & 0x55555555; - w =3D (w & 0x33333333) + ((w >> 2) & 0x33333333); - w =3D (w + (w >> 4)) & 0x0f0f0f0f; - - if ( IS_ENABLED(CONFIG_HAS_FAST_MULTIPLY) ) - return (w * 0x01010101) >> 24; - - w +=3D w >> 8; - - return (w + (w >> 16)) & 0xff; -} - -static inline unsigned int generic_hweight64(uint64_t w) -{ - if ( BITS_PER_LONG < 64 ) - return generic_hweight32(w >> 32) + generic_hweight32(w); - - w -=3D (w >> 1) & 0x5555555555555555UL; - w =3D (w & 0x3333333333333333UL) + ((w >> 2) & 0x3333333333333333UL); - w =3D (w + (w >> 4)) & 0x0f0f0f0f0f0f0f0fUL; - - if ( IS_ENABLED(CONFIG_HAS_FAST_MULTIPLY) ) - return (w * 0x0101010101010101UL) >> 56; - - w +=3D w >> 8; - w +=3D w >> 16; - - return (w + (w >> 32)) & 0xFF; -} - /* * rol32 - rotate a 32-bit value left * --=20 2.39.2 From nobody Sat Nov 23 13:00:49 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; 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Wed, 28 Aug 2024 15:04:10 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v2 11/11] x86/bitops: Use the POPCNT instruction when available Date: Wed, 28 Aug 2024 23:03:51 +0100 Message-Id: <20240828220351.2686408-12-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240828220351.2686408-1-andrew.cooper3@citrix.com> References: <20240828220351.2686408-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1724882681551116600 It has existed in x86 CPUs since 2008, so we're only 16 years late adding support. With all the other scafolding in place, implement arch_hweightl() for x86. The only complication is that the call to arch_generic_hweightl() is behind the compilers back. Address this by writing it in ASM and ensure that it preserves all registers. Copy the code generation from generic_hweightl(). It's not a complicated algorithm, and is easy to regenerate if needs be, but cover it with the same unit tests as test_generic_hweightl() just for piece of mind. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 v2: * Fix MISRA 8.2 (parameter name) and 8.5 (single declaration) regressions. * Rename {arch->x86}-generic-hweightl.{S->c} * Adjust ASM formating The __constructor trick to cause any reference to $foo() to pull in test_$foo() only works when both are in the same TU. i.e. what I did in v1 (putting test_arch_generic_hweightl() in the regular generic-hweightl.c) didn't work. This in turn means that arch_generic_hweightl() needs writing in a global a= sm block, and also that we can't use FUNC()/END(). While we could adjust it to work for GCC/binutils, we can't have CPP macros in Clang-IAS strings. I don't particularly like opencoding FUNC()/END(), but I can't think of anything better. --- xen/arch/x86/include/asm/bitops.h | 23 +++++++++++ xen/lib/Makefile | 1 + xen/lib/x86-generic-hweightl.c | 69 +++++++++++++++++++++++++++++++ 3 files changed, 93 insertions(+) create mode 100644 xen/lib/x86-generic-hweightl.c diff --git a/xen/arch/x86/include/asm/bitops.h b/xen/arch/x86/include/asm/b= itops.h index 642d8e58b288..39e37f1cbe55 100644 --- a/xen/arch/x86/include/asm/bitops.h +++ b/xen/arch/x86/include/asm/bitops.h @@ -6,6 +6,7 @@ */ =20 #include +#include #include =20 /* @@ -475,4 +476,26 @@ static always_inline unsigned int arch_flsl(unsigned l= ong x) } #define arch_flsl arch_flsl =20 +unsigned int arch_generic_hweightl(unsigned long x); + +static always_inline unsigned int arch_hweightl(unsigned long x) +{ + unsigned int r; + + /* + * arch_generic_hweightl() is written in ASM in order to preserve all + * registers, as the compiler can't see the call. + * + * This limits the POPCNT instruction to using the same ABI as a funct= ion + * call (input in %rdi, output in %eax) but that's fine. + */ + alternative_io("call arch_generic_hweightl", + "popcnt %[val], %q[res]", X86_FEATURE_POPCNT, + ASM_OUTPUT2([res] "=3Da" (r) ASM_CALL_CONSTRAINT), + [val] "D" (x)); + + return r; +} +#define arch_hweightl arch_hweightl + #endif /* _X86_BITOPS_H */ diff --git a/xen/lib/Makefile b/xen/lib/Makefile index b6558e108bd9..54440f628aae 100644 --- a/xen/lib/Makefile +++ b/xen/lib/Makefile @@ -36,6 +36,7 @@ lib-y +=3D strtol.o lib-y +=3D strtoll.o lib-y +=3D strtoul.o lib-y +=3D strtoull.o +lib-$(CONFIG_X86) +=3D x86-generic-hweightl.o lib-$(CONFIG_X86) +=3D xxhash32.o lib-$(CONFIG_X86) +=3D xxhash64.o =20 diff --git a/xen/lib/x86-generic-hweightl.c b/xen/lib/x86-generic-hweightl.c new file mode 100644 index 000000000000..e0be25a01c1d --- /dev/null +++ b/xen/lib/x86-generic-hweightl.c @@ -0,0 +1,69 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include + +/* + * An implementation of generic_hweightl() used on hardware without the PO= PCNT + * instruction. + * + * This function is called from within an ALTERNATIVE in arch_hweightl(). + * i.e. behind the back of the compiler. Therefore all registers are call= ee + * preserved. + * + * The ASM is what GCC-12 emits for generic_hweightl() in a release build = of + * Xen, with spilling of %rdi/%rdx to preserve the callers registers. + * + * Note: When we can use __attribute__((no_caller_saved_registers)) + * unconditionally (GCC 7, Clang 5), we can implement this in plain = C. + */ +asm ( + ".type arch_generic_hweightl, STT_FUNC\n\t" + ".globl arch_generic_hweightl\n\t" + ".hidden arch_generic_hweightl\n\t" + ".balign " STR(CONFIG_FUNCTION_ALIGNMENT) ", 0x90\n\t" + "arch_generic_hweightl:\n\t" + + "push %rdi\n\t" + "push %rdx\n\t" + + "movabs $0x5555555555555555, %rdx\n\t" + "mov %rdi, %rax\n\t" + "shr $1, %rax\n\t" + "and %rdx, %rax\n\t" + "sub %rax, %rdi\n\t" + "movabs $0x3333333333333333, %rax\n\t" + "mov %rdi, %rdx\n\t" + "shr $2, %rdi\n\t" + "and %rax, %rdx\n\t" + "and %rax, %rdi\n\t" + "add %rdi, %rdx\n\t" + "mov %rdx, %rax\n\t" + "shr $4, %rax\n\t" + "add %rdx, %rax\n\t" + "movabs $0x0f0f0f0f0f0f0f0f, %rdx\n\t" + "and %rdx, %rax\n\t" + "movabs $0x0101010101010101, %rdx\n\t" + "imul %rdx, %rax\n\t" + "shr $" STR(BITS_PER_LONG) "- 8, %rax\n\t" + + "pop %rdx\n\t" + "pop %rdi\n\t" + + "ret\n\t" + + ".size arch_generic_hweightl, . - arch_generic_hweightl\n\t" +); + +static void __init __constructor test_arch_generic_hweightl(void) +{ + RUNTIME_CHECK(arch_generic_hweightl, 0, 0); + RUNTIME_CHECK(arch_generic_hweightl, 1, 1); + RUNTIME_CHECK(arch_generic_hweightl, 3, 2); + RUNTIME_CHECK(arch_generic_hweightl, 7, 3); + RUNTIME_CHECK(arch_generic_hweightl, 0xff, 8); + + RUNTIME_CHECK(arch_generic_hweightl, 1 | (1UL << (BITS_PER_LONG - 1)),= 2); + RUNTIME_CHECK(arch_generic_hweightl, -1UL, BITS_PER_LONG); +} --=20 2.39.2