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Tue, 20 Aug 2024 03:27:31 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 20 Aug 2024 03:27:31 -0500 Received: from localhost (nightbug.dhcp.ti.com [10.24.72.75]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 47K8RU3m130710; Tue, 20 Aug 2024 03:27:31 -0500 X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 10b2b315-5ece-11ef-a507-bb4a2ccca743 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1724142452; bh=yIzF3ngTZJQyuB6CBlMow9/583cX6Io7qcEhCzHEFrg=; h=From:To:CC:Subject:Date; b=f+jt/UTk3iM6OYpx9fxz0nd/JmALR9TcZSJIAE6ezrpbiib44B17pZJ3OVr9q/WXV t1FZdX2v8XSubN4dcizLWf8XGaOM4JyLkHpiGe21st2Qyn++hLWccrN2/PlwCKunRT RbxD4b4QwWXj0ApU6SEdrQOiIpdLvGhK4lejfYNM= From: Amneesh Singh To: CC: , , Amneesh Singh Subject: [PATCH v2] drivers: char: omap-uart: provide a default clock frequency Date: Tue, 20 Aug 2024 13:52:03 +0530 Message-ID: <20240820082202.326644-1-a-singh21@ti.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-ZohoMail-DKIM: pass (identity @ti.com) X-ZM-MESSAGEID: 1724142486288116600 Content-Type: text/plain; charset="utf-8" Quite a few TI K3 devices do not have clock-frequency specified in their respective UART nodes. However hard-coding the frequency is not a solution as the function clock input can differ between SoCs. So, use a default frequency of 48MHz if the device tree does not specify one. Signed-off-by: Amneesh Singh Reviewed-by: Michal Orzel --- xen/drivers/char/omap-uart.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) --- v1: https://lore.kernel.org/all/20240719113313.145587-1-a-singh21@ti.com/T/ v1 -> v2 - Ditch adding a dtuart option - Use a default value instead This default is the same one as found in the 8250_omap driver of the linux tree. Already tested with Xen. diff --git a/xen/drivers/char/omap-uart.c b/xen/drivers/char/omap-uart.c index 1079198..9d3d39c 100644 --- a/xen/drivers/char/omap-uart.c +++ b/xen/drivers/char/omap-uart.c @@ -48,6 +48,9 @@ /* System configuration register */ #define UART_OMAP_SYSC_DEF_CONF 0x0d /* autoidle mode, wakeup is enabl= ed */ =20 +/* default clock frequency in hz */ +#define UART_OMAP_DEFAULT_CLK_SPEED 48000000 + #define omap_read(uart, off) readl((uart)->regs + ((off) << REG_SHIF= T)) #define omap_write(uart, off, val) writel(val, \ (uart)->regs + ((off) << REG_SHI= FT)) @@ -322,8 +325,9 @@ static int __init omap_uart_init(struct dt_device_node = *dev, res =3D dt_property_read_u32(dev, "clock-frequency", &clkspec); if ( !res ) { - printk("omap-uart: Unable to retrieve the clock frequency\n"); - return -EINVAL; + printk("omap-uart: Unable to retrieve the clock frequency, " + "defaulting to %uHz\n", UART_OMAP_DEFAULT_CLK_SPEED); + clkspec =3D UART_OMAP_DEFAULT_CLK_SPEED; } =20 uart->clock_hz =3D clkspec; --=20 2.34.1