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Smith" , Stewart Hildebrand , Jiqian Chen , Huang Rui Subject: [XEN PATCH v13 2/6] x86/pvh: Allow (un)map_pirq when dom0 is PVH Date: Fri, 16 Aug 2024 19:08:16 +0800 Message-ID: <20240816110820.75672-3-Jiqian.Chen@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240816110820.75672-1-Jiqian.Chen@amd.com> References: <20240816110820.75672-1-Jiqian.Chen@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B06B:EE_|CH0PR12MB8552:EE_ X-MS-Office365-Filtering-Correlation-Id: 54c187cd-78f4-4756-c9bb-08dcbde3cb5a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700013|7416014|376014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?tu3Jm9nEg3LtFbx8a/fOOLx2jKTNmqAzAPM60wO4wrmvwKi1yv2Nx/yoUiIa?= =?us-ascii?Q?sC1qw+4G3TtxlwgRD3XJ/6rKEDf9JshQhCrgn5OmJROz+/pRMYsHuqbcrqk9?= =?us-ascii?Q?EHjF8Cl4fH82C6MD7iSqkQlBADJfBEGsq61+rc4Xeccm5fz76yzPSVev40q9?= =?us-ascii?Q?CfjbbyvpIZ5ITs1J/iyy97WToMVmu9dp/UkW3AsYWwam1DH3aof8AxdlOeCL?= =?us-ascii?Q?hjPNBVE7gNf/NlH+9jAiyqxH2v0IoGizuEMXVpTHFoAcMyW3hR0w+htPTcaG?= =?us-ascii?Q?wVWWzFV/eQohYMWlExGMRz5RdN3JAOa3vNJWFzSbCoHU6MzHmWRDRMKAuWIJ?= =?us-ascii?Q?cOquZswRPoiCv7WprsA59njBsgXOQx6Acsle30q+KvLjNRHvgapkSwnfHIDg?= =?us-ascii?Q?cteSFSd87cCoIj7o656H/sMjiH13kE3ewmBVbYygPxJzZ+NaElB1lNPwoo6e?= =?us-ascii?Q?96YrLWrErYLqy+RVggiJrau4pDj+c/pcahMQVihU1nYCQqWTcfn3UGqOV2Vt?= =?us-ascii?Q?sM6Xf3ItRMGM1Bv5hw4Bh65AeInlgerwxPafNKlevodtuGcMwMHdAs+f6Hy+?= =?us-ascii?Q?/ENmXA0iByiyxVvduV0cnZeil+i5xLA5tv8ZA5upq8KeV9Ltx11/J1FS+dBq?= =?us-ascii?Q?DpVaayA9KXnSuIXbbXw7A/GtoqtI25UVHrCYdppoIu/YC3+sFptwlxKhAtWk?= =?us-ascii?Q?q5xkTuf1RHGhXufSFuA3pb3E8THjRauOZN1WfLU4FLAqxdMcsG4Q2pDaO1KK?= =?us-ascii?Q?lssplSnN/ZvtigDnkwqm61TuuxQ4floBmKLKecM0YqQpU7ko57Dhr2xKSf5w?= =?us-ascii?Q?qUzaq8XRnE9nhA32Aytr6QEVokVfpXSjPua35FEQjqDcJHtL/eN1p7HVDOJW?= =?us-ascii?Q?eao2A6L1w/X5ASgTtpBtrj1yjkX55jHdFRbEk6hsgQ5Tcm/CZzhShKSUiCk5?= =?us-ascii?Q?E7RKmr6B+pA8aEjul8NcCke6mbDGGZjvWCIlZ2z6eBBxt/BSjk/GOfMDCW1H?= =?us-ascii?Q?x9No7ukbB6atdBH8cNcieH3UZl16BXAJcoGoN98kq821yV59nLzBPhcBDs2l?= =?us-ascii?Q?N9wCvH4SkGezF3m91CbGUNruTW+7P/63ZDpoaaBMFmaTVpd3u+i+F6HOGzxR?= =?us-ascii?Q?DqoZ4kILHNcQIep+2P1tfzpFK9i8HRzg8cvYlmhe/Oi0bmVdOGa/Ztr/oWPM?= =?us-ascii?Q?Lx7qW/kkMcF7T1Pxh/StJHoCYKwohejAruqgH+J7uAybedzQX2bUcw8jl+v9?= =?us-ascii?Q?XRby+uG9FVYRPocPA2+YBcTQvdwyABdUCcCbwwa1LYRdbl/ZsUjXsh4gdBH9?= =?us-ascii?Q?12JGB3xTu9u3R3KKrO4QxzYDAx0MvpGyhuzZZTfCqA9r42tOomZsqvL/Ba3l?= =?us-ascii?Q?9r9IzKzCKxjbtmED/IETdAxDUF7GpVyBD/aqjyiBB/YaEPrKhPO08VslpAiF?= =?us-ascii?Q?myR8dcYXwITmkbpoe6FVCn8Q4DgceFzM?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(36860700013)(7416014)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Aug 2024 11:08:44.5937 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 54c187cd-78f4-4756-c9bb-08dcbde3cb5a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B06B.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR12MB8552 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1723806559515116600 Content-Type: text/plain; charset="utf-8" If run Xen with PVH dom0 and hvm domU, hvm will map a pirq for a passthrough device by using gsi, see qemu code xen_pt_realize->xc_physdev_map_pirq and libxl code pci_add_dm_done->xc_physdev_map_pirq. Then xc_physdev_map_pirq will call into Xen, but in hvm_physdev_op, PHYSDEVOP_map_pirq is not allowed because currd is PVH dom0 and PVH has no X86_EMU_USE_PIRQ flag, it will fail at has_pirq check. So, allow PHYSDEVOP_map_pirq when dom0 is PVH and also allow iPHYSDEVOP_unmap_pirq for the removal device path to unmap pirq. So that the interrupt of a passthrough device can be successfully mapped to pirq for domU with a notion of PIRQ when dom0 is PVH. To exposing the functionality to wider than (presently) necessary audience(like PVH domU), so it doesn't add any futher restrictions. And there already are some senarios for domains without X86_EMU_USE_PIRQ to use these functions. Signed-off-by: Jiqian Chen Signed-off-by: Huang Rui Signed-off-by: Jiqian Chen --- v12->v13 changes: Removed the PHYSDEVOP_(un)map_pirq restriction check for pvh domU and added= a corresponding description in the commit message. v11->v12 changes: Avoid using return, set error code instead when (un)map is not allowed. v10->v11 changes: Delete the judgment of "d=3D=3Dcurrd", so that we can prevent physdev_(un)m= ap_pirq from being executed when domU has no pirq, instead of just preventi= ng self-mapping. And modify the description of the commit message accordingly. v9->v10 changes: Indent the comments above PHYSDEVOP_map_pirq according to the code style. v8->v9 changes: Add a comment above PHYSDEVOP_map_pirq to describe why need this hypercall. Change "!is_pv_domain(d)" to "is_hvm_domain(d)", and "map.domid =3D=3D DOMI= D_SELF" to "d =3D=3D current->domian". v7->v8 changes: Add the domid check(domid =3D=3D DOMID_SELF) to prevent self map when guest= doesn't use pirq. That check was missed in the previous version. v6->v7 changes: Nothing. v5->v6 changes: Nothing. v4->v5 changes: Move the check of self map_pirq to physdev.c, and change to check if the ca= ller has PIRQ flag, and just break for PHYSDEVOP_(un)map_pirq in hvm_physde= v_op. v3->v4 changes: add check to prevent PVH self map. v2->v3 changes: Du to changes in the implementation of the second patch on kernel side(that= it will do setup_gsi and map_pirq when assigning a device to passthrough),= add PHYSDEVOP_setup_gsi for PVH dom0, and we need to support self mapping. --- xen/arch/x86/hvm/hypercall.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/xen/arch/x86/hvm/hypercall.c b/xen/arch/x86/hvm/hypercall.c index 68815b03eb25..0b7fc060b4e2 100644 --- a/xen/arch/x86/hvm/hypercall.c +++ b/xen/arch/x86/hvm/hypercall.c @@ -73,6 +73,8 @@ long hvm_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void)= arg) { case PHYSDEVOP_map_pirq: case PHYSDEVOP_unmap_pirq: + break; + case PHYSDEVOP_eoi: case PHYSDEVOP_irq_status_query: case PHYSDEVOP_get_free_pirq: --=20 2.34.1