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Thu, 15 Aug 2024 06:16:10 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Matthew Barnes Subject: [PATCH v2 3/3] x86/pv: Address Coverity complaint in check_guest_io_breakpoint() Date: Thu, 15 Aug 2024 14:16:00 +0100 Message-Id: <20240815131600.4037415-4-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240815131600.4037415-1-andrew.cooper3@citrix.com> References: <20240815131600.4037415-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1723727803226116600 Commit 08aacc392d86 ("x86/emul: Fix misaligned IO breakpoint behaviour in PV guests") caused a Coverity INTEGER_OVERFLOW complaint based on the reasoning that width could be 0. It can't, but digging into the code generation, GCC 8 and later (bisected on gotbolt) choose to emit a CSWITCH lookup table, and because the range (bott= om 2 bits clear), it's a 16-entry lookup table. So Coverity is correct, given that GCC did emit a (dead) logic path where width stayed 0. Rewrite the logic. Introduce x86_bp_width() which compiles to a single bas= ic block, which replaces the switch() statement. Take the opportunity to also make start and width be loop-scope variables. No practical change, but it should compile better and placate Coverity. Fixes: 08aacc392d86 ("x86/emul: Fix misaligned IO breakpoint behaviour in P= V guests") Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Matthew Barnes --- xen/arch/x86/include/asm/debugreg.h | 26 ++++++++++++++++++++++++++ xen/arch/x86/pv/emul-priv-op.c | 21 ++++++--------------- 2 files changed, 32 insertions(+), 15 deletions(-) diff --git a/xen/arch/x86/include/asm/debugreg.h b/xen/arch/x86/include/asm= /debugreg.h index 969f2697aee1..cbcc3e83c3d2 100644 --- a/xen/arch/x86/include/asm/debugreg.h +++ b/xen/arch/x86/include/asm/debugreg.h @@ -116,4 +116,30 @@ unsigned int x86_adj_dr7_rsvd(const struct cpu_policy = *p, unsigned int dr7); unsigned int x86_merge_dr6(const struct cpu_policy *p, unsigned int dr6, unsigned int pending_dbg); =20 +/* + * Calculate the width of a breakpoint from its dr7 encoding. + * + * The LEN encoding in dr7 is 2 bits wide per breakpoint and encoded a mask + * (0, 1 and 3) for widths of 1, 2 and 4 respectively in the 32bit days. + * + * In 64bit, the unused value (2) was specified to mean a width of 8, whic= h is + * great for encoding efficiency but less great for nicely calculating the + * width. + */ +static inline unsigned int x86_bp_width(unsigned int dr7, unsigned int bp) +{ + unsigned int raw =3D (dr7 >> (DR_CONTROL_SHIFT + + DR_CONTROL_SIZE * bp + 2)) & 3; + + /* + * If the top bit is set (i.e. we've got a 4 or 8), flip the bottom to + * reverse their order, making them sorted properly. Then it's a simp= le + * shift to calculate the width. + */ + if ( raw & 2 ) + raw ^=3D 1; + + return 1U << raw; +} + #endif /* _X86_DEBUGREG_H */ diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index 3be02d85f2fe..c89727da43ee 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -323,30 +323,21 @@ static unsigned int check_guest_io_breakpoint(struct = vcpu *v, unsigned int port, unsigned int len) { - unsigned int width, i, match =3D 0; - unsigned long start; + unsigned int i, match =3D 0; =20 if ( !v->arch.pv.dr7_emul || !(v->arch.pv.ctrlreg[4] & X86_CR4_DE) ) return 0; =20 for ( i =3D 0; i < 4; i++ ) { + unsigned long start; + unsigned int width; + if ( !(v->arch.pv.dr7_emul & (3 << (i * DR_ENABLE_SIZE))) ) continue; =20 - start =3D v->arch.dr[i]; - width =3D 0; - - switch ( (v->arch.dr7 >> - (DR_CONTROL_SHIFT + i * DR_CONTROL_SIZE)) & 0xc ) - { - case DR_LEN_1: width =3D 1; break; - case DR_LEN_2: width =3D 2; break; - case DR_LEN_4: width =3D 4; break; - case DR_LEN_8: width =3D 8; break; - } - - start &=3D ~(width - 1UL); + width =3D x86_bp_width(v->arch.dr7, i); + start =3D v->arch.dr[i] & ~(width - 1UL); =20 if ( (start < (port + len)) && ((start + width) > port) ) match |=3D 1u << i; --=20 2.39.2