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Wed, 14 Aug 2024 14:51:03 -0500 From: Jason Andryuk To: Juergen Gross , Boris Ostrovsky , Thomas Gleixner , "Ingo Molnar" , Borislav Petkov , Dave Hansen , , "H. Peter Anvin" , Stefano Stabellini , "Oleksandr Tyshchenko" , Paolo Bonzini , Brian Gerst CC: , , "Jason Andryuk" Subject: [PATCH v2 4/5] x86/kernel: Move page table macros to header Date: Wed, 14 Aug 2024 15:50:52 -0400 Message-ID: <20240814195053.5564-5-jason.andryuk@amd.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240814195053.5564-1-jason.andryuk@amd.com> References: <20240814195053.5564-1-jason.andryuk@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: None (SATLEXMB05.amd.com: jason.andryuk@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044FC:EE_|CY5PR12MB6624:EE_ X-MS-Office365-Filtering-Correlation-Id: a0d3049f-b2fe-4b09-3ddb-08dcbc9a6f70 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|7416014|376014|36860700013|1800799024|921020; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?fzZe6rDlwFXHQtLVjW4ntm4/xf4q6PcJU1WGpb4zVyUBtLtJpNVVvew6x8rU?= =?us-ascii?Q?CPQx5r6hXAIGK4JLlCJKwr48lAOwfWMtUNd3jauikv+c4lji1az7Piqhq7wm?= =?us-ascii?Q?80sM2pJOMQGVkgltchumsHaWIod6+eBH+RRs3Pt4PmSdZ3W7isLj3mAGabWc?= =?us-ascii?Q?hsSv4mEYXuItsdnWnwY1c9eL8I7pGQ/mGHGWYpFMr6SVAkJs9FLR5qNH15f7?= =?us-ascii?Q?9TUak8AtFnZshpb5w1tiULvfTIlI4+MsDd+kJzdYnRLCHHIgG1W/d0bNCIIT?= =?us-ascii?Q?mc7geTsVlqhKN7on07FRYwpXYc4HVHm8XsX1sckwj09qHh+g4sOO5xNS9KXi?= =?us-ascii?Q?ONcH17EkBCG24zkntbgkwl2LTj1rTadvep05DuvJJF2GjFQswwvZQ5CD4SHW?= =?us-ascii?Q?8StgLa+9QgP5eBrH8AhZgns185Og1CbaimId6t8joCY7qTDnXwygiiG0Cf3I?= =?us-ascii?Q?1TCrHA3Flig9ZDIlLs90btBvpmEkLy7DaORVYkO1vYHP/ubXM91llnuYpO+u?= =?us-ascii?Q?RZBLeJbXsT37NQbzGgy51R7ECRA5CU1DgaGkDxi+k2qPee1SlNh80di3xDdU?= =?us-ascii?Q?WWPVsstvpC861xsVm4xbWhijP/XyvNFg2K3Me3rfFnuBikNWBUcbGBKuP9mb?= =?us-ascii?Q?XpB7YPEZtV2wJ7lhym34XH8hqhQYgX/Yhyyo4GiIwd688m9hETOOKzZenOqv?= =?us-ascii?Q?fMaQ6/NGFKPh2zGQ0iGzMaysYsaN5LV67RAoSa7aYTPzmSnURwWf8ZckT+oI?= =?us-ascii?Q?mDnJd4MGJH9fr+7i3i+7EBwj/WgG0WfFQo85o8/5G5OvvN7mqnPl/XjCY5Ja?= =?us-ascii?Q?Q+tlj99EpnzhvkNHnx0pPcrzzHLWOAm7FbeP8WXexPA7Mn11nb3kHA2GPqMb?= =?us-ascii?Q?1KinMjPrPt4krZZMsx+GXEaAw+SKfdeQlXft5sYYhd/qUe+JaExBoJZCcA/p?= =?us-ascii?Q?5Vb6U/3oUmD40q3oDZ0fs+QMAwJOdm7FXMm9knJ9vpP3cvXauu9r3/F+T+3o?= =?us-ascii?Q?NIhh6rLWARemGkny6ouGjIFNYvwFM7dNeeyC/Ou99MApIqzH7vPoDqtWUxOE?= =?us-ascii?Q?7dmvpVlDKleYzyFyIeLIpmsqJ/2awfKZTjRLWeeLNaNWOR6goRA+big2Vr2M?= =?us-ascii?Q?xKcKXo7ZCh2D6W9fNncjVhy6pa2FyoqJb0EdcEtI5B9hmqPnu357f1rH6wHq?= =?us-ascii?Q?YDJhPO44VodbvSS+nKXDhOun2ri5IYAzdYZ+r2NGLagR6JqoyNCAiVi3VZwp?= =?us-ascii?Q?4mKNft7gs+Mp2ybh+Im0WrIji5vGtz8QKe9Cs3BWaHzHmXX7uz4UvY0Qbz9v?= =?us-ascii?Q?KkfAyt2GJSfCdpFQX7rpgzVpvprQtPegpKZtkofs8SVvMdbjnOUrkwUV4pcM?= =?us-ascii?Q?2x9BUbfHUfEvoDHMfueqGLuGlU2e2F5zZaEOH0aLYVXQGmu5jHug0t0pBZ9e?= =?us-ascii?Q?AmXh4Y5vinOt8jvcp/NEGbsRpSrH3S7cymsOGG0eBD3YX1NtcWloKw=3D=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(7416014)(376014)(36860700013)(1800799024)(921020);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Aug 2024 19:51:05.8505 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a0d3049f-b2fe-4b09-3ddb-08dcbc9a6f70 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044FC.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6624 Content-Type: text/plain; charset="utf-8" The PVH entry point will need an additional set of prebuild page tables. Move the macros and defines to pgtable_64.h, so they can be re-used. Signed-off-by: Jason Andryuk Reviewed-by: Juergen Gross --- v2: Use existing pgtable_64.h s/-/ - / in pud_index() Did not add Juergen's R-b in case the header movement matters --- arch/x86/include/asm/pgtable_64.h | 23 ++++++++++++++++++++++- arch/x86/kernel/head_64.S | 20 -------------------- 2 files changed, 22 insertions(+), 21 deletions(-) diff --git a/arch/x86/include/asm/pgtable_64.h b/arch/x86/include/asm/pgtab= le_64.h index 3c4407271d08..72912b8edfdf 100644 --- a/arch/x86/include/asm/pgtable_64.h +++ b/arch/x86/include/asm/pgtable_64.h @@ -271,5 +271,26 @@ static inline bool gup_fast_permitted(unsigned long st= art, unsigned long end) =20 #include =20 -#endif /* !__ASSEMBLY__ */ +#else /* __ASSEMBLY__ */ + +#define l4_index(x) (((x) >> 39) & 511) +#define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD - 1)) + +L4_PAGE_OFFSET =3D l4_index(__PAGE_OFFSET_BASE_L4) +L4_START_KERNEL =3D l4_index(__START_KERNEL_map) + +L3_START_KERNEL =3D pud_index(__START_KERNEL_map) + +#define SYM_DATA_START_PAGE_ALIGNED(name) \ + SYM_START(name, SYM_L_GLOBAL, .balign PAGE_SIZE) + +/* Automate the creation of 1 to 1 mapping pmd entries */ +#define PMDS(START, PERM, COUNT) \ + i =3D 0 ; \ + .rept (COUNT) ; \ + .quad (START) + (i << PMD_SHIFT) + (PERM) ; \ + i =3D i + 1 ; \ + .endr + +#endif /* __ASSEMBLY__ */ #endif /* _ASM_X86_PGTABLE_64_H */ diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S index 330922b328bf..16752b8dfa89 100644 --- a/arch/x86/kernel/head_64.S +++ b/arch/x86/kernel/head_64.S @@ -32,13 +32,6 @@ * We are not able to switch in one step to the final KERNEL ADDRESS SPACE * because we need identity-mapped pages. */ -#define l4_index(x) (((x) >> 39) & 511) -#define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) - -L4_PAGE_OFFSET =3D l4_index(__PAGE_OFFSET_BASE_L4) -L4_START_KERNEL =3D l4_index(__START_KERNEL_map) - -L3_START_KERNEL =3D pud_index(__START_KERNEL_map) =20 __HEAD .code64 @@ -577,9 +570,6 @@ SYM_CODE_START_NOALIGN(vc_no_ghcb) SYM_CODE_END(vc_no_ghcb) #endif =20 -#define SYM_DATA_START_PAGE_ALIGNED(name) \ - SYM_START(name, SYM_L_GLOBAL, .balign PAGE_SIZE) - #ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION /* * Each PGD needs to be 8k long and 8k aligned. We do not @@ -601,14 +591,6 @@ SYM_CODE_END(vc_no_ghcb) #define PTI_USER_PGD_FILL 0 #endif =20 -/* Automate the creation of 1 to 1 mapping pmd entries */ -#define PMDS(START, PERM, COUNT) \ - i =3D 0 ; \ - .rept (COUNT) ; \ - .quad (START) + (i << PMD_SHIFT) + (PERM) ; \ - i =3D i + 1 ; \ - .endr - __INITDATA .balign 4 =20 @@ -708,8 +690,6 @@ SYM_DATA_START_PAGE_ALIGNED(level1_fixmap_pgt) .endr SYM_DATA_END(level1_fixmap_pgt) =20 -#undef PMDS - .data .align 16 =20 --=20 2.34.1