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Thu, 08 Aug 2024 06:42:22 -0700 (PDT) From: Alejandro Vallejo To: Xen-devel Cc: Alejandro Vallejo , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v2 1/2] x86/fpu: Combine fpu_ctxt and xsave_area in arch_vcpu Date: Thu, 8 Aug 2024 14:41:49 +0100 Message-ID: <20240808134150.29927-2-alejandro.vallejo@cloud.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240808134150.29927-1-alejandro.vallejo@cloud.com> References: <20240808134150.29927-1-alejandro.vallejo@cloud.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @cloud.com) X-ZM-MESSAGEID: 1723124567842116600 Content-Type: text/plain; charset="utf-8" fpu_ctxt is either a pointer to the legacy x87/SSE save area (used by FXSAV= E) or a pointer aliased with xsave_area that points to its fpu_sse subfield. Such subfield is at the base and is identical in size and layout to the legacy buffer. This patch merges the 2 pointers in the arch_vcpu into a single XSAVE area.= In the very rare case in which the host doesn't support XSAVE all we're doing = is wasting a tiny amount of memory and trading those for a lot more simplicity= in the code. Signed-off-by: Alejandro Vallejo --- v2: * Added BUILD_BUG_ON(sizeof(x) !=3D sizeof(fpusse_t)) on forceful casts involving fpusse_t. * Reworded comment on top of vcpu_arch->user_regs * Added missing whitespace in x86_emulate/blk.c --- xen/arch/x86/domctl.c | 5 +++- xen/arch/x86/hvm/emulate.c | 4 +-- xen/arch/x86/hvm/hvm.c | 5 +++- xen/arch/x86/i387.c | 45 +++++-------------------------- xen/arch/x86/include/asm/domain.h | 8 +++--- xen/arch/x86/x86_emulate/blk.c | 3 ++- xen/arch/x86/xstate.c | 13 ++++++--- 7 files changed, 32 insertions(+), 51 deletions(-) diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 68b5b46d1a83..bceff6be0ff3 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -1344,7 +1344,10 @@ void arch_get_info_guest(struct vcpu *v, vcpu_guest_= context_u c) #define c(fld) (c.nat->fld) #endif =20 - memcpy(&c.nat->fpu_ctxt, v->arch.fpu_ctxt, sizeof(c.nat->fpu_ctxt)); + memcpy(&c.nat->fpu_ctxt, &v->arch.xsave_area->fpu_sse, + sizeof(c.nat->fpu_ctxt)); + BUILD_BUG_ON(sizeof(c.nat->fpu_ctxt) !=3D sizeof(fpusse_t)); + if ( is_pv_domain(d) ) c(flags =3D v->arch.pv.vgc_flags & ~(VGCF_i387_valid|VGCF_in_kerne= l)); else diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c index feb4792cc567..03020542c3ba 100644 --- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -2363,7 +2363,7 @@ static int cf_check hvmemul_get_fpu( alternative_vcall(hvm_funcs.fpu_dirty_intercept); else if ( type =3D=3D X86EMUL_FPU_fpu ) { - const fpusse_t *fpu_ctxt =3D curr->arch.fpu_ctxt; + const fpusse_t *fpu_ctxt =3D &curr->arch.xsave_area->fpu_sse; =20 /* * Latch current register state so that we can back out changes @@ -2403,7 +2403,7 @@ static void cf_check hvmemul_put_fpu( =20 if ( aux ) { - fpusse_t *fpu_ctxt =3D curr->arch.fpu_ctxt; + fpusse_t *fpu_ctxt =3D &curr->arch.xsave_area->fpu_sse; bool dval =3D aux->dval; int mode =3D hvm_guest_x86_mode(curr); =20 diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index f49e29faf753..6607dba562a4 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -916,7 +916,10 @@ static int cf_check hvm_save_cpu_ctxt(struct vcpu *v, = hvm_domain_context_t *h) =20 if ( v->fpu_initialised ) { - memcpy(ctxt.fpu_regs, v->arch.fpu_ctxt, sizeof(ctxt.fpu_regs)); + memcpy(ctxt.fpu_regs, &v->arch.xsave_area->fpu_sse, + sizeof(ctxt.fpu_regs)); + BUILD_BUG_ON(sizeof(ctxt.fpu_regs) !=3D sizeof(fpusse_t)); + ctxt.flags =3D XEN_X86_FPU_INITIALISED; } =20 diff --git a/xen/arch/x86/i387.c b/xen/arch/x86/i387.c index 134e0bece519..fbb9d3584a3d 100644 --- a/xen/arch/x86/i387.c +++ b/xen/arch/x86/i387.c @@ -39,7 +39,7 @@ static inline void fpu_xrstor(struct vcpu *v, uint64_t ma= sk) /* Restore x87 FPU, MMX, SSE and SSE2 state */ static inline void fpu_fxrstor(struct vcpu *v) { - const fpusse_t *fpu_ctxt =3D v->arch.fpu_ctxt; + const fpusse_t *fpu_ctxt =3D &v->arch.xsave_area->fpu_sse; =20 /* * Some CPUs don't save/restore FDP/FIP/FOP unless an exception @@ -151,7 +151,7 @@ static inline void fpu_xsave(struct vcpu *v) /* Save x87 FPU, MMX, SSE and SSE2 state */ static inline void fpu_fxsave(struct vcpu *v) { - fpusse_t *fpu_ctxt =3D v->arch.fpu_ctxt; + fpusse_t *fpu_ctxt =3D &v->arch.xsave_area->fpu_sse; unsigned int fip_width =3D v->domain->arch.x87_fip_width; =20 if ( fip_width !=3D 4 ) @@ -212,7 +212,7 @@ void vcpu_restore_fpu_nonlazy(struct vcpu *v, bool need= _stts) * above) we also need to restore full state, to prevent subsequently * saving state belonging to another vCPU. */ - if ( v->arch.fully_eager_fpu || (v->arch.xsave_area && xstate_all(v)) ) + if ( v->arch.fully_eager_fpu || xstate_all(v) ) { if ( cpu_has_xsave ) fpu_xrstor(v, XSTATE_ALL); @@ -299,44 +299,14 @@ void save_fpu_enable(void) /* Initialize FPU's context save area */ int vcpu_init_fpu(struct vcpu *v) { - int rc; - v->arch.fully_eager_fpu =3D opt_eager_fpu; - - if ( (rc =3D xstate_alloc_save_area(v)) !=3D 0 ) - return rc; - - if ( v->arch.xsave_area ) - v->arch.fpu_ctxt =3D &v->arch.xsave_area->fpu_sse; - else - { - BUILD_BUG_ON(__alignof(v->arch.xsave_area->fpu_sse) < 16); - v->arch.fpu_ctxt =3D _xzalloc(sizeof(v->arch.xsave_area->fpu_sse), - __alignof(v->arch.xsave_area->fpu_sse)= ); - if ( v->arch.fpu_ctxt ) - { - fpusse_t *fpu_sse =3D v->arch.fpu_ctxt; - - fpu_sse->fcw =3D FCW_DEFAULT; - fpu_sse->mxcsr =3D MXCSR_DEFAULT; - } - else - rc =3D -ENOMEM; - } - - return rc; + return xstate_alloc_save_area(v); } =20 void vcpu_setup_fpu(struct vcpu *v, struct xsave_struct *xsave_area, const void *data, unsigned int fcw_default) { - /* - * For the entire function please note that vcpu_init_fpu() (above) po= ints - * v->arch.fpu_ctxt into v->arch.xsave_area when XSAVE is available. H= ence - * accesses through both pointers alias one another, and the shorter f= orm - * is used here. - */ - fpusse_t *fpu_sse =3D v->arch.fpu_ctxt; + fpusse_t *fpu_sse =3D &v->arch.xsave_area->fpu_sse; =20 ASSERT(!xsave_area || xsave_area =3D=3D v->arch.xsave_area); =20 @@ -373,10 +343,7 @@ void vcpu_setup_fpu(struct vcpu *v, struct xsave_struc= t *xsave_area, /* Free FPU's context save area */ void vcpu_destroy_fpu(struct vcpu *v) { - if ( v->arch.xsave_area ) - xstate_free_save_area(v); - else - xfree(v->arch.fpu_ctxt); + xstate_free_save_area(v); } =20 /* diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/d= omain.h index bca3258d69ac..3da60af2a44a 100644 --- a/xen/arch/x86/include/asm/domain.h +++ b/xen/arch/x86/include/asm/domain.h @@ -592,11 +592,11 @@ struct pv_vcpu struct arch_vcpu { /* - * guest context (mirroring struct vcpu_guest_context) common - * between pv and hvm guests + * Guest context common between PV and HVM guests. Includes general pu= rpose + * registers, segment registers and other parts of the exception frame. + * + * It doesn't contain FPU state, as that lives in xsave_area instead. */ - - void *fpu_ctxt; struct cpu_user_regs user_regs; =20 /* Debug registers. */ diff --git a/xen/arch/x86/x86_emulate/blk.c b/xen/arch/x86/x86_emulate/blk.c index e790f4f90056..28b54f26fe29 100644 --- a/xen/arch/x86/x86_emulate/blk.c +++ b/xen/arch/x86/x86_emulate/blk.c @@ -11,7 +11,8 @@ !defined(X86EMUL_NO_SIMD) # ifdef __XEN__ # include -# define FXSAVE_AREA current->arch.fpu_ctxt +# define FXSAVE_AREA ((struct x86_fxsr *) \ + (void *)¤t->arch.xsave_area->fpu_sse) # else # define FXSAVE_AREA get_fpu_save_area() # endif diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c index 5c4144d55e89..850ee31bd18c 100644 --- a/xen/arch/x86/xstate.c +++ b/xen/arch/x86/xstate.c @@ -507,9 +507,16 @@ int xstate_alloc_save_area(struct vcpu *v) unsigned int size; =20 if ( !cpu_has_xsave ) - return 0; - - if ( !is_idle_vcpu(v) || !cpu_has_xsavec ) + { + /* + * This is bigger than FXSAVE_SIZE by 64 bytes, but it helps treat= ing + * the FPU state uniformly as an XSAVE buffer even if XSAVE is not + * available in the host. Note the alignment restriction of the XS= AVE + * area are stricter than those of the FXSAVE area. + */ + size =3D XSTATE_AREA_MIN_SIZE; + } + else if ( !is_idle_vcpu(v) || !cpu_has_xsavec ) { size =3D xsave_cntxt_size; BUG_ON(size < XSTATE_AREA_MIN_SIZE); --=20 2.45.2