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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Aug 2024 12:14:59.3987 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7474f087-44d5-4db6-03cf-08dcb2ecbada X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000075ED.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB7490 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1722600923884116600 Content-Type: text/plain; charset="utf-8" This is in continuation to commit f661a20aa880: "Extract MMU-specific MM code". update_identity_mapping() is defined for MMU specific logic. It is invoked from smpboot.c. Thus, we add an empty stub to avoid if-defery. Signed-off-by: Ayan Kumar Halder --- xen/arch/arm/include/asm/arm64/mm.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/xen/arch/arm/include/asm/arm64/mm.h b/xen/arch/arm/include/asm= /arm64/mm.h index e0bd23a6ed..f595205fa3 100644 --- a/xen/arch/arm/include/asm/arm64/mm.h +++ b/xen/arch/arm/include/asm/arm64/mm.h @@ -14,6 +14,7 @@ static inline bool arch_mfns_in_directmap(unsigned long m= fn, unsigned long nr) =20 void arch_setup_page_tables(void); =20 +#ifdef CONFIG_MMU /* * Enable/disable the identity mapping in the live page-tables (i.e. * the one pointed by TTBR_EL2). @@ -22,6 +23,11 @@ void arch_setup_page_tables(void); * supported. */ void update_identity_mapping(bool enable); +#else /* CONFIG_MMU */ +static inline void update_identity_mapping(bool enable) +{ +} +#endif /* CONFIG_MMU */ =20 #endif /* __ARM_ARM64_MM_H__ */ =20 --=20 2.25.1 From nobody Thu Nov 21 19:29:40 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; 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bh=rcvevutIA8wF3Pys0d5aki/QrgNfXYtD6SWLs8zRKls=; b=Vyj+iQVOPo/EgVYaK1RF0sf++A6GxKxq+5zhg3p8MWl0JwvdLRzpHFYFR4jd68O3RFc6swodpoDM6KuzpO63LzViKD4aVEQVIRojUzLk+fJDMNj8IKLvzrhyz+ZnBJkwlvpBpQc/qUSc4w/BDwN5GKBsoFXJ+OOYraQBqindlN8= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C From: Ayan Kumar Halder To: , , , , , CC: , Penny Zheng , "Wei Chen" Subject: [PATCH v1 2/4] xen: arm: make VMAP only support in MMU system Date: Fri, 2 Aug 2024 13:14:41 +0100 Message-ID: <20240802121443.1531693-3-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240802121443.1531693-1-ayan.kumar.halder@amd.com> References: <20240802121443.1531693-1-ayan.kumar.halder@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: None (SATLEXMB03.amd.com: ayan.kumar.halder@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9CF:EE_|PH0PR12MB7485:EE_ X-MS-Office365-Filtering-Correlation-Id: 35ae0cc8-dca4-4418-a24e-08dcb2ecbcd5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700013|82310400026|376014; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?GFXWBsM7TeZL3KJ6/PAvM3bzy4UIo8R7A1yMUPyi1MhFPdvxRCO4etI0haQI?= =?us-ascii?Q?R4bSLXAUYy1Lc4WGDoVUJfq/A1BNLylRUYFTocYL7jWwqC71BoSK83iYHdS3?= =?us-ascii?Q?y8eFuO7J7/YKVIt+OLU8PxKoUhntEmKLVVLiscZ38Dh4giooT7RZT9AttzlN?= =?us-ascii?Q?benvv1lTR5rK4APKSYeLaQxLmXFNN4yjwjKYh72Nm/u2C8QVqG0QhtGX6iKW?= =?us-ascii?Q?iYxzOcM7LpD2R2PFWJw0FqKtV62+uPswx0Xc3RBFXZ6lzIZ1uPcS6thnuQ0l?= =?us-ascii?Q?H4aXnZ5i8eGYHcQMLJiU8BUQv6FcomkD/vc28sMfCScvEQOcQj7D4UZTKpNI?= =?us-ascii?Q?+colwOfBCoGTBx6f/srbY4Gh1vpxlZZpjh1GyvMGv79zOSmRFBugIZaihCHj?= =?us-ascii?Q?I1IXu6zObTwWBCXpQo7oKdF10THJ10VQ73LUy8T8qWnTSjPPgG96pea5OJKY?= =?us-ascii?Q?3BHjczxTT+F14maOamTRW+R6XS2hGPbO9APlh+bCJcwcj586uGSkRvqeQ22I?= =?us-ascii?Q?TyTQv2HUili/djqz6Vw1Ou1utXEOQ8tiOg7hkwUwcVW23zJ12p0ZSm7nU7AZ?= =?us-ascii?Q?3ZKPxVw2a/kadj8Vbv6MLFBruDS3AosOPJ/f7eSlzqEGhfg8qQR15/kw2xch?= =?us-ascii?Q?RR6WlpqfGcMLjdd4Br2nxmTrFLKIsC/3djiGwKaNDbWcJgsecwjLxf08d4A0?= =?us-ascii?Q?VBYLbeMX0BopUPwfeyA6J1hIbLgjJQX3K+SLvQMw6L2znDysLUcP7a6ZtrvH?= =?us-ascii?Q?CDWT0D4MpzWQKapgWKya3dXEfkeiiJO4wSOlGrUcrsvk76aLzlQpl2C27dwM?= =?us-ascii?Q?35qWrUSwMzFkf09XJtZsbeKOpbJ86TPuM48pk2Gbks82Gvd1Iv2/OI2dHAuf?= =?us-ascii?Q?MlWuEznx2WluZnDLbYW7o6CZMgu1tSThZ0t+NBGZPuMHo/dL9tA7Z73rz/c1?= =?us-ascii?Q?mJML+223stvz+CGt1ETNnSXHmXsK37fI3frpfBlrm73h01m2UtKi66TOdALI?= =?us-ascii?Q?7diC0dizI1UlqtL/EmJTXJENfbHYs7gm5ThSXLbjC1+b2Wa7rr2+zti+3eG6?= =?us-ascii?Q?M1tl/S7vmCV2a3uCMbQSTsCRzv90qSpsGaGqgGyjdgDpbs69Sf18dVtDGwEe?= =?us-ascii?Q?+Y1Psf9zISm/txWB5aqcafTzAsE1VXGDXLZ+48eI3HCICkJ4QtlsMQmhAL1O?= =?us-ascii?Q?mR1JGsxm24HXySyTo2CNPl1lA4MnjveMlJlfU8gopK/ufgp+8D28eD6WmFPg?= =?us-ascii?Q?e2Chcm8VM5aVuRYupggh0NH/Uv+Bpqmo/iShrCOpqLbhB6mtixIBwkFBaS6Z?= =?us-ascii?Q?f01fFsQrVi62hWUb+qa9nKCVKDBF+OyURIrYJrXYxmu90SMQTvLYSld5p2xy?= =?us-ascii?Q?udb1xxtzFgosx5eUzBxrYRacltFrHrUP3kXy2dHAmDRR14vsfg=3D=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(36860700013)(82310400026)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Aug 2024 12:15:02.8036 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 35ae0cc8-dca4-4418-a24e-08dcb2ecbcd5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9CF.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB7485 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1722600931681116600 Content-Type: text/plain; charset="utf-8" From: Penny Zheng VMAP is widely used in ALTERNATIVE feature, CPUERRATA feature, etc to remap a range of memory with new memory attributes. Since this is highly dependent on virtual address translation, we choose to fold VMAP in MMU system. In this patch, we introduce a new Kconfig CONFIG_HAS_VMAP, and make it only support in MMU system on ARM architecture. And we make features like ALTERNATIVE, CPUERRATA, etc, now depend on VMAP. Split "https://patchwork.kernel.org/project/xen-devel/patch/20230626033443.= 2943270-16-Penny.Zheng@arm.com/" into Arm specific Signed-off-by: Penny Zheng Signed-off-by: Wei Chen Signed-off-by: Ayan Kumar Halder --- xen/arch/arm/Kconfig | 6 +++++- xen/arch/arm/Makefile | 2 +- xen/arch/arm/setup.c | 4 ++++ xen/arch/arm/smpboot.c | 2 ++ xen/include/xen/vmap.h | 6 ++++++ 5 files changed, 18 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index 21d03d9f44..c8d417298c 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -12,7 +12,7 @@ config ARM_64 config ARM def_bool y select FUNCTION_ALIGNMENT_4B - select HAS_ALTERNATIVE + select HAS_ALTERNATIVE if HAS_VMAP select HAS_DEVICE_TREE select HAS_PASSTHROUGH select HAS_UBSAN @@ -58,9 +58,13 @@ config PADDR_BITS default 40 if ARM_PA_BITS_40 default 48 if ARM_64 =20 +config HAS_VMAP + def_bool y + config MMU def_bool y select HAS_PMAP + select HAS_VMAP =20 source "arch/Kconfig" =20 diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile index 45dc29ea53..6882814d38 100644 --- a/xen/arch/arm/Makefile +++ b/xen/arch/arm/Makefile @@ -11,7 +11,7 @@ obj-$(CONFIG_HAS_VPCI) +=3D vpci.o =20 obj-$(CONFIG_HAS_ALTERNATIVE) +=3D alternative.o obj-y +=3D bootfdt.init.o -obj-y +=3D cpuerrata.o +obj-$(CONFIG_HAS_VMAP) +=3D cpuerrata.o obj-y +=3D cpufeature.o obj-y +=3D decode.o obj-y +=3D device.o diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c index 0c2fdaceaf..9d34ac7f64 100644 --- a/xen/arch/arm/setup.c +++ b/xen/arch/arm/setup.c @@ -804,11 +804,13 @@ void asmlinkage __init start_xen(unsigned long boot_p= hys_offset, nr_cpu_ids =3D smp_get_max_cpus(); printk(XENLOG_INFO "SMP: Allowing %u CPUs\n", nr_cpu_ids); =20 +#ifdef CONFIG_HAS_VMAP /* * Some errata relies on SMCCC version which is detected by psci_init() * (called from smp_init_cpus()). */ check_local_cpu_errata(); +#endif =20 check_local_cpu_features(); =20 @@ -879,8 +881,10 @@ void asmlinkage __init start_xen(unsigned long boot_ph= ys_offset, * It needs to be called after do_initcalls to be able to use * stop_machine (tasklets initialized via an initcall). */ +#ifdef CONFIG_HAS_VMAP apply_alternatives_all(); enable_errata_workarounds(); +#endif enable_cpu_features(); =20 /* Create initial domain 0. */ diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c index 04e363088d..999afc028e 100644 --- a/xen/arch/arm/smpboot.c +++ b/xen/arch/arm/smpboot.c @@ -406,7 +406,9 @@ void asmlinkage start_secondary(void) =20 local_abort_enable(); =20 +#ifdef CONFIG_HAS_VMAP check_local_cpu_errata(); +#endif check_local_cpu_features(); =20 printk(XENLOG_DEBUG "CPU %u booted.\n", smp_processor_id()); diff --git a/xen/include/xen/vmap.h b/xen/include/xen/vmap.h index fdae37e950..84797acfc0 100644 --- a/xen/include/xen/vmap.h +++ b/xen/include/xen/vmap.h @@ -138,10 +138,16 @@ static inline void iounmap(void __iomem *va) /* Pointer to 1 octet past the end of the VMAP_DEFAULT virtual area */ void *arch_vmap_virt_end(void); =20 +#ifdef CONFIG_MMU /* Initialises the VMAP_DEFAULT virtual range */ static inline void vm_init(void) { vm_init_type(VMAP_DEFAULT, (void *)VMAP_VIRT_START, arch_vmap_virt_end= ()); } +#else +static inline void vm_init(void) +{ +} +#endif =20 #endif /* __XEN_VMAP_H__ */ --=20 2.25.1 From nobody Thu Nov 21 19:29:40 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1 dmarc=pass fromdomain=amd.com); dmarc=pass(p=quarantine dis=none) header.from=amd.com ARC-Seal: i=2; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Aug 2024 12:15:07.3987 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 02ff3655-c8a5-47f4-54a3-08dcb2ecbf9c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000075ED.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB8137 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1722600931724116600 Content-Type: text/plain; charset="utf-8" Moved init_domheap_mappings(), map_domain_page_global(), unmap_domain_page_global(), map_domain_page(), unmap_domain_page(), domain_page_map_to_mfn() to MMU specific folder. On the top level, we have added stubs which will invoke the MMU specific equivalent of these functions. Signed-off-by: Ayan Kumar Halder --- xen/arch/arm/domain_page.c | 161 +---------------------- xen/arch/arm/include/asm/arm32/mm.h | 12 ++ xen/arch/arm/mmu/Makefile | 1 + xen/arch/arm/mmu/domain_page.c | 194 ++++++++++++++++++++++++++++ 4 files changed, 213 insertions(+), 155 deletions(-) create mode 100644 xen/arch/arm/mmu/domain_page.c diff --git a/xen/arch/arm/domain_page.c b/xen/arch/arm/domain_page.c index 3a43601623..49fe551d84 100644 --- a/xen/arch/arm/domain_page.c +++ b/xen/arch/arm/domain_page.c @@ -3,185 +3,36 @@ #include #include =20 -/* Override macros from asm/page.h to make them work with mfn_t */ -#undef virt_to_mfn -#define virt_to_mfn(va) _mfn(__virt_to_mfn(va)) - -/* cpu0's domheap page tables */ -static DEFINE_PAGE_TABLES(cpu0_dommap, DOMHEAP_SECOND_PAGES); - -/* - * xen_dommap =3D=3D pages used by map_domain_page, these pages contain - * the second level pagetables which map the domheap region - * starting at DOMHEAP_VIRT_START in 2MB chunks. - */ -static DEFINE_PER_CPU(lpae_t *, xen_dommap); - -/* - * Prepare the area that will be used to map domheap pages. They are - * mapped in 2MB chunks, so we need to allocate the page-tables up to - * the 2nd level. - * - * The caller should make sure the root page-table for @cpu has been - * allocated. - */ bool init_domheap_mappings(unsigned int cpu) { - unsigned int order =3D get_order_from_pages(DOMHEAP_SECOND_PAGES); - lpae_t *root =3D per_cpu(xen_pgtable, cpu); - unsigned int i, first_idx; - lpae_t *domheap; - mfn_t mfn; - - ASSERT(root); - ASSERT(!per_cpu(xen_dommap, cpu)); - - /* - * The domheap for cpu0 is initialized before the heap is initialized. - * So we need to use pre-allocated pages. - */ - if ( !cpu ) - domheap =3D cpu0_dommap; - else - domheap =3D alloc_xenheap_pages(order, 0); - - if ( !domheap ) - return false; - - /* Ensure the domheap has no stray mappings */ - memset(domheap, 0, DOMHEAP_SECOND_PAGES * PAGE_SIZE); - - /* - * Update the first level mapping to reference the local CPUs - * domheap mapping pages. - */ - mfn =3D virt_to_mfn(domheap); - first_idx =3D first_table_offset(DOMHEAP_VIRT_START); - for ( i =3D 0; i < DOMHEAP_SECOND_PAGES; i++ ) - { - lpae_t pte =3D mfn_to_xen_entry(mfn_add(mfn, i), MT_NORMAL); - pte.pt.table =3D 1; - write_pte(&root[first_idx + i], pte); - } - - per_cpu(xen_dommap, cpu) =3D domheap; - - return true; + return init_domheap_mappings_mm(cpu); } =20 void *map_domain_page_global(mfn_t mfn) { - return vmap(&mfn, 1); + return map_domain_page_global_mm(mfn); } =20 void unmap_domain_page_global(const void *ptr) { - vunmap(ptr); + return unmap_domain_page_global_mm(ptr); } =20 /* Map a page of domheap memory */ void *map_domain_page(mfn_t mfn) { - unsigned long flags; - lpae_t *map =3D this_cpu(xen_dommap); - unsigned long slot_mfn =3D mfn_x(mfn) & ~XEN_PT_LPAE_ENTRY_MASK; - vaddr_t va; - lpae_t pte; - int i, slot; - - local_irq_save(flags); - - /* The map is laid out as an open-addressed hash table where each - * entry is a 2MB superpage pte. We use the available bits of each - * PTE as a reference count; when the refcount is zero the slot can - * be reused. */ - for ( slot =3D (slot_mfn >> XEN_PT_LPAE_SHIFT) % DOMHEAP_ENTRIES, i = =3D 0; - i < DOMHEAP_ENTRIES; - slot =3D (slot + 1) % DOMHEAP_ENTRIES, i++ ) - { - if ( map[slot].pt.avail < 0xf && - map[slot].pt.base =3D=3D slot_mfn && - map[slot].pt.valid ) - { - /* This slot already points to the right place; reuse it */ - map[slot].pt.avail++; - break; - } - else if ( map[slot].pt.avail =3D=3D 0 ) - { - /* Commandeer this 2MB slot */ - pte =3D mfn_to_xen_entry(_mfn(slot_mfn), MT_NORMAL); - pte.pt.avail =3D 1; - write_pte(map + slot, pte); - break; - } - - } - /* If the map fills up, the callers have misbehaved. */ - BUG_ON(i =3D=3D DOMHEAP_ENTRIES); - -#ifndef NDEBUG - /* Searching the hash could get slow if the map starts filling up. - * Cross that bridge when we come to it */ - { - static int max_tries =3D 32; - if ( i >=3D max_tries ) - { - dprintk(XENLOG_WARNING, "Domheap map is filling: %i tries\n", = i); - max_tries *=3D 2; - } - } -#endif - - local_irq_restore(flags); - - va =3D (DOMHEAP_VIRT_START - + (slot << SECOND_SHIFT) - + ((mfn_x(mfn) & XEN_PT_LPAE_ENTRY_MASK) << THIRD_SHIFT)); - - /* - * We may not have flushed this specific subpage at map time, - * since we only flush the 4k page not the superpage - */ - flush_xen_tlb_range_va_local(va, PAGE_SIZE); - - return (void *)va; + return map_domain_page_mm(mfn); } =20 /* Release a mapping taken with map_domain_page() */ void unmap_domain_page(const void *ptr) { - unsigned long flags; - lpae_t *map =3D this_cpu(xen_dommap); - int slot =3D ((unsigned long)ptr - DOMHEAP_VIRT_START) >> SECOND_SHIFT; - - if ( !ptr ) - return; - - local_irq_save(flags); - - ASSERT(slot >=3D 0 && slot < DOMHEAP_ENTRIES); - ASSERT(map[slot].pt.avail !=3D 0); - - map[slot].pt.avail--; - - local_irq_restore(flags); + return unmap_domain_page_mm(ptr); } =20 mfn_t domain_page_map_to_mfn(const void *ptr) { - unsigned long va =3D (unsigned long)ptr; - lpae_t *map =3D this_cpu(xen_dommap); - int slot =3D (va - DOMHEAP_VIRT_START) >> SECOND_SHIFT; - unsigned long offset =3D (va>>THIRD_SHIFT) & XEN_PT_LPAE_ENTRY_MASK; - - if ( (va >=3D VMAP_VIRT_START) && ((va - VMAP_VIRT_START) < VMAP_VIRT_= SIZE) ) - return virt_to_mfn(va); - - ASSERT(slot >=3D 0 && slot < DOMHEAP_ENTRIES); - ASSERT(map[slot].pt.avail !=3D 0); - - return mfn_add(lpae_get_mfn(map[slot]), offset); + return domain_page_map_to_mfn_mm(ptr); } =20 /* diff --git a/xen/arch/arm/include/asm/arm32/mm.h b/xen/arch/arm/include/asm= /arm32/mm.h index 856f2dbec4..7cee031f52 100644 --- a/xen/arch/arm/include/asm/arm32/mm.h +++ b/xen/arch/arm/include/asm/arm32/mm.h @@ -18,6 +18,18 @@ static inline bool arch_mfns_in_directmap(unsigned long = mfn, unsigned long nr) =20 bool init_domheap_mappings(unsigned int cpu); =20 +bool init_domheap_mappings_mm(unsigned int cpu); + +void *map_domain_page_global_mm(mfn_t mfn); + +void unmap_domain_page_global_mm(const void *ptr); + +void *map_domain_page_mm(mfn_t mfn); + +void unmap_domain_page_mm(const void *ptr); + +mfn_t domain_page_map_to_mfn_mm(const void *ptr); + static inline void arch_setup_page_tables(void) { } diff --git a/xen/arch/arm/mmu/Makefile b/xen/arch/arm/mmu/Makefile index 67475fcd80..2cb44b857d 100644 --- a/xen/arch/arm/mmu/Makefile +++ b/xen/arch/arm/mmu/Makefile @@ -2,3 +2,4 @@ obj-y +=3D p2m.o obj-y +=3D pt.o obj-y +=3D setup.o obj-y +=3D smpboot.o +obj-$(CONFIG_ARCH_MAP_DOMAIN_PAGE) +=3D domain_page.o diff --git a/xen/arch/arm/mmu/domain_page.c b/xen/arch/arm/mmu/domain_page.c new file mode 100644 index 0000000000..af45748ace --- /dev/null +++ b/xen/arch/arm/mmu/domain_page.c @@ -0,0 +1,194 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#include +#include +#include + +/* Override macros from asm/page.h to make them work with mfn_t */ +#undef virt_to_mfn +#define virt_to_mfn(va) _mfn(__virt_to_mfn(va)) + +/* cpu0's domheap page tables */ +static DEFINE_PAGE_TABLES(cpu0_dommap, DOMHEAP_SECOND_PAGES); + +/* + * xen_dommap =3D=3D pages used by map_domain_page, these pages contain + * the second level pagetables which map the domheap region + * starting at DOMHEAP_VIRT_START in 2MB chunks. + */ +static DEFINE_PER_CPU(lpae_t *, xen_dommap); + +/* + * Prepare the area that will be used to map domheap pages. They are + * mapped in 2MB chunks, so we need to allocate the page-tables up to + * the 2nd level. + * + * The caller should make sure the root page-table for @cpu has been + * allocated. + */ +bool init_domheap_mappings_mm(unsigned int cpu) +{ + unsigned int order =3D get_order_from_pages(DOMHEAP_SECOND_PAGES); + lpae_t *root =3D per_cpu(xen_pgtable, cpu); + unsigned int i, first_idx; + lpae_t *domheap; + mfn_t mfn; + + ASSERT(root); + ASSERT(!per_cpu(xen_dommap, cpu)); + + /* + * The domheap for cpu0 is initialized before the heap is initialized. + * So we need to use pre-allocated pages. + */ + if ( !cpu ) + domheap =3D cpu0_dommap; + else + domheap =3D alloc_xenheap_pages(order, 0); + + if ( !domheap ) + return false; + + /* Ensure the domheap has no stray mappings */ + memset(domheap, 0, DOMHEAP_SECOND_PAGES * PAGE_SIZE); + + /* + * Update the first level mapping to reference the local CPUs + * domheap mapping pages. + */ + mfn =3D virt_to_mfn(domheap); + first_idx =3D first_table_offset(DOMHEAP_VIRT_START); + for ( i =3D 0; i < DOMHEAP_SECOND_PAGES; i++ ) + { + lpae_t pte =3D mfn_to_xen_entry(mfn_add(mfn, i), MT_NORMAL); + pte.pt.table =3D 1; + write_pte(&root[first_idx + i], pte); + } + + per_cpu(xen_dommap, cpu) =3D domheap; + + return true; +} + +void *map_domain_page_global_mm(mfn_t mfn) +{ + return vmap(&mfn, 1); +} + +void unmap_domain_page_global_mm(const void *ptr) +{ + vunmap(ptr); +} + +/* Map a page of domheap memory */ +void *map_domain_page_mm(mfn_t mfn) +{ + unsigned long flags; + lpae_t *map =3D this_cpu(xen_dommap); + unsigned long slot_mfn =3D mfn_x(mfn) & ~XEN_PT_LPAE_ENTRY_MASK; + vaddr_t va; + lpae_t pte; + int i, slot; + + local_irq_save(flags); + + /* The map is laid out as an open-addressed hash table where each + * entry is a 2MB superpage pte. We use the available bits of each + * PTE as a reference count; when the refcount is zero the slot can + * be reused. */ + for ( slot =3D (slot_mfn >> XEN_PT_LPAE_SHIFT) % DOMHEAP_ENTRIES, i = =3D 0; + i < DOMHEAP_ENTRIES; + slot =3D (slot + 1) % DOMHEAP_ENTRIES, i++ ) + { + if ( map[slot].pt.avail < 0xf && + map[slot].pt.base =3D=3D slot_mfn && + map[slot].pt.valid ) + { + /* This slot already points to the right place; reuse it */ + map[slot].pt.avail++; + break; + } + else if ( map[slot].pt.avail =3D=3D 0 ) + { + /* Commandeer this 2MB slot */ + pte =3D mfn_to_xen_entry(_mfn(slot_mfn), MT_NORMAL); + pte.pt.avail =3D 1; + write_pte(map + slot, pte); + break; + } + + } + /* If the map fills up, the callers have misbehaved. */ + BUG_ON(i =3D=3D DOMHEAP_ENTRIES); + +#ifndef NDEBUG + /* Searching the hash could get slow if the map starts filling up. + * Cross that bridge when we come to it */ + { + static int max_tries =3D 32; + if ( i >=3D max_tries ) + { + dprintk(XENLOG_WARNING, "Domheap map is filling: %i tries\n", = i); + max_tries *=3D 2; + } + } +#endif + + local_irq_restore(flags); + + va =3D (DOMHEAP_VIRT_START + + (slot << SECOND_SHIFT) + + ((mfn_x(mfn) & XEN_PT_LPAE_ENTRY_MASK) << THIRD_SHIFT)); + + /* + * We may not have flushed this specific subpage at map time, + * since we only flush the 4k page not the superpage + */ + flush_xen_tlb_range_va_local(va, PAGE_SIZE); + + return (void *)va; +} + +/* Release a mapping taken with map_domain_page() */ +void unmap_domain_page_mm(const void *ptr) +{ + unsigned long flags; + lpae_t *map =3D this_cpu(xen_dommap); + int slot =3D ((unsigned long)ptr - DOMHEAP_VIRT_START) >> SECOND_SHIFT; + + if ( !ptr ) + return; + + local_irq_save(flags); + + ASSERT(slot >=3D 0 && slot < DOMHEAP_ENTRIES); + ASSERT(map[slot].pt.avail !=3D 0); + + map[slot].pt.avail--; + + local_irq_restore(flags); +} + +mfn_t domain_page_map_to_mfn_mm(const void *ptr) +{ + unsigned long va =3D (unsigned long)ptr; + lpae_t *map =3D this_cpu(xen_dommap); + int slot =3D (va - DOMHEAP_VIRT_START) >> SECOND_SHIFT; + unsigned long offset =3D (va>>THIRD_SHIFT) & XEN_PT_LPAE_ENTRY_MASK; + + if ( (va >=3D VMAP_VIRT_START) && ((va - VMAP_VIRT_START) < VMAP_VIRT_= SIZE) ) + return virt_to_mfn(va); + + ASSERT(slot >=3D 0 && slot < DOMHEAP_ENTRIES); + ASSERT(map[slot].pt.avail !=3D 0); + + return mfn_add(lpae_get_mfn(map[slot]), offset); +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ --=20 2.25.1 From nobody Thu Nov 21 19:29:40 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1 dmarc=pass fromdomain=amd.com); dmarc=pass(p=quarantine dis=none) header.from=amd.com ARC-Seal: i=2; a=rsa-sha256; t=1722600938; cv=pass; d=zohomail.com; s=zohoarc; b=MPh85iDJH0n0IN8aqr3Y39lERMifGGwZFq77GT5xCe4RjicTooYbo5KpX9zvsNqLa7Zquy+oELBvuN13SXjykusCkNCZwHKay+4ETK6gWfU8uBhYto2PWTQzcvB8cEUXTbXAvbPxa/bMHGTfzGE+DBy1R9IFDjgQInQ9DP87f4A= ARC-Message-Signature: i=2; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Aug 2024 12:15:11.9612 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 61979d1a-0a7f-4ef2-82d2-08dcb2ecc254 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000075ED.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB8096 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1722600939678116600 Content-Type: text/plain; charset="utf-8" All the EL2 MMU specific registers are enclosed within CONFIG_MMU. Signed-off-by: Ayan Kumar Halder --- xen/arch/arm/traps.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index aac6c599f8..766aacee77 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -919,12 +919,14 @@ static void _show_registers(const struct cpu_user_reg= s *regs, #endif } printk(" VTCR_EL2: %"PRIregister"\n", READ_SYSREG(VTCR_EL2)); - printk(" VTTBR_EL2: %016"PRIx64"\n", ctxt->vttbr_el2); printk("\n"); =20 printk(" SCTLR_EL2: %"PRIregister"\n", READ_SYSREG(SCTLR_EL2)); printk(" HCR_EL2: %"PRIregister"\n", READ_SYSREG(HCR_EL2)); +#ifdef CONFIG_MMU + printk(" VTTBR_EL2: %016"PRIx64"\n", ctxt->vttbr_el2); printk(" TTBR0_EL2: %016"PRIx64"\n", READ_SYSREG64(TTBR0_EL2)); +#endif printk("\n"); printk(" ESR_EL2: %"PRIregister"\n", regs->hsr); printk(" HPFAR_EL2: %"PRIregister"\n", READ_SYSREG(HPFAR_EL2)); @@ -956,7 +958,9 @@ void show_registers(const struct cpu_user_regs *regs) if ( guest_mode(regs) && is_32bit_domain(current->domain) ) ctxt.ifsr32_el2 =3D READ_SYSREG(IFSR32_EL2); #endif +#ifdef CONFIG_MMU ctxt.vttbr_el2 =3D READ_SYSREG64(VTTBR_EL2); +#endif =20 _show_registers(regs, &ctxt, guest_mode(regs), current); } --=20 2.25.1