From nobody Sun Nov 24 18:59:05 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1 dmarc=pass fromdomain=amd.com); dmarc=pass(p=quarantine dis=none) header.from=amd.com ARC-Seal: i=2; a=rsa-sha256; t=1717747960; cv=pass; d=zohomail.com; s=zohoarc; b=dk3s1YNsT6kVJUuhegWBcKxQfGWW4yOcU4MWcnEa5PvVUWGYbWeX1FCGp9+9Zi7Z1+UGLV5aixuzADUHcROLDyoHJE3D3zb3RJM3iG9V0As5Rhb3q3fbAxwdD4UfNm43RN7IM2fn5lHg2gde7wXzN+kWbavqfGtTfRXY1xU8bZw= ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1717747960; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=oIL2jjEjx9U91HHLhsRLBwmWlPr2GNH9RAR8j3dN22k=; b=Oz9W+aCC7xpU0nJQVIBnf5t9egXF/AiOF+TTINAeZ/S1uFJE+222GhTvb5Kxp4O9AZe3kI+umOdCArnV+6/mXOzFgDEVJqTZZaEQE2FaB5bMd33juLEy2JeHC0KRlACbAtNBkfSkKyc/5524FUlYuxjotSSDNv3pK3F785eRYRQ= ARC-Authentication-Results: i=2; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1 dmarc=pass fromdomain=amd.com); dmarc=pass header.from= (p=quarantine dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1717747960722687.8654853116482; Fri, 7 Jun 2024 01:12:40 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.736385.1142488 (Exim 4.92) (envelope-from ) id 1sFUhv-0002sG-GV; Fri, 07 Jun 2024 08:12:19 +0000 Received: by outflank-mailman (output) from mailman id 736385.1142488; Fri, 07 Jun 2024 08:12:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1sFUhv-0002rV-Cj; Fri, 07 Jun 2024 08:12:19 +0000 Received: by outflank-mailman (input) for mailman id 736385; Fri, 07 Jun 2024 08:12:18 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1sFUhu-0001Em-2N for xen-devel@lists.xenproject.org; Fri, 07 Jun 2024 08:12:18 +0000 Received: from NAM11-BN8-obe.outbound.protection.outlook.com (mail-bn8nam11on20626.outbound.protection.outlook.com [2a01:111:f403:2414::626]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id a6aa1a0c-24a5-11ef-b4bb-af5377834399; Fri, 07 Jun 2024 10:12:15 +0200 (CEST) Received: from SJ0PR05CA0006.namprd05.prod.outlook.com (2603:10b6:a03:33b::11) by SJ2PR12MB8689.namprd12.prod.outlook.com (2603:10b6:a03:53d::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7633.33; Fri, 7 Jun 2024 08:12:12 +0000 Received: from CO1PEPF000044F8.namprd21.prod.outlook.com (2603:10b6:a03:33b:cafe::bd) by SJ0PR05CA0006.outlook.office365.com (2603:10b6:a03:33b::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7677.12 via Frontend Transport; Fri, 7 Jun 2024 08:12:12 +0000 Received: from SATLEXMB04.amd.com (165.204.84.17) by CO1PEPF000044F8.mail.protection.outlook.com (10.167.241.198) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7677.0 via Frontend Transport; Fri, 7 Jun 2024 08:12:12 +0000 Received: from cjq-desktop.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 7 Jun 2024 03:12:06 -0500 X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: a6aa1a0c-24a5-11ef-b4bb-af5377834399 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Ks6oLTWhdNjumqJVkJt+3cQQ/5MvirhbfRntUsLM0HK3DWHfY4ns8J9MzUnlRzhUBYpxqakKdIKCB7rhQbc1xCreBXlVqKJHxAX/UFIxOx/4TXWtBnFFHnftnkddBTVxDydkU5pZA2a+xcbpAmmTTSoHU3Juz1j2ZaOWdnQ4TOkWIxM7lSHEy6hkqSmYfVc4R4hZhuWo5LkEa8vRgP/MDqvnMSBFfAM3H+YnJkjqKW5Ut9JIHnBlrosmYszVIHA8mwBburNqNJtTOvCXRZkMg+bvT94r+S8kL5d1IZyO0pNRisq3rzgD/2M6QulS5WNTCXZOGVJ5ohoTrpSOaANW0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=oIL2jjEjx9U91HHLhsRLBwmWlPr2GNH9RAR8j3dN22k=; b=aljpSylcYQ9Y3H0a3OO5FRBT7OCtqq/G6y+LybXDR9kgknFiriVbBKdGTrmdP27UEIAVVl02mgyeLTb7Jo9apcS7gYPBxcSeNsaDymHtoj54C5lF31xT6kAEBuQv/X1MgaqkHa4WMScDtDna25b21TGOI4YUv6eaj/7K+Fl4cSq6m72SbJJ2cc3JusEVV+ipmI4M508f2tH7iqCpCcwbJ4ARMALPvsXqWrfdp3u0FjIr6Bh7X5IR25ZfuK2g0ncIpcox1xkSjH6iHZFdP4c7b1fzamikZltgbu6gc3ye2Lx0eRzIDWNHt3hneO++aGSavZkebYs1Lr9MaiuDD0y1Tg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=lists.xenproject.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=oIL2jjEjx9U91HHLhsRLBwmWlPr2GNH9RAR8j3dN22k=; b=BSIZLkbc5G/wuGhZ+RO3WHrmEDGIrdoIFgemmZ6IvHCC6Og+o24YpBV+ZoXz9EMmMDdgU46QWRjSecQ5AsVmjQMbFL4oPANc+LIaRT4EXTwddGjvqPxfqkJ3HzjXsqe4tVwIrcFZ9vfBM48veWH6d7px2w91Q4bixO6l+B/BcmM= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Jiqian Chen To: CC: Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu , George Dunlap , Julien Grall , Stefano Stabellini , Anthony PERARD , "Juergen Gross" , "Daniel P . Smith" , Stewart Hildebrand , Huang Rui , Jiqian Chen , Huang Rui Subject: [RFC XEN PATCH v9 5/5] domctl: Add XEN_DOMCTL_gsi_permission to grant gsi Date: Fri, 7 Jun 2024 16:11:27 +0800 Message-ID: <20240607081127.126593-6-Jiqian.Chen@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607081127.126593-1-Jiqian.Chen@amd.com> References: <20240607081127.126593-1-Jiqian.Chen@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044F8:EE_|SJ2PR12MB8689:EE_ X-MS-Office365-Filtering-Correlation-Id: 6dd9d50d-fc0a-43ec-93c4-08dc86c988ef X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|1800799015|376005|7416005|36860700004|82310400017; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?JXI+JMpP0iQskjsFuRdwycAmUbZk4N1xXpD+ScvTAkww+AwqFCyW4D0fpePs?= =?us-ascii?Q?RAdSxM6MS2IQrqQN04VdaUElg3PheuuDMZ94BUa4f17yzh1TWRTcedoDCWbh?= =?us-ascii?Q?teqeB00Qi2P7fR12UHOktlpe8vV5/nx7ZOa5hJCuWVHOufwYzZfWcPpOI/W/?= =?us-ascii?Q?f9c3s/yIDqgphit46utufsAzwYMGd9MjT7Vf6a07SHFEJKjn/s2nO7B1ryK4?= =?us-ascii?Q?s/aRp5dMGJNeM9zD2ekRnWBpS9xx75VB6//RtGIjiacvJQJnjESFU8v9pjx+?= =?us-ascii?Q?X/33DJM8oYU+D8u1pCvmwOW/QVIMEJAxooeh0PjORwzLxy1wjqI2eQ1ZPHL0?= =?us-ascii?Q?yK+Z3TYBP7APsbBP5VbqL1aDz6THkvd7T+P7HGpULZqhtnwHpBiD0FF6rQEs?= =?us-ascii?Q?9PA9dkz7yCaCytI0aZQGMwHWf3t1U1cZQB+LKwOCZC96ibF1llt8A8LMher+?= =?us-ascii?Q?KR3JSB82FcPBI5+cYjSZ6HxDcZYqdqBAx+WErteqk4DNMRm9LxEVEXUUHkR/?= =?us-ascii?Q?9NZAaoApENyjQI/+eov6uyMMjl4cVkf/0kDz11FhYYGPmUL7V/J6BCKwNMIK?= =?us-ascii?Q?tIQgPdkpDs050pF9yFkxc9U9YXxlQ6DuuqmLgXt0xtJQhdivVF5Io6yPlD7I?= =?us-ascii?Q?4H1gb6NZBMgyLkB7rhlDk+xam0bKPzlrwSym6s/4OPNX/Kexn7Dbjamkt0e1?= =?us-ascii?Q?DJ1q0U9kyktcFQpnq3LPUamVmvXVNc11PUUb6dJuuIKOc0noqq71h65h65L9?= =?us-ascii?Q?PM3VNPKpQZA/nxfCkAQi2w46VNb+nIP+Y4N1kSq/K/TaMY6QNHmBFqgra7Zl?= =?us-ascii?Q?wcg82mNCGUaRZiCVJ02GVSe85FufteBAGplL7j3ROzdBJB6wsW6vAohyAXOx?= =?us-ascii?Q?TLioMMuHiT5Th87cPK1WQNxf/3tJl8qpM/NKK85gniCnBsQI2Yj/BCKO5+N1?= =?us-ascii?Q?5niP1dsmWsHSI7QYma7RXariJSFwMW6q3wwE0tI6tr4qe4JxLuZ+b2NCiVTs?= =?us-ascii?Q?0JCqSCM+yxFAbLA/8rGtX8qpv62Rr0oxx1lGD84++2YB/X3XIkEFBX0cybBE?= =?us-ascii?Q?qwU4yIZAfkQK18UJK+5TVVB2+4NLqcvCbgQrYCxDl5HU42Ofc518UqTVxjW9?= =?us-ascii?Q?bLb98k7EE1L3kEtVLHnmu9FGb0SId7/K7OctRphqHBYKAlekgtbfc0Hygemn?= =?us-ascii?Q?q4pF738sHInGxt5/QUayGWMV3iE+K4TuseqRvmi5FtUQsVOFKIJqTdgONxtn?= =?us-ascii?Q?LUq93Wv4r1GBP+6KP9Bx1mgMhtTMeE7CNL8PCCd3xuj4xVLQJcFhezx73DXh?= =?us-ascii?Q?obwaztLkylerIQNdUbNJ78roC8e2w3uekC4izuTBCNlTp0KH9IcbXZtBmL2Q?= =?us-ascii?Q?ZbWdEipoGGXd7eFMvbGM2VOn7y63sKousYsKv6OfI49X9J6dRA=3D=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(1800799015)(376005)(7416005)(36860700004)(82310400017);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jun 2024 08:12:12.2156 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6dd9d50d-fc0a-43ec-93c4-08dc86c988ef X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F8.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8689 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1717747962068100001 Content-Type: text/plain; charset="utf-8" Some type of domain don't have PIRQ, like PVH, it do not do PHYSDEVOP_map_pirq for each gsi. When passthrough a device to guest on PVH dom0, callstack pci_add_dm_done->XEN_DOMCTL_irq_permission will failed at domain_pirq_to_irq, because PVH has no mapping of gsi, pirq and irq on Xen side. What's more, current hypercall XEN_DOMCTL_irq_permission require passing in pirq and grant the access of irq, it is not suitable for dom0 that has no PIRQ flag, because passthrough a device needs gsi and grant the corresponding irq to guest. So, add a new hypercall to grant gsi permission when dom0 is not PV or dom0 has not PIRQ flag. Signed-off-by: Huang Rui Signed-off-by: Jiqian Chen --- RFC: it needs review and needs to wait for the corresponding third patch on= linux kernel side to be merged. --- tools/include/xenctrl.h | 5 +++ tools/libs/ctrl/xc_domain.c | 15 +++++++ tools/libs/light/libxl_pci.c | 72 +++++++++++++++++++++++------- xen/arch/x86/domctl.c | 38 ++++++++++++++++ xen/arch/x86/include/asm/io_apic.h | 2 + xen/arch/x86/io_apic.c | 21 +++++++++ xen/arch/x86/mpparse.c | 3 +- xen/include/public/domctl.h | 10 +++++ xen/xsm/flask/hooks.c | 1 + 9 files changed, 149 insertions(+), 18 deletions(-) diff --git a/tools/include/xenctrl.h b/tools/include/xenctrl.h index a0381f74d24b..f3feb6848e25 100644 --- a/tools/include/xenctrl.h +++ b/tools/include/xenctrl.h @@ -1382,6 +1382,11 @@ int xc_domain_irq_permission(xc_interface *xch, uint32_t pirq, bool allow_access); =20 +int xc_domain_gsi_permission(xc_interface *xch, + uint32_t domid, + uint32_t gsi, + bool allow_access); + int xc_domain_iomem_permission(xc_interface *xch, uint32_t domid, unsigned long first_mfn, diff --git a/tools/libs/ctrl/xc_domain.c b/tools/libs/ctrl/xc_domain.c index f2d9d14b4d9f..8540e84fda93 100644 --- a/tools/libs/ctrl/xc_domain.c +++ b/tools/libs/ctrl/xc_domain.c @@ -1394,6 +1394,21 @@ int xc_domain_irq_permission(xc_interface *xch, return do_domctl(xch, &domctl); } =20 +int xc_domain_gsi_permission(xc_interface *xch, + uint32_t domid, + uint32_t gsi, + bool allow_access) +{ + struct xen_domctl domctl =3D { + .cmd =3D XEN_DOMCTL_gsi_permission, + .domain =3D domid, + .u.gsi_permission.gsi =3D gsi, + .u.gsi_permission.allow_access =3D allow_access, + }; + + return do_domctl(xch, &domctl); +} + int xc_domain_iomem_permission(xc_interface *xch, uint32_t domid, unsigned long first_mfn, diff --git a/tools/libs/light/libxl_pci.c b/tools/libs/light/libxl_pci.c index 7e44d4c3ae2b..b8ec37d8d7e3 100644 --- a/tools/libs/light/libxl_pci.c +++ b/tools/libs/light/libxl_pci.c @@ -1412,6 +1412,37 @@ static bool pci_supp_legacy_irq(void) #define PCI_SBDF(seg, bus, devfn) \ ((((uint32_t)(seg)) << 16) | (PCI_DEVID(bus, devfn))) =20 +static int pci_device_set_gsi(libxl_ctx *ctx, + libxl_domid domid, + libxl_device_pci *pci, + bool map, + int *gsi_back) +{ + int r, gsi, pirq; + uint32_t sbdf; + + sbdf =3D PCI_SBDF(pci->domain, pci->bus, (PCI_DEVFN(pci->dev, pci->fun= c))); + r =3D xc_physdev_gsi_from_dev(ctx->xch, sbdf); + *gsi_back =3D r; + if (r < 0) + return r; + + gsi =3D r; + pirq =3D r; + if (map) + r =3D xc_physdev_map_pirq(ctx->xch, domid, gsi, &pirq); + else + r =3D xc_physdev_unmap_pirq(ctx->xch, domid, pirq); + if (r) + return r; + + r =3D xc_domain_gsi_permission(ctx->xch, domid, gsi, map); + if (r && errno =3D=3D EOPNOTSUPP) + r =3D xc_domain_irq_permission(ctx->xch, domid, pirq, map); + + return r; +} + static void pci_add_dm_done(libxl__egc *egc, pci_add_state *pas, int rc) @@ -1424,10 +1455,10 @@ static void pci_add_dm_done(libxl__egc *egc, unsigned long long start, end, flags, size; int irq, i; int r; - uint32_t sbdf; uint32_t flag =3D XEN_DOMCTL_DEV_RDM_RELAXED; uint32_t domainid =3D domid; bool isstubdom =3D libxl_is_stubdom(ctx, domid, &domainid); + int gsi; =20 /* Convenience aliases */ bool starting =3D pas->starting; @@ -1485,6 +1516,19 @@ static void pci_add_dm_done(libxl__egc *egc, fclose(f); if (!pci_supp_legacy_irq()) goto out_no_irq; + + r =3D pci_device_set_gsi(ctx, domid, pci, 1, &gsi); + if (gsi >=3D 0) { + if (r < 0) { + rc =3D ERROR_FAIL; + LOGED(ERROR, domainid, + "pci_device_set_gsi gsi=3D%d (error=3D%d)", gsi, errno); + goto out; + } else { + goto process_permissive; + } + } + /* if gsi < 0, keep using irq */ sysfs_path =3D GCSPRINTF(SYSFS_PCI_DEV"/"PCI_BDF"/irq", pci->domain, pci->bus, pci->dev, pci->func); f =3D fopen(sysfs_path, "r"); @@ -1493,13 +1537,6 @@ static void pci_add_dm_done(libxl__egc *egc, goto out_no_irq; } if ((fscanf(f, "%u", &irq) =3D=3D 1) && irq) { - sbdf =3D PCI_SBDF(pci->domain, pci->bus, - (PCI_DEVFN(pci->dev, pci->func))); - r =3D xc_physdev_gsi_from_dev(ctx->xch, sbdf); - /* if fail, keep using irq; if success, r is gsi, use gsi */ - if (r !=3D -1) { - irq =3D r; - } r =3D xc_physdev_map_pirq(ctx->xch, domid, irq, &irq); if (r < 0) { LOGED(ERROR, domainid, "xc_physdev_map_pirq irq=3D%d (error=3D= %d)", @@ -1519,6 +1556,7 @@ static void pci_add_dm_done(libxl__egc *egc, } fclose(f); =20 +process_permissive: /* Don't restrict writes to the PCI config space from this VM */ if (pci->permissive) { if ( sysfs_write_bdf(gc, SYSFS_PCIBACK_DRIVER"/permissive", @@ -2186,10 +2224,10 @@ static void pci_remove_detached(libxl__egc *egc, int irq =3D 0, i, stubdomid =3D 0; const char *sysfs_path; FILE *f; - uint32_t sbdf; uint32_t domainid =3D prs->domid; bool isstubdom; int r; + int gsi; =20 /* Convenience aliases */ libxl_device_pci *const pci =3D &prs->pci; @@ -2245,6 +2283,15 @@ skip_bar: if (!pci_supp_legacy_irq()) goto skip_legacy_irq; =20 + r =3D pci_device_set_gsi(ctx, domid, pci, 0, &gsi); + if (gsi >=3D 0) { + if (r < 0) { + LOGED(ERROR, domainid, + "pci_device_set_gsi gsi=3D%d (error=3D%d)", gsi, errno); + } + goto skip_legacy_irq; + } + /* if gsi < 0, keep using irq */ sysfs_path =3D GCSPRINTF(SYSFS_PCI_DEV"/"PCI_BDF"/irq", pci->domain, pci->bus, pci->dev, pci->func); =20 @@ -2255,13 +2302,6 @@ skip_bar: } =20 if ((fscanf(f, "%u", &irq) =3D=3D 1) && irq) { - sbdf =3D PCI_SBDF(pci->domain, pci->bus, - (PCI_DEVFN(pci->dev, pci->func))); - r =3D xc_physdev_gsi_from_dev(ctx->xch, sbdf); - /* if fail, keep using irq; if success, r is gsi, use gsi */ - if (r !=3D -1) { - irq =3D r; - } rc =3D xc_physdev_unmap_pirq(ctx->xch, domid, irq); if (rc < 0) { /* diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 9a72d57333e9..c69b4566ac4f 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -36,6 +36,7 @@ #include #include #include +#include =20 static int update_domain_cpu_policy(struct domain *d, xen_domctl_cpu_policy_t *xdpc) @@ -237,6 +238,43 @@ long arch_do_domctl( break; } =20 + case XEN_DOMCTL_gsi_permission: + { + unsigned int gsi =3D domctl->u.gsi_permission.gsi; + int irq =3D gsi_2_irq(gsi); + bool allow =3D domctl->u.gsi_permission.allow_access; + + /* + * If current domain is PV or it has PIRQ flag, it has a mapping + * of gsi, pirq and irq, so it should use XEN_DOMCTL_irq_permission + * to grant irq permission. + */ + if ( is_pv_domain(current->domain) || has_pirq(current->domain) ) + { + ret =3D -EOPNOTSUPP; + break; + } + + if ( gsi >=3D nr_irqs_gsi || irq < 0 ) + { + ret =3D -EINVAL; + break; + } + + if ( !irq_access_permitted(current->domain, irq) || + xsm_irq_permission(XSM_HOOK, d, irq, allow) ) + { + ret =3D -EPERM; + break; + } + + if ( allow ) + ret =3D irq_permit_access(d, irq); + else + ret =3D irq_deny_access(d, irq); + break; + } + case XEN_DOMCTL_getpageframeinfo3: { unsigned int num =3D domctl->u.getpageframeinfo3.num; diff --git a/xen/arch/x86/include/asm/io_apic.h b/xen/arch/x86/include/asm/= io_apic.h index 78268ea8f666..7e86d8337758 100644 --- a/xen/arch/x86/include/asm/io_apic.h +++ b/xen/arch/x86/include/asm/io_apic.h @@ -213,5 +213,7 @@ unsigned highest_gsi(void); =20 int ioapic_guest_read( unsigned long physbase, unsigned int reg, u32 *pval= ); int ioapic_guest_write(unsigned long physbase, unsigned int reg, u32 val); +int mp_find_ioapic(int gsi); +int gsi_2_irq(int gsi); =20 #endif diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c index b48a64246548..d03bcdef4d19 100644 --- a/xen/arch/x86/io_apic.c +++ b/xen/arch/x86/io_apic.c @@ -955,6 +955,27 @@ static int pin_2_irq(int idx, int apic, int pin) return irq; } =20 +int gsi_2_irq(int gsi) +{ + int entry, ioapic, pin; + + ioapic =3D mp_find_ioapic(gsi); + if ( ioapic < 0 ) + return -1; + + pin =3D gsi - io_apic_gsi_base(ioapic); + + entry =3D find_irq_entry(ioapic, pin, mp_INT); + /* + * If there is no override mapping for irq and gsi in mp_irqs, + * then the default identity mapping applies. + */ + if ( entry < 0 ) + return gsi; + + return pin_2_irq(entry, ioapic, pin); +} + static inline int IO_APIC_irq_trigger(int irq) { int apic, idx, pin; diff --git a/xen/arch/x86/mpparse.c b/xen/arch/x86/mpparse.c index d8ccab2449c6..c95da0de5770 100644 --- a/xen/arch/x86/mpparse.c +++ b/xen/arch/x86/mpparse.c @@ -841,8 +841,7 @@ static struct mp_ioapic_routing { } mp_ioapic_routing[MAX_IO_APICS]; =20 =20 -static int mp_find_ioapic ( - int gsi) +int mp_find_ioapic(int gsi) { unsigned int i; =20 diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h index 2a49fe46ce25..f933af8722f4 100644 --- a/xen/include/public/domctl.h +++ b/xen/include/public/domctl.h @@ -465,6 +465,14 @@ struct xen_domctl_irq_permission { }; =20 =20 +/* XEN_DOMCTL_gsi_permission */ +struct xen_domctl_gsi_permission { + uint32_t gsi; + uint8_t allow_access; /* flag to specify enable/disable of x86 gsi = access */ + uint8_t pad[3]; +}; + + /* XEN_DOMCTL_iomem_permission */ struct xen_domctl_iomem_permission { uint64_aligned_t first_mfn;/* first page (physical page number) in ran= ge */ @@ -1306,6 +1314,7 @@ struct xen_domctl { #define XEN_DOMCTL_get_paging_mempool_size 85 #define XEN_DOMCTL_set_paging_mempool_size 86 #define XEN_DOMCTL_dt_overlay 87 +#define XEN_DOMCTL_gsi_permission 88 #define XEN_DOMCTL_gdbsx_guestmemio 1000 #define XEN_DOMCTL_gdbsx_pausevcpu 1001 #define XEN_DOMCTL_gdbsx_unpausevcpu 1002 @@ -1328,6 +1337,7 @@ struct xen_domctl { struct xen_domctl_setdomainhandle setdomainhandle; struct xen_domctl_setdebugging setdebugging; struct xen_domctl_irq_permission irq_permission; + struct xen_domctl_gsi_permission gsi_permission; struct xen_domctl_iomem_permission iomem_permission; struct xen_domctl_ioport_permission ioport_permission; struct xen_domctl_hypercall_init hypercall_init; diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c index 5e88c71b8e22..a5b134c91101 100644 --- a/xen/xsm/flask/hooks.c +++ b/xen/xsm/flask/hooks.c @@ -685,6 +685,7 @@ static int cf_check flask_domctl(struct domain *d, int = cmd) case XEN_DOMCTL_shadow_op: case XEN_DOMCTL_ioport_permission: case XEN_DOMCTL_ioport_mapping: + case XEN_DOMCTL_gsi_permission: #endif #ifdef CONFIG_HAS_PASSTHROUGH /* --=20 2.34.1