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Fri, 24 May 2024 13:03:43 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Oleksii Kurochko , Shawn Anastasio , "consulting @ bugseng . com" , Simone Ballarin , Federico Serafini , Nicola Vetrini Subject: [PATCH v2 01/13] ppc/boot: Run constructors on boot Date: Fri, 24 May 2024 21:03:26 +0100 Message-Id: <20240524200338.1232391-2-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240524200338.1232391-1-andrew.cooper3@citrix.com> References: <20240524200338.1232391-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1716581050579100005 PPC collects constructors, but doesn't run them yet. Do so. They'll shortly be used to confirm correct behaviour of the bitops primitiv= es. Signed-off-by: Andrew Cooper Acked-by: Shawn Anastasio --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Wei Liu CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Oleksii Kurochko CC: Shawn Anastasio CC: consulting@bugseng.com CC: Simone Ballarin CC: Federico Serafini CC: Nicola Vetrini CI: https://gitlab.com/xen-project/people/andyhhp/xen/-/jobs/6931084695 v2: * New RISC-V collects them too, but can't call init_constructors() until lib/ctor= s.c is included in the build. Constructors is the only way to get these tests working on PPC/RISC-V as neither suvivie boot with initcalls() active. Then again, initcalls() are just a not-invented-here constructor, and we'd probably do well to move them over.. --- xen/arch/ppc/setup.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/xen/arch/ppc/setup.c b/xen/arch/ppc/setup.c index 101bdd8bb648..7fe06aa4bfb0 100644 --- a/xen/arch/ppc/setup.c +++ b/xen/arch/ppc/setup.c @@ -39,6 +39,8 @@ void __init noreturn start_xen(unsigned long r3, unsigned= long r4, =20 setup_initial_pagetables(); =20 + init_constructors(); + early_printk("Hello, ppc64le!\n"); =20 for ( ; ; ) --=20 2.30.2 From nobody Mon Nov 25 19:17:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; 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Fri, 24 May 2024 13:03:45 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Oleksii Kurochko , Shawn Anastasio , "consulting @ bugseng . com" , Simone Ballarin , Federico Serafini , Nicola Vetrini Subject: [PATCH v2 02/13] xen/bitops: Cleanup ahead of rearrangements Date: Fri, 24 May 2024 21:03:27 +0100 Message-Id: <20240524200338.1232391-3-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240524200338.1232391-1-andrew.cooper3@citrix.com> References: <20240524200338.1232391-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1716581052671100003 * Rename __attribute_pure__ to just __pure before it gains users. * Introduce __constructor which is going to be used in lib/, and is unconditionally cf_check. * Identify the areas of xen/bitops.h which are a mess. * Introduce xen/boot-check.h as helpers for compile and boot time testing. This provides a statement of the ABI, and a confirmation that arch-speci= fic implementations behave as expected. Sadly Clang 7 and older isn't happy with the compile time checks. Skip the= m, and just rely on the runtime checks. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Wei Liu CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Oleksii Kurochko CC: Shawn Anastasio CC: consulting@bugseng.com CC: Simone Ballarin CC: Federico Serafini CC: Nicola Vetrini v2: * Break macros out into a header as they're going to be used elsewhere too * Use panic() rather than BUG_ON() to be more helpful when something fails * Brackets in HIDE() * Alignment adjustments * Skip COMPILE_CHECK() for Clang < 8 --- xen/include/xen/bitops.h | 13 ++++++-- xen/include/xen/boot-check.h | 60 ++++++++++++++++++++++++++++++++++++ xen/include/xen/compiler.h | 3 +- 3 files changed, 72 insertions(+), 4 deletions(-) create mode 100644 xen/include/xen/boot-check.h diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h index e3c5a4ccf321..9b40f20381a2 100644 --- a/xen/include/xen/bitops.h +++ b/xen/include/xen/bitops.h @@ -1,5 +1,7 @@ -#ifndef _LINUX_BITOPS_H -#define _LINUX_BITOPS_H +#ifndef XEN_BITOPS_H +#define XEN_BITOPS_H + +#include #include =20 /* @@ -103,8 +105,13 @@ static inline int generic_flsl(unsigned long x) * Include this here because some architectures need generic_ffs/fls in * scope */ + +/* --------------------- Please tidy above here --------------------- */ + #include =20 +/* --------------------- Please tidy below here --------------------- */ + #ifndef find_next_bit /** * find_next_bit - find the next set bit in a memory region @@ -294,4 +301,4 @@ static inline __u32 ror32(__u32 word, unsigned int shif= t) =20 #define BIT_WORD(nr) ((nr) / BITS_PER_LONG) =20 -#endif +#endif /* XEN_BITOPS_H */ diff --git a/xen/include/xen/boot-check.h b/xen/include/xen/boot-check.h new file mode 100644 index 000000000000..250f9a40d3b0 --- /dev/null +++ b/xen/include/xen/boot-check.h @@ -0,0 +1,60 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +/* + * Helpers for boot-time checks of basic logic, including confirming that + * examples which should be calculated by the compiler are. + */ +#ifndef XEN_BOOT_CHECK_H +#define XEN_BOOT_CHECK_H + +#include + +/* Hide a value from the optimiser. */ +#define HIDE(x) \ + ({ typeof(x) _x =3D (x); asm volatile ( "" : "+r" (_x) ); _x; }) + +/* + * Check that fn(val) can be calcuated by the compiler, and that it gives = the + * expected answer. + * + * Clang < 8 can't fold constants through static inlines, causing this to + * fail. Simply skip it for incredibly old compilers. + */ +#if !CONFIG_CC_IS_CLANG || CONFIG_CLANG_VERSION >=3D 80000 +#define COMPILE_CHECK(fn, val, res) \ + do { \ + typeof(fn(val)) real =3D fn(val); \ + \ + if ( !__builtin_constant_p(real) ) \ + asm ( ".error \"'" STR(fn(val)) "' not compile-time constant\"= " ); \ + else if ( real !=3D res ) \ + asm ( ".error \"Compile time check '" STR(fn(val) =3D=3D res) = "' failed\"" ); \ + } while ( 0 ) +#else +#define COMPILE_CHECK(fn, val, res) +#endif + +/* + * Check that Xen's runtime logic for fn(val) gives the expected answer. = This + * requires using HIDE() to prevent the optimiser from collapsing the logic + * into a constant. + */ +#define RUNTIME_CHECK(fn, val, res) \ + do { \ + typeof(fn(val)) real =3D fn(HIDE(val)); \ + \ + if ( real !=3D res ) \ + panic("%s: %s(%s) expected %u, got %u\n", \ + __func__, #fn, #val, real, res); \ + } while ( 0 ) + +/* + * Perform compiletime and runtime checks for fn(val) =3D=3D res. + */ +#define CHECK(fn, val, res) \ + do { \ + COMPILE_CHECK(fn, val, res); \ + RUNTIME_CHECK(fn, val, res); \ + } while ( 0 ) + +#endif /* XEN_BOOT_CHECK_H */ diff --git a/xen/include/xen/compiler.h b/xen/include/xen/compiler.h index 179ff23e62c5..444bf80142c7 100644 --- a/xen/include/xen/compiler.h +++ b/xen/include/xen/compiler.h @@ -86,7 +86,8 @@ #define inline inline __init #endif =20 -#define __attribute_pure__ __attribute__((__pure__)) +#define __constructor __attribute__((__constructor__)) cf_check +#define __pure __attribute__((__pure__)) #define __attribute_const__ __attribute__((__const__)) #define __transparent__ __attribute__((__transparent_union__)) =20 --=20 2.30.2 From nobody Mon Nov 25 19:17:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; 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Fri, 24 May 2024 13:03:46 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Oleksii Kurochko , Shawn Anastasio , "consulting @ bugseng . com" , Simone Ballarin , Federico Serafini , Nicola Vetrini Subject: [PATCH v2 03/13] ARM/bitops: Change find_first_set_bit() to be a define Date: Fri, 24 May 2024 21:03:28 +0100 Message-Id: <20240524200338.1232391-4-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240524200338.1232391-1-andrew.cooper3@citrix.com> References: <20240524200338.1232391-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1716581048584100001 This is in order to maintain bisectability through the subsequent changes, = as the order of definitions is altered. Signed-off-by: Andrew Cooper Acked-by: Stefano Stabellini --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Wei Liu CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Oleksii Kurochko CC: Shawn Anastasio CC: consulting@bugseng.com CC: Simone Ballarin CC: Federico Serafini CC: Nicola Vetrini v2: * New --- xen/arch/arm/include/asm/bitops.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/xen/arch/arm/include/asm/bitops.h b/xen/arch/arm/include/asm/b= itops.h index ab030b6cb032..199252201291 100644 --- a/xen/arch/arm/include/asm/bitops.h +++ b/xen/arch/arm/include/asm/bitops.h @@ -167,10 +167,7 @@ static inline int fls(unsigned int x) * Returns the bit-number of the first set bit (first bit being 0). * The input must *not* be zero. */ -static inline unsigned int find_first_set_bit(unsigned long word) -{ - return ffsl(word) - 1; -} +#define find_first_set_bit(w) (ffsl(w) - 1) =20 /** * hweightN - returns the hamming weight of a N-bit word --=20 2.30.2 From nobody Mon Nov 25 19:17:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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Fri, 24 May 2024 13:03:46 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Oleksii Kurochko , Shawn Anastasio , "consulting @ bugseng . com" , Simone Ballarin , Federico Serafini , Nicola Vetrini Subject: [PATCH v2 04/13] xen/page_alloc: Coerce min(flsl(), foo) expressions to being unsigned Date: Fri, 24 May 2024 21:03:29 +0100 Message-Id: <20240524200338.1232391-5-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240524200338.1232391-1-andrew.cooper3@citrix.com> References: <20240524200338.1232391-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1716581048585100002 This is in order to maintain bisectability through the subsequent changes, where flsl() changes sign-ness non-atomically by architecture. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Wei Liu CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Oleksii Kurochko CC: Shawn Anastasio CC: consulting@bugseng.com CC: Simone Ballarin CC: Federico Serafini CC: Nicola Vetrini v2: * New --- xen/common/page_alloc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c index 7c1bdfc046bf..8d3342e95236 100644 --- a/xen/common/page_alloc.c +++ b/xen/common/page_alloc.c @@ -1842,7 +1842,7 @@ static void _init_heap_pages(const struct page_info *= pg, * Note that the value of ffsl() and flsl() starts from 1 so we ne= ed * to decrement it by 1. */ - unsigned int inc_order =3D min(MAX_ORDER, flsl(e - s) - 1); + unsigned int inc_order =3D min(MAX_ORDER + 0U, flsl(e - s) - 1U); =20 if ( s ) inc_order =3D min(inc_order, ffsl(s) - 1U); @@ -2266,7 +2266,7 @@ void __init xenheap_max_mfn(unsigned long mfn) ASSERT(!first_node_initialised); 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1716581052642100001 generic_f?s() being static inline is the cause of lots of the complexity between the common and arch-specific bitops.h They appear to be static inline for constant-folding reasons (ARM uses them for this), but there are better ways to achieve the same effect. It is presumptuous that an unrolled binary search is the right algorithm to use on all microarchitectures. Indeed, it's not for the eventual users, but that can be addressed at a later point. It is also nonsense to implement the int form as the base primitive and construct the long form from 2x int in 64-bit builds, when it's just one ex= tra step to operate at the native register width. Therefore, implement generic_f?sl() in lib/. They're not actually needed in x86/ARM/PPC by the end of the cleanup (i.e. the functions will be dropped by the linker), and they're only expected be needed by RISC-V on hardware which lacks the Zbb extension. Implement generic_fls() in terms of generic_flsl() for now, but this will be cleaned up in due course. Provide basic runtime testing using __constructor inside the lib/ file. Th= is is important, as it means testing runs if and only if generic_f?sl() are us= ed elsewhere in Xen. Signed-off-by: Andrew Cooper Acked-by: Stefano Stabellini Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Wei Liu CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Oleksii Kurochko CC: Shawn Anastasio CC: consulting@bugseng.com CC: Simone Ballarin CC: Federico Serafini CC: Nicola Vetrini v2: * New I suspect we want to swap CONFIG_DEBUG for CONFIG_BOOT_UNIT_TESTS in due course. These ought to be able to be used in a release build too. --- xen/arch/arm/include/asm/bitops.h | 2 +- xen/arch/ppc/include/asm/bitops.h | 2 +- xen/include/xen/bitops.h | 89 ++----------------------------- xen/lib/Makefile | 2 + xen/lib/generic-ffsl.c | 65 ++++++++++++++++++++++ xen/lib/generic-flsl.c | 68 +++++++++++++++++++++++ 6 files changed, 142 insertions(+), 86 deletions(-) create mode 100644 xen/lib/generic-ffsl.c create mode 100644 xen/lib/generic-flsl.c diff --git a/xen/arch/arm/include/asm/bitops.h b/xen/arch/arm/include/asm/b= itops.h index 199252201291..ec1cf7b9b323 100644 --- a/xen/arch/arm/include/asm/bitops.h +++ b/xen/arch/arm/include/asm/bitops.h @@ -150,7 +150,7 @@ static inline int fls(unsigned int x) int ret; =20 if (__builtin_constant_p(x)) - return generic_fls(x); + return generic_flsl(x); =20 asm("clz\t%"__OP32"0, %"__OP32"1" : "=3Dr" (ret) : "r" (x)); return 32 - ret; diff --git a/xen/arch/ppc/include/asm/bitops.h b/xen/arch/ppc/include/asm/b= itops.h index bea655796d64..ab692d01717b 100644 --- a/xen/arch/ppc/include/asm/bitops.h +++ b/xen/arch/ppc/include/asm/bitops.h @@ -172,7 +172,7 @@ static inline int __test_and_clear_bit(int nr, volatile= void *addr) } =20 #define flsl(x) generic_flsl(x) -#define fls(x) generic_fls(x) +#define fls(x) generic_flsl(x) #define ffs(x) ({ unsigned int t_ =3D (x); fls(t_ & -t_); }) #define ffsl(x) ({ unsigned long t_ =3D (x); flsl(t_ & -t_); }) =20 diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h index 9b40f20381a2..cd405df96180 100644 --- a/xen/include/xen/bitops.h +++ b/xen/include/xen/bitops.h @@ -15,91 +15,12 @@ (((~0ULL) << (l)) & (~0ULL >> (BITS_PER_LLONG - 1 - (h)))) =20 /* - * ffs: find first bit set. This is defined the same way as - * the libc and compiler builtin ffs routines, therefore - * differs in spirit from the above ffz (man ffs). - */ - -static inline int generic_ffs(unsigned int x) -{ - int r =3D 1; - - if (!x) - return 0; - if (!(x & 0xffff)) { - x >>=3D 16; - r +=3D 16; - } - if (!(x & 0xff)) { - x >>=3D 8; - r +=3D 8; - } - if (!(x & 0xf)) { - x >>=3D 4; - r +=3D 4; - } - if (!(x & 3)) { - x >>=3D 2; - r +=3D 2; - } - if (!(x & 1)) { - x >>=3D 1; - r +=3D 1; - } - return r; -} - -/* - * fls: find last bit set. + * Find First/Last Set bit. + * + * Bits are labelled from 1. Returns 0 if given 0. */ - -static inline int generic_fls(unsigned int x) -{ - int r =3D 32; - - if (!x) - return 0; - if (!(x & 0xffff0000u)) { - x <<=3D 16; - r -=3D 16; - } - if (!(x & 0xff000000u)) { - x <<=3D 8; - r -=3D 8; - } - if (!(x & 0xf0000000u)) { - x <<=3D 4; - r -=3D 4; - } - if (!(x & 0xc0000000u)) { - x <<=3D 2; - r -=3D 2; - } - if (!(x & 0x80000000u)) { - x <<=3D 1; - r -=3D 1; - } - return r; -} - -#if BITS_PER_LONG =3D=3D 64 - -static inline int generic_ffsl(unsigned long x) -{ - return !x || (u32)x ? generic_ffs(x) : generic_ffs(x >> 32) + 32; -} - -static inline int generic_flsl(unsigned long x) -{ - u32 h =3D x >> 32; - - return h ? generic_fls(h) + 32 : generic_fls(x); -} - -#else -# define generic_ffsl generic_ffs -# define generic_flsl generic_fls -#endif +unsigned int __pure generic_ffsl(unsigned long x); +unsigned int __pure generic_flsl(unsigned long x); =20 /* * Include this here because some architectures need generic_ffs/fls in diff --git a/xen/lib/Makefile b/xen/lib/Makefile index e63798e1d452..a48541596470 100644 --- a/xen/lib/Makefile +++ b/xen/lib/Makefile @@ -4,6 +4,8 @@ lib-y +=3D bsearch.o lib-y +=3D ctors.o lib-y +=3D ctype.o lib-y +=3D find-next-bit.o +lib-y +=3D generic-ffsl.o +lib-y +=3D generic-flsl.o lib-y +=3D list-sort.o lib-y +=3D memchr.o lib-y +=3D memchr_inv.o diff --git a/xen/lib/generic-ffsl.c b/xen/lib/generic-ffsl.c new file mode 100644 index 000000000000..804cbd752efe --- /dev/null +++ b/xen/lib/generic-ffsl.c @@ -0,0 +1,65 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#include +#include +#include + +unsigned int generic_ffsl(unsigned long x) +{ + unsigned int r =3D 1; + + if ( !x ) + return 0; + +#if BITS_PER_LONG > 32 + if ( !(x & 0xffffffffU) ) + { + x >>=3D 32; + r +=3D 32; + } +#endif + if ( !(x & 0xffff) ) + { + x >>=3D 16; + r +=3D 16; + } + if ( !(x & 0xff) ) + { + x >>=3D 8; + r +=3D 8; + } + if ( !(x & 0xf) ) + { + x >>=3D 4; + r +=3D 4; + } + if ( !(x & 3) ) + { + x >>=3D 2; + r +=3D 2; + } + if ( !(x & 1) ) + { + x >>=3D 1; + r +=3D 1; + } + + return r; +} + +#ifdef CONFIG_DEBUG +static void __init __constructor test_generic_ffsl(void) +{ + RUNTIME_CHECK(generic_ffsl, 0, 0); + RUNTIME_CHECK(generic_ffsl, 1, 1); + RUNTIME_CHECK(generic_ffsl, 3, 1); + RUNTIME_CHECK(generic_ffsl, 7, 1); + RUNTIME_CHECK(generic_ffsl, 6, 2); + + RUNTIME_CHECK(generic_ffsl, 1UL << (BITS_PER_LONG - 1), BITS_PER_LONG); +#if BITS_PER_LONG > 32 + RUNTIME_CHECK(generic_ffsl, 1UL << 32, 33); + RUNTIME_CHECK(generic_ffsl, 1UL << 63, 64); +#endif +} +#endif /* CONFIG_DEBUG */ diff --git a/xen/lib/generic-flsl.c b/xen/lib/generic-flsl.c new file mode 100644 index 000000000000..e4543aeaf100 --- /dev/null +++ b/xen/lib/generic-flsl.c @@ -0,0 +1,68 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#include +#include +#include + +/* Mask of type UL with the upper x bits set. */ +#define UPPER_MASK(x) (~0UL << (BITS_PER_LONG - (x))) + +unsigned int generic_flsl(unsigned long x) +{ + unsigned int r =3D BITS_PER_LONG; + + if ( !x ) + return 0; + +#if BITS_PER_LONG > 32 + if ( !(x & UPPER_MASK(32)) ) + { + x <<=3D 32; + r -=3D 32; + } +#endif + if ( !(x & UPPER_MASK(16)) ) + { + x <<=3D 16; + r -=3D 16; + } + if ( !(x & UPPER_MASK(8)) ) + { + x <<=3D 8; + r -=3D 8; + } + if ( !(x & UPPER_MASK(4)) ) + { + x <<=3D 4; + r -=3D 4; + } + if ( !(x & UPPER_MASK(2)) ) + { + x <<=3D 2; + r -=3D 2; + } + if ( !(x & UPPER_MASK(1)) ) + { + x <<=3D 1; + r -=3D 1; + } + + return r; +} + +#ifdef CONFIG_DEBUG +static void __init __constructor test_generic_flsl(void) +{ + RUNTIME_CHECK(generic_flsl, 0, 0); + RUNTIME_CHECK(generic_flsl, 1, 1); + RUNTIME_CHECK(generic_flsl, 3, 2); + RUNTIME_CHECK(generic_flsl, 7, 3); + RUNTIME_CHECK(generic_flsl, 6, 3); + + RUNTIME_CHECK(generic_flsl, 1 | (1UL << (BITS_PER_LONG - 1)), BITS_PER= _LONG); +#if BITS_PER_LONG > 32 + RUNTIME_CHECK(generic_flsl, 1 | (1UL << 32), 33); + RUNTIME_CHECK(generic_flsl, 1 | (1UL << 63), 64); +#endif +} +#endif /* CONFIG_DEBUG */ --=20 2.30.2 From nobody Mon Nov 25 19:17:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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Fri, 24 May 2024 13:03:49 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Oleksii Kurochko , Shawn Anastasio , "consulting @ bugseng . com" , Simone Ballarin , Federico Serafini , Nicola Vetrini Subject: [PATCH v2 06/13] xen/bitops: Implement ffs() in common logic Date: Fri, 24 May 2024 21:03:31 +0100 Message-Id: <20240524200338.1232391-7-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240524200338.1232391-1-andrew.cooper3@citrix.com> References: <20240524200338.1232391-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1716581056642100004 Perform constant-folding unconditionally, rather than having it implemented inconsistency between architectures. Confirm the expected behaviour with compile time and boot time tests. For non-constant inputs, use arch_ffs() if provided but fall back to generic_ffsl() if not. In particular, RISC-V doesn't have a builtin that works in all configurations. For x86, rename ffs() to arch_ffs() and adjust the prototype. For PPC, __builtin_ctz() is 1/3 of the size of size of the transform to generic_fls(). Drop the definition entirely. ARM too benefits in the gene= ral case by using __builtin_ctz(), but less dramatically because it using optimised asm(). Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich Reviewed-by: Stefano Stabellini --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Wei Liu CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Oleksii Kurochko CC: Shawn Anastasio CC: consulting@bugseng.com CC: Simone Ballarin CC: Federico Serafini CC: Nicola Vetrini v2: * Fall back to generic, not builtin. * Extend the testing with multi-bit values. * Use always_inline for x86 * Defer x86 optimisation to a later change --- xen/arch/arm/include/asm/bitops.h | 2 +- xen/arch/ppc/include/asm/bitops.h | 2 +- xen/arch/x86/include/asm/bitops.h | 3 ++- xen/common/Makefile | 1 + xen/common/bitops.c | 19 +++++++++++++++++++ xen/include/xen/bitops.h | 17 +++++++++++++++++ 6 files changed, 41 insertions(+), 3 deletions(-) create mode 100644 xen/common/bitops.c diff --git a/xen/arch/arm/include/asm/bitops.h b/xen/arch/arm/include/asm/b= itops.h index ec1cf7b9b323..a88ec2612e16 100644 --- a/xen/arch/arm/include/asm/bitops.h +++ b/xen/arch/arm/include/asm/bitops.h @@ -157,7 +157,7 @@ static inline int fls(unsigned int x) } =20 =20 -#define ffs(x) ({ unsigned int __t =3D (x); fls(ISOLATE_LSB(__t)); }) +#define arch_ffs(x) ((x) ? 1 + __builtin_ctz(x) : 0) #define ffsl(x) ({ unsigned long __t =3D (x); flsl(ISOLATE_LSB(__t)); }) =20 /** diff --git a/xen/arch/ppc/include/asm/bitops.h b/xen/arch/ppc/include/asm/b= itops.h index ab692d01717b..5c36a6cc0ce3 100644 --- a/xen/arch/ppc/include/asm/bitops.h +++ b/xen/arch/ppc/include/asm/bitops.h @@ -173,7 +173,7 @@ static inline int __test_and_clear_bit(int nr, volatile= void *addr) =20 #define flsl(x) generic_flsl(x) #define fls(x) generic_flsl(x) -#define ffs(x) ({ unsigned int t_ =3D (x); fls(t_ & -t_); }) +#define arch_ffs(x) ((x) ? 1 + __builtin_ctz(x) : 0) #define ffsl(x) ({ unsigned long t_ =3D (x); flsl(t_ & -t_); }) =20 /** diff --git a/xen/arch/x86/include/asm/bitops.h b/xen/arch/x86/include/asm/b= itops.h index 5a71afbc89d5..122767fc0d10 100644 --- a/xen/arch/x86/include/asm/bitops.h +++ b/xen/arch/x86/include/asm/bitops.h @@ -430,7 +430,7 @@ static inline int ffsl(unsigned long x) return (int)r+1; } =20 -static inline int ffs(unsigned int x) +static always_inline unsigned int arch_ffs(unsigned int x) { int r; =20 @@ -440,6 +440,7 @@ static inline int ffs(unsigned int x) "1:" : "=3Dr" (r) : "rm" (x)); return r + 1; } +#define arch_ffs arch_ffs =20 /** * fls - find last bit set diff --git a/xen/common/Makefile b/xen/common/Makefile index d512cad5243f..21a4fb4c7166 100644 --- a/xen/common/Makefile +++ b/xen/common/Makefile @@ -1,5 +1,6 @@ obj-$(CONFIG_ARGO) +=3D argo.o obj-y +=3D bitmap.o +obj-bin-$(CONFIG_DEBUG) +=3D bitops.init.o obj-$(CONFIG_GENERIC_BUG_FRAME) +=3D bug.o obj-$(CONFIG_HYPFS_CONFIG) +=3D config_data.o obj-$(CONFIG_CORE_PARKING) +=3D core_parking.o diff --git a/xen/common/bitops.c b/xen/common/bitops.c new file mode 100644 index 000000000000..8c161b8ea7fa --- /dev/null +++ b/xen/common/bitops.c @@ -0,0 +1,19 @@ +#include +#include +#include + +static void __init test_ffs(void) +{ + /* unsigned int ffs(unsigned int) */ + CHECK(ffs, 0, 0); + CHECK(ffs, 1, 1); + CHECK(ffs, 3, 1); + CHECK(ffs, 7, 1); + CHECK(ffs, 6, 2); + CHECK(ffs, 0x80000000U, 32); +} + +static void __init __constructor test_bitops(void) +{ + test_ffs(); +} diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h index cd405df96180..f7e90a2893a5 100644 --- a/xen/include/xen/bitops.h +++ b/xen/include/xen/bitops.h @@ -31,6 +31,23 @@ unsigned int __pure generic_flsl(unsigned long x); =20 #include =20 +/* + * Find First/Last Set bit (all forms). + * + * Bits are labelled from 1. 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1716581052791100005 The asm in arch_ffs() is safe but inefficient. CMOV would be an improvement over a conditional branch, but for 64bit CPUs both Intel and AMD have provided enough details about the behaviour for a z= ero input. It is safe to pre-load the destination register with -1 and drop the conditional logic. However, it is common to find ffs() in a context where the optimiser knows that x in nonzero even if it the value isn't known precisely, and in that c= ase it's safe to drop the preload of -1 too. There are only a handful of uses of ffs() in the x86 build, and all of them improve as a result of this: add/remove: 0/0 grow/shrink: 0/2 up/down: 0/-31 (-31) Function old new delta mask_write 114 107 -7 xmem_pool_alloc 1063 1039 -24 Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Wei Liu CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Oleksii Kurochko CC: Shawn Anastasio CC: consulting@bugseng.com CC: Simone Ballarin CC: Federico Serafini CC: Nicola Vetrini v2: * New. * Use __builtin_constant_p(x > 0) to optimise better. --- xen/arch/x86/include/asm/bitops.h | 26 +++++++++++++++++++++----- 1 file changed, 21 insertions(+), 5 deletions(-) diff --git a/xen/arch/x86/include/asm/bitops.h b/xen/arch/x86/include/asm/b= itops.h index 122767fc0d10..1d7aea6065ef 100644 --- a/xen/arch/x86/include/asm/bitops.h +++ b/xen/arch/x86/include/asm/bitops.h @@ -432,12 +432,28 @@ static inline int ffsl(unsigned long x) =20 static always_inline unsigned int arch_ffs(unsigned int x) { - int r; + unsigned int r; + + if ( __builtin_constant_p(x > 0) && x > 0 ) + { + /* Safe, when the compiler knows that x is nonzero. */ + asm ( "bsf %[val], %[res]" + : [res] "=3Dr" (r) + : [val] "rm" (x) ); + } + else + { + /* + * The AMD manual states that BSF won't modify the destination + * register if x=3D0. The Intel manual states that the result is + * undefined, but the architects have said that the register is + * written back with it's old value (zero extended as normal). + */ + asm ( "bsf %[val], %[res]" + : [res] "=3Dr" (r) + : [val] "rm" (x), "[res]" (-1) ); + } =20 - asm ( "bsf %1,%0\n\t" - "jnz 1f\n\t" - "mov $-1,%0\n" - "1:" : "=3Dr" (r) : "rm" (x)); return r + 1; } #define arch_ffs arch_ffs --=20 2.30.2 From nobody Mon Nov 25 19:17:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=reject dis=none) header.from=citrix.com ARC-Seal: i=1; a=rsa-sha256; t=1716581052; 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Fri, 24 May 2024 13:03:51 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Oleksii Kurochko , Shawn Anastasio , "consulting @ bugseng . com" , Simone Ballarin , Federico Serafini , Nicola Vetrini Subject: [PATCH v2 08/13] xen/bitops: Implement ffsl() in common logic Date: Fri, 24 May 2024 21:03:33 +0100 Message-Id: <20240524200338.1232391-9-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240524200338.1232391-1-andrew.cooper3@citrix.com> References: <20240524200338.1232391-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1716581054589100007 Just like ffs() in the previous changes. Express the upper bound of the testing in terms of BITS_PER_LONG as it varies between architectures. Signed-off-by: Andrew Cooper Acked-by: Stefano Stabellini Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Wei Liu CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Oleksii Kurochko CC: Shawn Anastasio CC: consulting@bugseng.com CC: Simone Ballarin CC: Federico Serafini CC: Nicola Vetrini v2: * Swap to #if BITS_PER_LONG > 32 to avoid a compile error on arm32 * Changes to mirror ffs() v2. --- xen/arch/arm/include/asm/bitops.h | 2 +- xen/arch/ppc/include/asm/bitops.h | 2 +- xen/arch/x86/include/asm/bitops.h | 35 ++++++++++++++++--------------- xen/common/bitops.c | 13 ++++++++++++ xen/include/xen/bitops.h | 12 +++++++++++ 5 files changed, 45 insertions(+), 19 deletions(-) diff --git a/xen/arch/arm/include/asm/bitops.h b/xen/arch/arm/include/asm/b= itops.h index a88ec2612e16..ba39802c9de3 100644 --- a/xen/arch/arm/include/asm/bitops.h +++ b/xen/arch/arm/include/asm/bitops.h @@ -158,7 +158,7 @@ static inline int fls(unsigned int x) =20 =20 #define arch_ffs(x) ((x) ? 1 + __builtin_ctz(x) : 0) -#define ffsl(x) ({ unsigned long __t =3D (x); flsl(ISOLATE_LSB(__t)); }) +#define arch_ffsl(x) ((x) ? 1 + __builtin_ctzl(x) : 0) =20 /** * find_first_set_bit - find the first set bit in @word diff --git a/xen/arch/ppc/include/asm/bitops.h b/xen/arch/ppc/include/asm/b= itops.h index 5c36a6cc0ce3..ce0f6436f727 100644 --- a/xen/arch/ppc/include/asm/bitops.h +++ b/xen/arch/ppc/include/asm/bitops.h @@ -174,7 +174,7 @@ static inline int __test_and_clear_bit(int nr, volatile= void *addr) #define flsl(x) generic_flsl(x) #define fls(x) generic_flsl(x) #define arch_ffs(x) ((x) ? 1 + __builtin_ctz(x) : 0) -#define ffsl(x) ({ unsigned long t_ =3D (x); flsl(t_ & -t_); }) +#define arch_ffsl(x) ((x) ? 1 + __builtin_ctzl(x) : 0) =20 /** * hweightN - returns the hamming weight of a N-bit word diff --git a/xen/arch/x86/include/asm/bitops.h b/xen/arch/x86/include/asm/b= itops.h index 1d7aea6065ef..51d3c0f40473 100644 --- a/xen/arch/x86/include/asm/bitops.h +++ b/xen/arch/x86/include/asm/bitops.h @@ -413,23 +413,6 @@ static inline unsigned int find_first_set_bit(unsigned= long word) return (unsigned int)word; } =20 -/** - * ffs - find first bit set - * @x: the word to search - * - * This is defined the same way as the libc and compiler builtin ffs routi= nes. - */ -static inline int ffsl(unsigned long x) -{ - long r; - - asm ( "bsf %1,%0\n\t" - "jnz 1f\n\t" - "mov $-1,%0\n" - "1:" : "=3Dr" (r) : "rm" (x)); - return (int)r+1; -} - static always_inline unsigned int arch_ffs(unsigned int x) { unsigned int r; @@ -458,6 +441,24 @@ static always_inline unsigned int arch_ffs(unsigned in= t x) } #define arch_ffs arch_ffs =20 +static always_inline unsigned int arch_ffsl(unsigned long x) +{ + unsigned int r; + + /* See arch_ffs() for safety discussions. */ + if ( __builtin_constant_p(x > 0) && x > 0 ) + asm ( "bsf %[val], %q[res]" + : [res] "=3Dr" (r) + : [val] "rm" (x) ); + else + asm ( "bsf %[val], %q[res]" + : [res] "=3Dr" (r) + : [val] "rm" (x), "[res]" (-1) ); + + return r + 1; +} +#define arch_ffsl arch_ffsl + /** * fls - find last bit set * @x: the word to search diff --git a/xen/common/bitops.c b/xen/common/bitops.c index 8c161b8ea7fa..b3813f818198 100644 --- a/xen/common/bitops.c +++ b/xen/common/bitops.c @@ -11,6 +11,19 @@ static void __init test_ffs(void) CHECK(ffs, 7, 1); CHECK(ffs, 6, 2); CHECK(ffs, 0x80000000U, 32); + + /* unsigned int ffsl(unsigned long) */ + CHECK(ffsl, 0, 0); + CHECK(ffsl, 1, 1); + CHECK(ffsl, 3, 1); + CHECK(ffsl, 7, 1); + CHECK(ffsl, 6, 2); + + CHECK(ffsl, 1UL << (BITS_PER_LONG - 1), BITS_PER_LONG); +#if BITS_PER_LONG > 32 + CHECK(ffsl, 1UL << 32, 33); + CHECK(ffsl, 1UL << 63, 64); +#endif } =20 static void __init __constructor test_bitops(void) diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h index f7e90a2893a5..88cf27a88bcf 100644 --- a/xen/include/xen/bitops.h +++ b/xen/include/xen/bitops.h @@ -48,6 +48,18 @@ static always_inline __pure unsigned int ffs(unsigned in= t x) #endif } =20 +static always_inline __pure unsigned int ffsl(unsigned long x) +{ + if ( __builtin_constant_p(x) ) + return __builtin_ffsl(x); + +#ifdef arch_ffs + return arch_ffsl(x); +#else + return generic_ffsl(x); +#endif +} + /* --------------------- Please tidy below here --------------------- */ =20 #ifndef find_next_bit --=20 2.30.2 From nobody Mon Nov 25 19:17:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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Fri, 24 May 2024 13:03:52 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Oleksii Kurochko , Shawn Anastasio , "consulting @ bugseng . com" , Simone Ballarin , Federico Serafini , Nicola Vetrini Subject: [PATCH v2 09/13] xen/bitops: Replace find_first_set_bit() with ffsl() - 1 Date: Fri, 24 May 2024 21:03:34 +0100 Message-Id: <20240524200338.1232391-10-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20240524200338.1232391-1-andrew.cooper3@citrix.com> References: <20240524200338.1232391-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1716581056683100007 find_first_set_bit() is a Xen-ism which has undefined behaviour with a 0 input. The latter is well defined with an input of 0, and is a found outsi= de of Xen too. _init_heap_pages() is the one special case here, comparing the LSB of two different addresses. The -1 cancels off both sides of the expression. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Wei Liu CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Oleksii Kurochko CC: Shawn Anastasio CC: consulting@bugseng.com CC: Simone Ballarin CC: Federico Serafini CC: Nicola Vetrini v2: * Reorder from later in the series to keep ARM bisectable In an x86 build, we get the following delta: add/remove: 0/0 grow/shrink: 2/4 up/down: 39/-52 (-13) Function old new delta hpet_write 2183 2206 +23 init_heap_pages 1222 1238 +16 dom0_construct_pvh 3959 3958 -1 mapping_order 139 126 -13 guest_physmap_mark_populate_on_demand 1301 1285 -16 vcpumask_to_pcpumask 525 503 -22 so the optimiser improvements for ffsl() really do speak for themselves. I'm surprised by the increase in hpet_write(), but looking at the code, it very clearly wants the same treatment as: commit 188fa82305e72b725473db9146e20cc9abf7bff3 Author: Andrew Cooper Date: Fri Mar 15 11:31:33 2024 xen/vpci: Improve code generation in mask_write() which I'm confident will end up as a net improvement. --- xen/arch/x86/guest/xen/xen.c | 4 ++-- xen/arch/x86/hvm/dom0_build.c | 2 +- xen/arch/x86/hvm/hpet.c | 8 ++++---- xen/arch/x86/include/asm/pt-contig-markers.h | 2 +- xen/arch/x86/mm.c | 2 +- xen/arch/x86/mm/p2m-pod.c | 4 ++-- xen/common/page_alloc.c | 2 +- xen/common/softirq.c | 2 +- xen/drivers/passthrough/amd/iommu_map.c | 2 +- xen/drivers/passthrough/iommu.c | 4 ++-- xen/drivers/passthrough/x86/iommu.c | 4 ++-- 11 files changed, 18 insertions(+), 18 deletions(-) diff --git a/xen/arch/x86/guest/xen/xen.c b/xen/arch/x86/guest/xen/xen.c index d9768cc9527d..7484b3f73ad3 100644 --- a/xen/arch/x86/guest/xen/xen.c +++ b/xen/arch/x86/guest/xen/xen.c @@ -168,14 +168,14 @@ static void cf_check xen_evtchn_upcall(void) =20 while ( pending ) { - unsigned int l1 =3D find_first_set_bit(pending); + unsigned int l1 =3D ffsl(pending) - 1; unsigned long evtchn =3D xchg(&XEN_shared_info->evtchn_pending[l1]= , 0); =20 __clear_bit(l1, &pending); evtchn &=3D ~XEN_shared_info->evtchn_mask[l1]; while ( evtchn ) { - unsigned int port =3D find_first_set_bit(evtchn); + unsigned int port =3D ffsl(evtchn) - 1; =20 __clear_bit(port, &evtchn); port +=3D l1 * BITS_PER_LONG; diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c index b0cb96c3bc76..68c08bbe94f7 100644 --- a/xen/arch/x86/hvm/dom0_build.c +++ b/xen/arch/x86/hvm/dom0_build.c @@ -139,7 +139,7 @@ static int __init pvh_populate_memory_range(struct doma= in *d, order =3D get_order_from_pages(end - start + 1); order =3D min(order ? order - 1 : 0, max_order); /* The order allocated and populated must be aligned to the addres= s. */ - order =3D min(order, start ? find_first_set_bit(start) : MAX_ORDER= ); + order =3D min(order, start ? ffsl(start) - 1 : MAX_ORDER); page =3D alloc_domheap_pages(d, order, dom0_memflags | MEMF_no_scr= ub); if ( page =3D=3D NULL ) { diff --git a/xen/arch/x86/hvm/hpet.c b/xen/arch/x86/hvm/hpet.c index 12b00b770257..37e765e97df9 100644 --- a/xen/arch/x86/hvm/hpet.c +++ b/xen/arch/x86/hvm/hpet.c @@ -335,7 +335,7 @@ static void timer_sanitize_int_route(HPETState *h, unsi= gned int tn) * enabled pick the first irq. */ timer_config(h, tn) |=3D - MASK_INSR(find_first_set_bit(timer_int_route_cap(h, tn)), + MASK_INSR(ffsl(timer_int_route_cap(h, tn)) - 1, HPET_TN_ROUTE); } =20 @@ -409,7 +409,7 @@ static int cf_check hpet_write( { bool active; =20 - i =3D find_first_set_bit(new_val); + i =3D ffsl(new_val) - 1; if ( i >=3D HPET_TIMER_NUM ) break; __clear_bit(i, &new_val); @@ -535,14 +535,14 @@ static int cf_check hpet_write( /* stop/start timers whos state was changed by this write. */ while (stop_timers) { - i =3D find_first_set_bit(stop_timers); + i =3D ffsl(stop_timers) - 1; __clear_bit(i, &stop_timers); hpet_stop_timer(h, i, guest_time); } =20 while (start_timers) { - i =3D find_first_set_bit(start_timers); + i =3D ffsl(start_timers) - 1; __clear_bit(i, &start_timers); hpet_set_timer(h, i, guest_time); } diff --git a/xen/arch/x86/include/asm/pt-contig-markers.h b/xen/arch/x86/in= clude/asm/pt-contig-markers.h index b3c1fe803534..e8c8157d605f 100644 --- a/xen/arch/x86/include/asm/pt-contig-markers.h +++ b/xen/arch/x86/include/asm/pt-contig-markers.h @@ -60,7 +60,7 @@ static bool pt_update_contig_markers(uint64_t *pt, unsign= ed int idx, /* Step 1: Reduce markers in lower numbered entries. */ while ( i ) { - b =3D find_first_set_bit(i); + b =3D ffsl(i) - 1; i &=3D ~(1U << b); if ( GET_MARKER(pt[i]) <=3D b ) break; diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index d968bbbc7315..2a84bdae670b 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -3424,7 +3424,7 @@ static int vcpumask_to_pcpumask( { unsigned int cpu; =20 - vcpu_id =3D find_first_set_bit(vmask); + vcpu_id =3D ffsl(vmask) - 1; vmask &=3D ~(1UL << vcpu_id); vcpu_id +=3D vcpu_bias; if ( (vcpu_id >=3D d->max_vcpus) ) diff --git a/xen/arch/x86/mm/p2m-pod.c b/xen/arch/x86/mm/p2m-pod.c index 1c727c78c833..bd84fe9e27ee 100644 --- a/xen/arch/x86/mm/p2m-pod.c +++ b/xen/arch/x86/mm/p2m-pod.c @@ -684,7 +684,7 @@ unsigned long p2m_pod_decrease_reservation(struct domain *d, gfn_t gfn, unsigned int ord= er) { unsigned long left =3D 1UL << order, ret =3D 0; - unsigned int chunk_order =3D find_first_set_bit(gfn_x(gfn) | left); + unsigned int chunk_order =3D ffsl(gfn_x(gfn) | left) - 1; =20 do { ret +=3D decrease_reservation(d, gfn, chunk_order); @@ -1393,7 +1393,7 @@ guest_physmap_mark_populate_on_demand(struct domain *= d, unsigned long gfn, unsigned int order) { unsigned long left =3D 1UL << order; - unsigned int chunk_order =3D find_first_set_bit(gfn | left); + unsigned int chunk_order =3D ffsl(gfn | left) - 1; int rc; =20 if ( !paging_mode_translate(d) ) diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c index 8d3342e95236..054b7edb3989 100644 --- a/xen/common/page_alloc.c +++ b/xen/common/page_alloc.c @@ -1819,7 +1819,7 @@ static void _init_heap_pages(const struct page_info *= pg, if ( unlikely(!avail[nid]) ) { bool use_tail =3D IS_ALIGNED(s, 1UL << MAX_ORDER) && - (find_first_set_bit(e) <=3D find_first_set_bit(s)); + (ffsl(e) <=3D ffsl(s)); unsigned long n; =20 n =3D init_node_heap(nid, s, nr_pages, &use_tail); diff --git a/xen/common/softirq.c b/xen/common/softirq.c index 321d26902d37..bee4a82009c3 100644 --- a/xen/common/softirq.c +++ b/xen/common/softirq.c @@ -48,7 +48,7 @@ static void __do_softirq(unsigned long ignore_mask) || cpu_is_offline(cpu) ) break; =20 - i =3D find_first_set_bit(pending); + i =3D ffsl(pending) - 1; clear_bit(i, &softirq_pending(cpu)); (*softirq_handlers[i])(); } diff --git a/xen/drivers/passthrough/amd/iommu_map.c b/xen/drivers/passthro= ugh/amd/iommu_map.c index e0f4fe736a8d..f1061bfc798c 100644 --- a/xen/drivers/passthrough/amd/iommu_map.c +++ b/xen/drivers/passthrough/amd/iommu_map.c @@ -137,7 +137,7 @@ static void set_iommu_ptes_present(unsigned long pt_mfn, ASSERT(!pde->u); =20 if ( pde > table ) - ASSERT(pde->ign0 =3D=3D find_first_set_bit(pde - table)); + ASSERT(pde->ign0 =3D=3D ffsl(pde - table) - 1); else ASSERT(pde->ign0 =3D=3D CONTIG_LEVEL_SHIFT); =20 diff --git a/xen/drivers/passthrough/iommu.c b/xen/drivers/passthrough/iomm= u.c index ba18136c461c..50bfd62553ae 100644 --- a/xen/drivers/passthrough/iommu.c +++ b/xen/drivers/passthrough/iommu.c @@ -305,7 +305,7 @@ static unsigned int mapping_order(const struct domain_i= ommu *hd, { unsigned long res =3D dfn_x(dfn) | mfn_x(mfn); unsigned long sizes =3D hd->platform_ops->page_sizes; - unsigned int bit =3D find_first_set_bit(sizes), order =3D 0; + unsigned int bit =3D ffsl(sizes) - 1, order =3D 0; =20 ASSERT(bit =3D=3D PAGE_SHIFT); =20 @@ -313,7 +313,7 @@ static unsigned int mapping_order(const struct domain_i= ommu *hd, { unsigned long mask; =20 - bit =3D find_first_set_bit(sizes); + bit =3D ffsl(sizes) - 1; mask =3D (1UL << bit) - 1; if ( nr <=3D mask || (res & mask) ) break; diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/= x86/iommu.c index 304a2f5480c7..cc0062b02712 100644 --- a/xen/drivers/passthrough/x86/iommu.c +++ b/xen/drivers/passthrough/x86/iommu.c @@ -641,7 +641,7 @@ struct page_info *iommu_alloc_pgtable(struct domain_iom= mu *hd, if ( contig_mask ) { /* See pt-contig-markers.h for a description of the marker scheme.= */ - unsigned int i, shift =3D find_first_set_bit(contig_mask); + unsigned int i, shift =3D ffsl(contig_mask) - 1; =20 ASSERT((CONTIG_LEVEL_SHIFT & (contig_mask >> shift)) =3D=3D CONTIG= _LEVEL_SHIFT); =20 @@ -652,7 +652,7 @@ struct page_info *iommu_alloc_pgtable(struct domain_iom= mu *hd, =20 for ( i =3D 4; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1716581062652100001 No more users. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Wei Liu CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Oleksii Kurochko CC: Shawn Anastasio CC: consulting@bugseng.com CC: Simone Ballarin CC: Federico Serafini CC: Nicola Vetrini v2: * Reorder from later in the series to keep ARM bisectable --- xen/arch/arm/include/asm/bitops.h | 9 --------- xen/arch/ppc/include/asm/bitops.h | 9 --------- xen/arch/x86/include/asm/bitops.h | 12 ------------ 3 files changed, 30 deletions(-) diff --git a/xen/arch/arm/include/asm/bitops.h b/xen/arch/arm/include/asm/b= itops.h index ba39802c9de3..d30ba44598e3 100644 --- a/xen/arch/arm/include/asm/bitops.h +++ b/xen/arch/arm/include/asm/bitops.h @@ -160,15 +160,6 @@ static inline int fls(unsigned int x) #define arch_ffs(x) ((x) ? 1 + __builtin_ctz(x) : 0) #define arch_ffsl(x) ((x) ? 1 + __builtin_ctzl(x) : 0) =20 -/** - * find_first_set_bit - find the first set bit in @word - * @word: the word to search - * - * Returns the bit-number of the first set bit (first bit being 0). - * The input must *not* be zero. - */ -#define find_first_set_bit(w) (ffsl(w) - 1) - /** * hweightN - returns the hamming weight of a N-bit word * @x: the word to weigh diff --git a/xen/arch/ppc/include/asm/bitops.h b/xen/arch/ppc/include/asm/b= itops.h index ce0f6436f727..761361291e6f 100644 --- a/xen/arch/ppc/include/asm/bitops.h +++ b/xen/arch/ppc/include/asm/bitops.h @@ -187,13 +187,4 @@ static inline int __test_and_clear_bit(int nr, volatil= e void *addr) #define hweight16(x) __builtin_popcount((uint16_t)(x)) #define hweight8(x) __builtin_popcount((uint8_t)(x)) =20 -/** - * find_first_set_bit - find the first set bit in @word - * @word: the word to search - * - * Returns the bit-number of the first set bit (first bit being 0). - * The input must *not* be zero. - */ -#define find_first_set_bit(x) (ffsl(x) - 1) - #endif /* _ASM_PPC_BITOPS_H */ diff --git a/xen/arch/x86/include/asm/bitops.h b/xen/arch/x86/include/asm/b= itops.h index 51d3c0f40473..830e488f33a0 100644 --- a/xen/arch/x86/include/asm/bitops.h +++ b/xen/arch/x86/include/asm/bitops.h @@ -401,18 +401,6 @@ static always_inline unsigned int __scanbit(unsigned l= ong val, unsigned int max) r__; = \ }) =20 -/** - * find_first_set_bit - find the first set bit in @word - * @word: the word to search - *=20 - * Returns the bit-number of the first set bit. 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1716581058631100009 From: Oleksii Kurochko This is most easily done together because of how arm32 is currently structured, but it does just mirror the existing ffs()/ffsl() work. Introduce compile and boot time testing. Signed-off-by: Oleksii Kurochko Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Wei Liu CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Oleksii Kurochko CC: Shawn Anastasio CC: consulting@bugseng.com CC: Simone Ballarin CC: Federico Serafini CC: Nicola Vetrini v2: * New, incorperated from Oleksii's RISC-V series and adjusted. for x86: add/remove: 0/0 grow/shrink: 3/17 up/down: 28/-153 (-125) Function old new delta pci_enable_msi 1033 1049 +16 vlapic_lowest_prio 330 338 +8 kexec_early_calculations 53 57 +4 pci_restore_msi_state 1159 1157 -2 arch_hwdom_irqs 61 59 -2 control_read 132 129 -3 pci_enable_msi.cold 121 117 -4 arch_get_dma_bitsize 173 169 -4 xmem_pool_alloc 1039 1032 -7 xenheap_max_mfn 49 42 -7 mba_sanitize_thrtl 83 76 -7 xstate_init 807 799 -8 offline_page 965 957 -8 apicid_to_socket 160 152 -8 vlapic_find_highest_vector 61 48 -13 xmem_pool_free 983 967 -16 iommu_alloc 935 919 -16 free_heap_pages 1512 1496 -16 detect_ht 318 302 -16 alloc_heap_pages 1569 1553 -16 showing that the optimiser can now do a better job in most cases. --- xen/arch/arm/include/asm/arm32/bitops.h | 2 -- xen/arch/arm/include/asm/arm64/bitops.h | 12 ------- xen/arch/arm/include/asm/bitops.h | 19 ++-------- xen/arch/ppc/include/asm/bitops.h | 4 +-- xen/arch/x86/include/asm/bitops.h | 46 +++++++++++++++---------- xen/common/bitops.c | 25 ++++++++++++++ xen/include/xen/bitops.h | 24 +++++++++++++ 7 files changed, 80 insertions(+), 52 deletions(-) diff --git a/xen/arch/arm/include/asm/arm32/bitops.h b/xen/arch/arm/include= /asm/arm32/bitops.h index d0309d47c188..0d7bb12d5c19 100644 --- a/xen/arch/arm/include/asm/arm32/bitops.h +++ b/xen/arch/arm/include/asm/arm32/bitops.h @@ -1,8 +1,6 @@ #ifndef _ARM_ARM32_BITOPS_H #define _ARM_ARM32_BITOPS_H =20 -#define flsl fls - /* * Little endian assembly bitops. nr =3D 0 -> byte 0 bit 0. */ diff --git a/xen/arch/arm/include/asm/arm64/bitops.h b/xen/arch/arm/include= /asm/arm64/bitops.h index 906d84e5f295..a6135838dcfa 100644 --- a/xen/arch/arm/include/asm/arm64/bitops.h +++ b/xen/arch/arm/include/asm/arm64/bitops.h @@ -1,18 +1,6 @@ #ifndef _ARM_ARM64_BITOPS_H #define _ARM_ARM64_BITOPS_H =20 -static inline int flsl(unsigned long x) -{ - uint64_t ret; - - if (__builtin_constant_p(x)) - return generic_flsl(x); - - asm("clz\t%0, %1" : "=3Dr" (ret) : "r" (x)); - - return BITS_PER_LONG - ret; -} - /* Based on linux/include/asm-generic/bitops/find.h */ =20 #ifndef CONFIG_GENERIC_FIND_FIRST_BIT diff --git a/xen/arch/arm/include/asm/bitops.h b/xen/arch/arm/include/asm/b= itops.h index d30ba44598e3..8f4bdc09d128 100644 --- a/xen/arch/arm/include/asm/bitops.h +++ b/xen/arch/arm/include/asm/bitops.h @@ -140,25 +140,10 @@ static inline int test_bit(int nr, const volatile voi= d *addr) return 1UL & (p[BITOP_WORD(nr)] >> (nr & (BITOP_BITS_PER_WORD-1))); } =20 -/* - * On ARMv5 and above those functions can be implemented around - * the clz instruction for much better code efficiency. - */ - -static inline int fls(unsigned int x) -{ - int ret; - - if (__builtin_constant_p(x)) - return generic_flsl(x); - - asm("clz\t%"__OP32"0, %"__OP32"1" : "=3Dr" (ret) : "r" (x)); - return 32 - ret; -} - - #define arch_ffs(x) ((x) ? 1 + __builtin_ctz(x) : 0) #define arch_ffsl(x) ((x) ? 1 + __builtin_ctzl(x) : 0) +#define arch_fls(x) ((x) ? 32 - __builtin_clz(x) : 0) +#define arch_flsl(x) ((x) ? BITS_PER_LONG - __builtin_clzl(x) : 0) =20 /** * hweightN - returns the hamming weight of a N-bit word diff --git a/xen/arch/ppc/include/asm/bitops.h b/xen/arch/ppc/include/asm/b= itops.h index 761361291e6f..8119b5ace877 100644 --- a/xen/arch/ppc/include/asm/bitops.h +++ b/xen/arch/ppc/include/asm/bitops.h @@ -171,10 +171,10 @@ static inline int __test_and_clear_bit(int nr, volati= le void *addr) return (old & mask) !=3D 0; } =20 -#define flsl(x) generic_flsl(x) -#define fls(x) generic_flsl(x) #define arch_ffs(x) ((x) ? 1 + __builtin_ctz(x) : 0) #define arch_ffsl(x) ((x) ? 1 + __builtin_ctzl(x) : 0) +#define arch_fls(x) ((x) ? 32 - __builtin_clz(x) : 0) +#define arch_flsl(x) ((x) ? BITS_PER_LONG - __builtin_clzl(x) : 0) =20 /** * hweightN - returns the hamming weight of a N-bit word diff --git a/xen/arch/x86/include/asm/bitops.h b/xen/arch/x86/include/asm/b= itops.h index 830e488f33a0..fc9fe73ad5ba 100644 --- a/xen/arch/x86/include/asm/bitops.h +++ b/xen/arch/x86/include/asm/bitops.h @@ -447,33 +447,41 @@ static always_inline unsigned int arch_ffsl(unsigned = long x) } #define arch_ffsl arch_ffsl =20 -/** - * fls - find last bit set - * @x: the word to search - * - * This is defined the same way as ffs. - */ -static inline int flsl(unsigned long x) +static always_inline unsigned int arch_fls(unsigned int x) { - long r; + unsigned int r; + + /* See arch_ffs() for safety discussions. */ + if ( __builtin_constant_p(x > 0) && x > 0 ) + asm ( "bsr %[val], %[res]" + : [res] "=3Dr" (r) + : [val] "rm" (x) ); + else + asm ( "bsr %[val], %[res]" + : [res] "=3Dr" (r) + : [val] "rm" (x), "[res]" (-1) ); =20 - asm ( "bsr %1,%0\n\t" - "jnz 1f\n\t" - "mov $-1,%0\n" - "1:" : "=3Dr" (r) : "rm" (x)); - return (int)r+1; + return r + 1; } +#define arch_fls arch_fls =20 -static inline int fls(unsigned int x) +static always_inline unsigned int arch_flsl(unsigned long x) { - int r; + unsigned int r; + + /* See arch_ffs() for safety discussions. */ + if ( __builtin_constant_p(x > 0) && x > 0 ) + asm ( "bsr %[val], %q[res]" + : [res] "=3Dr" (r) + : [val] "rm" (x) ); + else + asm ( "bsr %[val], %q[res]" + : [res] "=3Dr" (r) + : [val] "rm" (x), "[res]" (-1) ); =20 - asm ( "bsr %1,%0\n\t" - "jnz 1f\n\t" - "mov $-1,%0\n" - "1:" : "=3Dr" (r) : "rm" (x)); return r + 1; } +#define arch_flsl arch_flsl =20 /** * hweightN - returns the hamming weight of a N-bit word diff --git a/xen/common/bitops.c b/xen/common/bitops.c index b3813f818198..b4845d9e84d1 100644 --- a/xen/common/bitops.c +++ b/xen/common/bitops.c @@ -26,7 +26,32 @@ static void __init test_ffs(void) #endif } =20 +static void __init test_fls(void) +{ + /* unsigned int fls(unsigned int) */ + CHECK(fls, 0, 0); + CHECK(fls, 1, 1); + CHECK(fls, 3, 2); + CHECK(fls, 7, 3); + CHECK(fls, 6, 3); + CHECK(fls, 0x80000000U, 32); + + /* unsigned int flsl(unsigned long) */ + CHECK(flsl, 0, 0); + CHECK(flsl, 1, 1); + CHECK(flsl, 3, 2); + CHECK(flsl, 7, 3); + CHECK(flsl, 6, 3); + + CHECK(flsl, 1 | (1UL << (BITS_PER_LONG - 1)), BITS_PER_LONG); +#if BITS_PER_LONG > 32 + CHECK(flsl, 1 | (1UL << 32), 33); + CHECK(flsl, 1 | (1UL << 63), 64); +#endif +} + static void __init __constructor test_bitops(void) { test_ffs(); + test_fls(); } diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h index 88cf27a88bcf..e7df6377372d 100644 --- a/xen/include/xen/bitops.h +++ b/xen/include/xen/bitops.h @@ -60,6 +60,30 @@ static always_inline __pure unsigned int ffsl(unsigned l= ong x) #endif } =20 +static always_inline __pure unsigned int fls(unsigned int x) +{ + if ( __builtin_constant_p(x) ) + return x ? 32 - __builtin_clz(x) : 0; + +#ifdef arch_fls + return arch_fls(x); +#else + return generic_flsl(x); +#endif +} + +static always_inline __pure unsigned int flsl(unsigned long x) +{ + if ( __builtin_constant_p(x) ) + return x ? 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1716581064661100003 Implement ffs64() and fls64() as plain static inlines, dropping the ifdefary and intermediate generic_f?s64() forms. Add tests for all interesting bit positions at 32bit boundaries. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Wei Liu CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Oleksii Kurochko CC: Shawn Anastasio CC: consulting@bugseng.com CC: Simone Ballarin CC: Federico Serafini CC: Nicola Vetrini v2: * Use ULL rather than a uint64_t cast. * Extend to fls64() too. --- xen/common/bitops.c | 32 ++++++++++++++++++++++++++++++ xen/include/xen/bitops.h | 42 +++++++++++++++++++--------------------- 2 files changed, 52 insertions(+), 22 deletions(-) diff --git a/xen/common/bitops.c b/xen/common/bitops.c index b4845d9e84d1..5482e5a1218d 100644 --- a/xen/common/bitops.c +++ b/xen/common/bitops.c @@ -24,6 +24,22 @@ static void __init test_ffs(void) CHECK(ffsl, 1UL << 32, 33); CHECK(ffsl, 1UL << 63, 64); #endif + + /* + * unsigned int ffs64(uint64_t) + * + * 32-bit builds of Xen have to split this into two adjacent operation= s, + * so test all interesting bit positions across the divide. + */ + CHECK(ffs64, 0, 0); + CHECK(ffs64, 1, 1); + CHECK(ffs64, 3, 1); + CHECK(ffs64, 7, 1); + CHECK(ffs64, 6, 2); + + CHECK(ffs64, 0x8000000080000000ULL, 32); + CHECK(ffs64, 0x8000000100000000ULL, 33); + CHECK(ffs64, 0x8000000000000000ULL, 64); } =20 static void __init test_fls(void) @@ -48,6 +64,22 @@ static void __init test_fls(void) CHECK(flsl, 1 | (1UL << 32), 33); CHECK(flsl, 1 | (1UL << 63), 64); #endif + + /* + * unsigned int ffl64(uint64_t) + * + * 32-bit builds of Xen have to split this into two adjacent operation= s, + * so test all interesting bit positions across the divide. + */ + CHECK(fls64, 0, 0); + CHECK(fls64, 1, 1); + CHECK(fls64, 3, 2); + CHECK(fls64, 7, 3); + CHECK(fls64, 6, 3); + + CHECK(fls64, 0x0000000080000001ULL, 32); + CHECK(fls64, 0x0000000100000001ULL, 33); + CHECK(fls64, 0x8000000000000001ULL, 64); } =20 static void __init __constructor test_bitops(void) diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h index e7df6377372d..c5518d2c8552 100644 --- a/xen/include/xen/bitops.h +++ b/xen/include/xen/bitops.h @@ -60,6 +60,14 @@ static always_inline __pure unsigned int ffsl(unsigned l= ong x) #endif } =20 +static always_inline __pure unsigned int ffs64(uint64_t x) +{ + if ( BITS_PER_LONG =3D=3D 64 ) + return ffsl(x); + else + return !x || (uint32_t)x ? ffs(x) : ffs(x >> 32) + 32; +} + static always_inline __pure unsigned int fls(unsigned int x) { if ( __builtin_constant_p(x) ) @@ -84,6 +92,18 @@ static always_inline __pure unsigned int flsl(unsigned l= ong x) #endif } =20 +static always_inline __pure unsigned int fls64(uint64_t x) +{ + if ( BITS_PER_LONG =3D=3D 64 ) + return flsl(x); + else + { + uint32_t h =3D x >> 32; + + return h ? fls(h) + 32 : fls(x); + } +} + /* --------------------- Please tidy below here --------------------- */ =20 #ifndef find_next_bit @@ -134,28 +154,6 @@ extern unsigned long find_first_zero_bit(const unsigne= d long *addr, unsigned long size); #endif =20 -#if BITS_PER_LONG =3D=3D 64 -# define fls64 flsl -# define ffs64 ffsl -#else -# ifndef ffs64 -static inline int generic_ffs64(__u64 x) -{ - return !x || (__u32)x ? ffs(x) : ffs(x >> 32) + 32; -} -# define ffs64 generic_ffs64 -# endif -# ifndef fls64 -static inline int generic_fls64(__u64 x) -{ - __u32 h =3D x >> 32; - - return h ? fls(h) + 32 : fls(x); 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1716581056619100001 The #include can move to the top of the file now now that generic_f?s() have been untangled. Signed-off-by: Andrew Cooper Acked-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Wei Liu CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Oleksii Kurochko CC: Shawn Anastasio CC: consulting@bugseng.com CC: Simone Ballarin CC: Federico Serafini CC: Nicola Vetrini v2: * New --- xen/include/xen/bitops.h | 18 +++--------------- 1 file changed, 3 insertions(+), 15 deletions(-) diff --git a/xen/include/xen/bitops.h b/xen/include/xen/bitops.h index c5518d2c8552..6a5e28730a25 100644 --- a/xen/include/xen/bitops.h +++ b/xen/include/xen/bitops.h @@ -4,6 +4,8 @@ #include #include =20 +#include + /* * Create a contiguous bitmask starting at bit position @l and ending at * position @h. For example GENMASK(30, 21) gives us 0x7fe00000ul. @@ -15,27 +17,13 @@ (((~0ULL) << (l)) & (~0ULL >> (BITS_PER_LLONG - 1 - (h)))) =20 /* - * Find First/Last Set bit. + * Find First/Last Set bit (all forms). * * Bits are labelled from 1. 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1716906186291100001 ... and move x86's stub_selftest() under this new option. There is value in having these tests included in release builds too. It will shortly be used to gate the bitops unit tests on all architectures. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Wei Liu CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Oleksii Kurochko CC: Shawn Anastasio CC: consulting@bugseng.com CC: Simone Ballarin CC: Federico Serafini CC: Nicola Vetrini v2.5: * As suggested in "[PATCH v2 05/13] xen/bitops: Implement generic_f?sl() in lib/" I've gone with SELF_TESTS rather than BOOT_TESTS, because already in bitops we've got compile time tests (which aren't strictly boot time), and the livepatching testing wants to be included here and is definitely not boot time. --- xen/Kconfig.debug | 6 ++++++ xen/arch/x86/extable.c | 4 ++-- xen/arch/x86/setup.c | 2 +- 3 files changed, 9 insertions(+), 3 deletions(-) diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug index 61b24ac552cd..07ff7eb7ba83 100644 --- a/xen/Kconfig.debug +++ b/xen/Kconfig.debug @@ -29,6 +29,12 @@ config FRAME_POINTER maybe slower, but it gives very useful debugging information in case of any Xen bugs. =20 +config SELF_TESTS + bool "Extra self-testing" + default DEBUG + help + Enable extra unit and functional testing. + config COVERAGE bool "Code coverage support" depends on !LIVEPATCH diff --git a/xen/arch/x86/extable.c b/xen/arch/x86/extable.c index 8415cd1fa249..705cf9eb94ca 100644 --- a/xen/arch/x86/extable.c +++ b/xen/arch/x86/extable.c @@ -144,7 +144,7 @@ search_exception_table(const struct cpu_user_regs *regs= , unsigned long *stub_ra) return 0; } =20 -#ifdef CONFIG_DEBUG +#ifdef CONFIG_SELF_TESTS #include #include =20 @@ -214,7 +214,7 @@ int __init cf_check stub_selftest(void) return 0; } __initcall(stub_selftest); -#endif +#endif /* CONFIG_SELF_TESTS */ =20 unsigned long asmlinkage search_pre_exception_table(struct cpu_user_regs *= regs) { diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index b50c9c84af6d..dd51e68dbe5b 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -742,7 +742,7 @@ static void noreturn init_done(void) system_state =3D SYS_STATE_active; =20 /* Re-run stub recovery self-tests with CET-SS active. */ - if ( IS_ENABLED(CONFIG_DEBUG) && cpu_has_xen_shstk ) + if ( IS_ENABLED(CONFIG_SELF_TESTS) && cpu_has_xen_shstk ) stub_selftest(); =20 domain_unpause_by_systemcontroller(dom0); base-commit: 2d93f78bfe25f695d8ffb61d110da9df293ed71b --=20 2.30.2