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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 May 2024 17:06:43.7729 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ea2952d8-bd52-48b8-ce1b-08dc7693ba57 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000A346.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM3PR12MB9326 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1715965631089100003 Content-Type: text/plain; charset="utf-8" From: Volodymyr Babchuk Guest can try to read config space using different access sizes: 8, 16, 32, 64 bits. We need to take this into account when we are returning an error back to MMIO handler, otherwise it is possible to provide more data than requested: i.e. guest issues LDRB instruction to read one byte, but we are writing 0xFFFFFFFFFFFFFFFF in the target register. Signed-off-by: Volodymyr Babchuk Signed-off-by: Stewart Hildebrand Acked-by: Julien Grall --- v14->v15: * re-order so this patch comes before ("xen/arm: translate virtual PCI bus topology for guests") * s/access_mask/invalid/ * add U suffix to 1 * s/uint8_t/unsigned int/ * s/uint64_t/register_t/ * although Julien gave an Acked-by on v14, I omitted it due to the changes made in v15 v9->10: * New patch in v10. --- xen/arch/arm/vpci.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/vpci.c b/xen/arch/arm/vpci.c index 3bc4bb55082a..b63a356bb4a8 100644 --- a/xen/arch/arm/vpci.c +++ b/xen/arch/arm/vpci.c @@ -29,6 +29,8 @@ static int vpci_mmio_read(struct vcpu *v, mmio_info_t *in= fo, { struct pci_host_bridge *bridge =3D p; pci_sbdf_t sbdf =3D vpci_sbdf_from_gpa(bridge, info->gpa); + const unsigned int access_size =3D (1U << info->dabt.size) * 8; + const register_t invalid =3D GENMASK_ULL(access_size - 1, 0); /* data is needed to prevent a pointer cast on 32bit */ unsigned long data; =20 @@ -39,7 +41,7 @@ static int vpci_mmio_read(struct vcpu *v, mmio_info_t *in= fo, return 1; } =20 - *r =3D ~0ul; + *r =3D invalid; =20 return 0; } --=20 2.45.1