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a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1715598721; x=1747134721; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=awTpJTVuZnpLM2XGjDjoGafH08PnS/u8+TgC4HSOyp8=; b=QkR2tgYY3YLURtMFK+Xsy7vsrYjj8MQvOBX5Hvdvsf3y9lRTE0W0Qpcg aG0c+W7swVn1sPLAjZ8EC10LOimjrJU/C5KDHajyglVXngSjXM9P3eqPZ DIzQcLk2EsHG6ivyaFG8gZlUBhAVNB5Up1NDy9bzuY6xwJDrhYXoObjxg s=; X-IronPort-AV: E=Sophos;i="6.08,158,1712620800"; d="scan'208";a="726023919" X-Farcaster-Flow-ID: 0b46e58a-ee0e-4f27-b49c-9b2581b1cd16 From: Elias El Yandouzi To: CC: , , , Hongyan Xia , Julien Grall , Elias El Yandouzi Subject: [PATCH V3 03/19] x86/pv: Rewrite how building PV dom0 handles domheap mappings Date: Mon, 13 May 2024 11:11:01 +0000 Message-ID: <20240513111117.68828-4-eliasely@amazon.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240513111117.68828-1-eliasely@amazon.com> References: <20240513111117.68828-1-eliasely@amazon.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @amazon.com) X-ZM-MESSAGEID: 1715598747959100005 Content-Type: text/plain; charset="utf-8" From: Hongyan Xia Building a PV dom0 is allocating from the domheap but uses it like the xenheap. Use the pages as they should be. Signed-off-by: Hongyan Xia Signed-off-by: Julien Grall Signed-off-by: Elias El Yandouzi ---- Changes in V3: * Fold following patch 'x86/pv: Map L4 page table for shim domain' Changes in V2: * Clarify the commit message * Break the patch in two parts Changes since Hongyan's version: * Rebase * Remove spurious newline diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c index 807296c280..ac910b438a 100644 --- a/xen/arch/x86/pv/dom0_build.c +++ b/xen/arch/x86/pv/dom0_build.c @@ -382,6 +382,10 @@ int __init dom0_construct_pv(struct domain *d, l3_pgentry_t *l3tab =3D NULL, *l3start =3D NULL; l2_pgentry_t *l2tab =3D NULL, *l2start =3D NULL; l1_pgentry_t *l1tab =3D NULL, *l1start =3D NULL; + mfn_t l4start_mfn =3D INVALID_MFN; + mfn_t l3start_mfn =3D INVALID_MFN; + mfn_t l2start_mfn =3D INVALID_MFN; + mfn_t l1start_mfn =3D INVALID_MFN; =20 /* * This fully describes the memory layout of the initial domain. All @@ -710,22 +714,32 @@ int __init dom0_construct_pv(struct domain *d, v->arch.pv.event_callback_cs =3D FLAT_COMPAT_KERNEL_CS; } =20 +#define UNMAP_MAP_AND_ADVANCE(mfn_var, virt_var, maddr) \ +do { \ + unmap_domain_page(virt_var); \ + mfn_var =3D maddr_to_mfn(maddr); \ + maddr +=3D PAGE_SIZE; \ + virt_var =3D map_domain_page(mfn_var); \ +} while ( false ) + if ( !compat ) { maddr_to_page(mpt_alloc)->u.inuse.type_info =3D PGT_l4_page_table; - l4start =3D l4tab =3D __va(mpt_alloc); mpt_alloc +=3D PAGE_SIZE; + UNMAP_MAP_AND_ADVANCE(l4start_mfn, l4start, mpt_alloc); + l4tab =3D l4start; clear_page(l4tab); - init_xen_l4_slots(l4tab, _mfn(virt_to_mfn(l4start)), - d, INVALID_MFN, true); - v->arch.guest_table =3D pagetable_from_paddr(__pa(l4start)); + init_xen_l4_slots(l4tab, l4start_mfn, d, INVALID_MFN, true); + v->arch.guest_table =3D pagetable_from_mfn(l4start_mfn); } else { /* Monitor table already created by switch_compat(). */ - l4start =3D l4tab =3D __va(pagetable_get_paddr(v->arch.guest_table= )); + l4start_mfn =3D pagetable_get_mfn(v->arch.guest_table); + l4start =3D l4tab =3D map_domain_page(l4start_mfn); /* See public/xen.h on why the following is needed. */ maddr_to_page(mpt_alloc)->u.inuse.type_info =3D PGT_l3_page_table; l3start =3D __va(mpt_alloc); mpt_alloc +=3D PAGE_SIZE; + UNMAP_MAP_AND_ADVANCE(l3start_mfn, l3start, mpt_alloc); } =20 l4tab +=3D l4_table_offset(v_start); @@ -735,14 +749,16 @@ int __init dom0_construct_pv(struct domain *d, if ( !((unsigned long)l1tab & (PAGE_SIZE-1)) ) { maddr_to_page(mpt_alloc)->u.inuse.type_info =3D PGT_l1_page_ta= ble; - l1start =3D l1tab =3D __va(mpt_alloc); mpt_alloc +=3D PAGE_SIZ= E; + UNMAP_MAP_AND_ADVANCE(l1start_mfn, l1start, mpt_alloc); + l1tab =3D l1start; clear_page(l1tab); if ( count =3D=3D 0 ) l1tab +=3D l1_table_offset(v_start); if ( !((unsigned long)l2tab & (PAGE_SIZE-1)) ) { maddr_to_page(mpt_alloc)->u.inuse.type_info =3D PGT_l2_pag= e_table; - l2start =3D l2tab =3D __va(mpt_alloc); mpt_alloc +=3D PAGE= _SIZE; + UNMAP_MAP_AND_ADVANCE(l2start_mfn, l2start, mpt_alloc); + l2tab =3D l2start; clear_page(l2tab); if ( count =3D=3D 0 ) l2tab +=3D l2_table_offset(v_start); @@ -752,19 +768,19 @@ int __init dom0_construct_pv(struct domain *d, { maddr_to_page(mpt_alloc)->u.inuse.type_info =3D PGT_l3_page_table; - l3start =3D __va(mpt_alloc); mpt_alloc +=3D PAGE_S= IZE; + UNMAP_MAP_AND_ADVANCE(l3start_mfn, l3start, mpt_al= loc); } l3tab =3D l3start; clear_page(l3tab); if ( count =3D=3D 0 ) l3tab +=3D l3_table_offset(v_start); - *l4tab =3D l4e_from_paddr(__pa(l3start), L4_PROT); + *l4tab =3D l4e_from_mfn(l3start_mfn, L4_PROT); l4tab++; } - *l3tab =3D l3e_from_paddr(__pa(l2start), L3_PROT); + *l3tab =3D l3e_from_mfn(l2start_mfn, L3_PROT); l3tab++; } - *l2tab =3D l2e_from_paddr(__pa(l1start), L2_PROT); + *l2tab =3D l2e_from_mfn(l1start_mfn, L2_PROT); l2tab++; } if ( count < initrd_pfn || count >=3D initrd_pfn + PFN_UP(initrd_l= en) ) @@ -783,27 +799,31 @@ int __init dom0_construct_pv(struct domain *d, =20 if ( compat ) { - l2_pgentry_t *l2t; - /* Ensure the first four L3 entries are all populated. */ for ( i =3D 0, l3tab =3D l3start; i < 4; ++i, ++l3tab ) { if ( !l3e_get_intpte(*l3tab) ) { maddr_to_page(mpt_alloc)->u.inuse.type_info =3D PGT_l2_pag= e_table; - l2tab =3D __va(mpt_alloc); mpt_alloc +=3D PAGE_SIZE; - clear_page(l2tab); - *l3tab =3D l3e_from_paddr(__pa(l2tab), L3_PROT); + UNMAP_MAP_AND_ADVANCE(l2start_mfn, l2start, mpt_alloc); + clear_page(l2start); + *l3tab =3D l3e_from_mfn(l2start_mfn, L3_PROT); } if ( i =3D=3D 3 ) l3e_get_page(*l3tab)->u.inuse.type_info |=3D PGT_pae_xen_l= 2; } =20 - l2t =3D map_l2t_from_l3e(l3start[3]); - init_xen_pae_l2_slots(l2t, d); - unmap_domain_page(l2t); + UNMAP_DOMAIN_PAGE(l2start); + l2start =3D map_l2t_from_l3e(l3start[3]); + init_xen_pae_l2_slots(l2start, d); } =20 +#undef UNMAP_MAP_AND_ADVANCE + + UNMAP_DOMAIN_PAGE(l1start); + UNMAP_DOMAIN_PAGE(l2start); + UNMAP_DOMAIN_PAGE(l3start); + /* Pages that are part of page tables must be read only. */ mark_pv_pt_pages_rdonly(d, l4start, vpt_start, nr_pt_pages, &flush_fla= gs); =20 @@ -976,6 +996,8 @@ int __init dom0_construct_pv(struct domain *d, pv_shim_setup_dom(d, l4start, v_start, vxenstore_start, vconsole_s= tart, vphysmap_start, si); =20 + UNMAP_DOMAIN_PAGE(l4start); + #ifdef CONFIG_COMPAT if ( compat ) xlat_start_info(si, pv_shim ? XLAT_start_info_console_domU --=20 2.40.1