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[46.102.197.194]) by smtp.gmail.com with ESMTPSA id fi3-20020a170906da0300b00a2adb417051sm1153685ejb.216.2024.01.09.07.38.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Jan 2024 07:38:39 -0800 (PST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 2977078a-af05-11ee-98ef-6d05b1d4d9a1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cloud.com; s=cloud; t=1704814719; x=1705419519; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VhSOpe56MpOWcnrNuJqvTnfUTnjkdLUXYQWxAJ3egc0=; b=hJRR61ooKW04RYi5R4qI/97kiqsnxrvOZSFq8yagC5EBDbXLPDTUwvI5CJQDNe6Wzq NB8DJ0CtWifJtdwDCQ6h2xDSYACVyzQ2mN+YeVPIjQjUmL365c4VELfv/eQqI2X8rR9+ zI/NOSF4QcLIxrEZeRC+PO9Q7mZRdDeUB1Iag= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704814719; x=1705419519; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VhSOpe56MpOWcnrNuJqvTnfUTnjkdLUXYQWxAJ3egc0=; b=qfiiNeLl8AI4ocdg5qkh3craeIr/RzIy7ywP8/i1QAIbr7GDgdXmKEyQ5k9XJSa1vE U/iM6BllLCaz7qDWzQeRk0c9t3ZsXD0P4HbuHGj1CrzB/HAyIdd5SbgXFi2bnaEoj8d6 CCfd5qgjwVWz+qARKi1uDj3/smjt3gkYEYabyMmiCA5WRdOu3qmW99QV7FAC5R+lXg85 d7fT+EUCdPR1TjTGByZ/uEITpOL1aZztpm7JXkucZJhv0gt0rkI6RQpiRqgcW80xEJhx oCErUii50Pj77TVBfMxAKCKvGcRl2v91swoC4q3neu/m/ykVKuanmJTcx1cHg+fiwMK9 W6Hw== X-Gm-Message-State: AOJu0YxlKgxcorKd+FvaJfMo9D6gn/6bQ7sPqHaVtmdXrODUPxN+ISYU Vykx1bN9oplPuPlX9otZBCEq3OEYUsWagkP2a4ZhncSmOUI= X-Google-Smtp-Source: AGHT+IEZfJpx4+I0TuLd3gyZSUgBkd00EGOddGMDLqfVylYXXAZ9UoHQiChxbzuG2kD+kJPN4VqWZQ== X-Received: by 2002:a17:906:74c3:b0:a23:4b44:7dcc with SMTP id z3-20020a17090674c300b00a234b447dccmr790867ejl.33.1704814719495; Tue, 09 Jan 2024 07:38:39 -0800 (PST) From: Alejandro Vallejo To: Xen-devel Cc: Alejandro Vallejo , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu Subject: [PATCH 1/6] xen/x86: Add initial x2APIC ID to the per-vLAPIC save area Date: Tue, 9 Jan 2024 15:38:29 +0000 Message-Id: <20240109153834.4192-2-alejandro.vallejo@cloud.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240109153834.4192-1-alejandro.vallejo@cloud.com> References: <20240109153834.4192-1-alejandro.vallejo@cloud.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @cloud.com) X-ZM-MESSAGEID: 1704814754613100001 Content-Type: text/plain; charset="utf-8" This allows the initial x2APIC ID to be sent on the migration stream. The hardcoded mapping x2apic_id=3D2*vcpu_id is maintained for the time being. Given the vlapic data is zero-extended on restore, fix up migrations from hosts without the field by setting it to the old convention if zero. x2APIC IDs are calculated from the CPU policy where the guest topology is defined. For the time being, the function simply returns the old relationship, but will eventually return results consistent with the topology. Signed-off-by: Alejandro Vallejo --- xen/arch/x86/cpuid.c | 20 ++++--------------- xen/arch/x86/domain.c | 3 +++ xen/arch/x86/hvm/vlapic.c | 27 ++++++++++++++++++++++++-- xen/arch/x86/include/asm/hvm/vlapic.h | 2 ++ xen/include/public/arch-x86/hvm/save.h | 2 ++ xen/include/xen/lib/x86/cpu-policy.h | 9 +++++++++ xen/lib/x86/policy.c | 11 +++++++++++ 7 files changed, 56 insertions(+), 18 deletions(-) diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c index 7290a979c6..6e259785d0 100644 --- a/xen/arch/x86/cpuid.c +++ b/xen/arch/x86/cpuid.c @@ -139,10 +139,9 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, const struct cpu_user_regs *regs; =20 case 0x1: - /* TODO: Rework topology logic. */ res->b &=3D 0x00ffffffu; if ( is_hvm_domain(d) ) - res->b |=3D (v->vcpu_id * 2) << 24; + res->b |=3D SET_xAPIC_ID(vlapic_x2apic_id(vcpu_vlapic(v))); =20 /* TODO: Rework vPMU control in terms of toolstack choices. */ if ( vpmu_available(v) && @@ -311,20 +310,9 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf, break; =20 case 0xb: - /* - * In principle, this leaf is Intel-only. In practice, it is tigh= tly - * coupled with x2apic, and we offer an x2apic-capable APIC emulat= ion - * to guests on AMD hardware as well. - * - * TODO: Rework topology logic. - */ - if ( p->basic.x2apic ) - { - *(uint8_t *)&res->c =3D subleaf; - - /* Fix the x2APIC identifier. */ - res->d =3D v->vcpu_id * 2; - } + /* ecx !=3D 0 if the subleaf is implemented */ + if ( res->c && p->basic.x2apic ) + res->d =3D vlapic_x2apic_id(vcpu_vlapic(v)); break; =20 case XSTATE_CPUID: diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 8a31d18f69..e0c7ed8d5d 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -288,7 +288,10 @@ void update_guest_memory_policy(struct vcpu *v, static void cpu_policy_updated(struct vcpu *v) { if ( is_hvm_vcpu(v) ) + { hvm_cpuid_policy_changed(v); + vlapic_cpu_policy_changed(v); + } } =20 void domain_cpu_policy_changed(struct domain *d) diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c index cdb69d9742..f500d66543 100644 --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -1069,7 +1069,7 @@ static uint32_t x2apic_ldr_from_id(uint32_t id) static void set_x2apic_id(struct vlapic *vlapic) { const struct vcpu *v =3D vlapic_vcpu(vlapic); - uint32_t apic_id =3D v->vcpu_id * 2; + uint32_t apic_id =3D vlapic->hw.x2apic_id; uint32_t apic_ldr =3D x2apic_ldr_from_id(apic_id); =20 /* @@ -1083,6 +1083,22 @@ static void set_x2apic_id(struct vlapic *vlapic) vlapic_set_reg(vlapic, APIC_LDR, apic_ldr); } =20 +void vlapic_cpu_policy_changed(struct vcpu *v) +{ + struct vlapic *vlapic =3D vcpu_vlapic(v); + struct cpu_policy *cp =3D v->domain->arch.cpu_policy; + + /* + * Don't override the initial x2APIC ID if we have migrated it or + * if the domain doesn't have vLAPIC at all. + */ + if ( !has_vlapic(v->domain) || vlapic->loaded.hw ) + return; + + vlapic->hw.x2apic_id =3D x86_x2apic_id_from_vcpu_id(cp, v->vcpu_id); + vlapic_set_reg(vlapic, APIC_ID, SET_xAPIC_ID(vlapic->hw.x2apic_id)); +} + int guest_wrmsr_apic_base(struct vcpu *v, uint64_t val) { const struct cpu_policy *cp =3D v->domain->arch.cpu_policy; @@ -1449,7 +1465,7 @@ void vlapic_reset(struct vlapic *vlapic) if ( v->vcpu_id =3D=3D 0 ) vlapic->hw.apic_base_msr |=3D APIC_BASE_BSP; =20 - vlapic_set_reg(vlapic, APIC_ID, (v->vcpu_id * 2) << 24); + vlapic_set_reg(vlapic, APIC_ID, SET_xAPIC_ID(vlapic->hw.x2apic_id)); vlapic_do_init(vlapic); } =20 @@ -1514,6 +1530,13 @@ static void lapic_load_fixup(struct vlapic *vlapic) const struct vcpu *v =3D vlapic_vcpu(vlapic); uint32_t good_ldr =3D x2apic_ldr_from_id(vlapic->loaded.id); =20 + /* + * Guest with hardcoded assumptions about x2apic_id <-> vcpu_id + * mappings. Recreate the mapping it used to have in old host. + */ + if ( !vlapic->hw.x2apic_id ) + vlapic->hw.x2apic_id =3D v->vcpu_id * 2; + /* Skip fixups on xAPIC mode, or if the x2APIC LDR is already correct = */ if ( !vlapic_x2apic_mode(vlapic) || (vlapic->loaded.ldr =3D=3D good_ldr) ) diff --git a/xen/arch/x86/include/asm/hvm/vlapic.h b/xen/arch/x86/include/a= sm/hvm/vlapic.h index 88ef945243..e8d41313ab 100644 --- a/xen/arch/x86/include/asm/hvm/vlapic.h +++ b/xen/arch/x86/include/asm/hvm/vlapic.h @@ -44,6 +44,7 @@ #define vlapic_xapic_mode(vlapic) \ (!vlapic_hw_disabled(vlapic) && \ !((vlapic)->hw.apic_base_msr & APIC_BASE_EXTD)) +#define vlapic_x2apic_id(vlapic) ((vlapic)->hw.x2apic_id) =20 /* * Generic APIC bitmap vector update & search routines. @@ -107,6 +108,7 @@ int vlapic_ack_pending_irq(struct vcpu *v, int vector, = bool force_ack); =20 int vlapic_init(struct vcpu *v); void vlapic_destroy(struct vcpu *v); +void vlapic_cpu_policy_changed(struct vcpu *v); =20 void vlapic_reset(struct vlapic *vlapic); =20 diff --git a/xen/include/public/arch-x86/hvm/save.h b/xen/include/public/ar= ch-x86/hvm/save.h index 7ecacadde1..1c2ec669ff 100644 --- a/xen/include/public/arch-x86/hvm/save.h +++ b/xen/include/public/arch-x86/hvm/save.h @@ -394,6 +394,8 @@ struct hvm_hw_lapic { uint32_t disabled; /* VLAPIC_xx_DISABLED */ uint32_t timer_divisor; uint64_t tdt_msr; + uint32_t x2apic_id; + uint32_t rsvd_zero; }; =20 DECLARE_HVM_SAVE_TYPE(LAPIC, 5, struct hvm_hw_lapic); diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86= /cpu-policy.h index d5e447e9dc..14724cedff 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -542,6 +542,15 @@ int x86_cpu_policies_are_compatible(const struct cpu_p= olicy *host, const struct cpu_policy *guest, struct cpu_policy_errors *err); =20 +/** + * Calculates the x2APIC ID of a vCPU given a CPU policy + * + * @param p CPU policy of the domain. + * @param vcpu_id vCPU ID of the vCPU. + * @returns x2APIC ID of the vCPU. + */ +uint32_t x86_x2apic_id_from_vcpu_id(const struct cpu_policy *p, uint32_t v= cpu_id); + #endif /* !XEN_LIB_X86_POLICIES_H */ =20 /* diff --git a/xen/lib/x86/policy.c b/xen/lib/x86/policy.c index f033d22785..a3b24e6879 100644 --- a/xen/lib/x86/policy.c +++ b/xen/lib/x86/policy.c @@ -2,6 +2,17 @@ =20 #include =20 +uint32_t x86_x2apic_id_from_vcpu_id(const struct cpu_policy *p, uint32_t v= cpu_id) +{ + /* + * TODO: Derive x2APIC ID from the topology information inside `p` + * rather than from vCPU ID. This bodge is a temporary measure + * until all infra is in place to retrieve or derive the initial + * x2APIC ID from migrated domains. + */ + return vcpu_id * 2; +} + int x86_cpu_policies_are_compatible(const struct cpu_policy *host, const struct cpu_policy *guest, struct cpu_policy_errors *err) --=20 2.34.1 From nobody Sat Sep 21 03:26:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=reject dis=none) header.from=cloud.com ARC-Seal: i=1; a=rsa-sha256; t=1704814747; cv=none; d=zohomail.com; s=zohoarc; b=AB92HgIJzu/EF/Ih53kEMC/9+3NG04lvBT3jgIGlYX9fbJuF2SiCsxW3ziMBH1x/h2Q2yN3WmZBrxOaIXZvyJIPLB8CPfPGtmlCr8mOqWiOaUCiQM/N4Nv83fRdsYqxYXq61VB3yvvpUVCUWJlg9NasTujOjyVA6A1cOybqdv6s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1704814747; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=+00zpDD6E1F2vymnDKj104s79dZsxIp75zMuYgp0YY0=; b=irmNatpype5kGAuo9ulxIgncRDYeZp6s+WthS4EVAoJd3RSPA35EbmAIYO61HlEcKgDSMfvNVLLRJ9UUSYxf+YFs7uD2BOg/bYXbKcb0tu0CRG2Ub/g7w6zEfrFHFlKunLKnTl01P8cv73sOUKGJMqklxdkfQi1DfO6yZdXEL0k= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1704814747538555.0224519540321; Tue, 9 Jan 2024 07:39:07 -0800 (PST) Received: from list by lists.xenproject.org with outflank-mailman.664699.1034797 (Exim 4.92) (envelope-from ) id 1rNEBf-0008HW-P3; Tue, 09 Jan 2024 15:38:43 +0000 Received: by outflank-mailman (output) from mailman id 664699.1034797; Tue, 09 Jan 2024 15:38:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rNEBf-0008HN-Lt; Tue, 09 Jan 2024 15:38:43 +0000 Received: by outflank-mailman (input) for mailman id 664699; Tue, 09 Jan 2024 15:38:42 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rNEBe-00081L-1O for xen-devel@lists.xenproject.org; Tue, 09 Jan 2024 15:38:42 +0000 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [2a00:1450:4864:20::335]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 29fdd3c8-af05-11ee-98ef-6d05b1d4d9a1; Tue, 09 Jan 2024 16:38:41 +0100 (CET) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-40d5336986cso40412885e9.1 for ; Tue, 09 Jan 2024 07:38:41 -0800 (PST) Received: from EMEAENGAAD19049.citrite.net (default-46-102-197-194.interdsl.co.uk. [46.102.197.194]) by smtp.gmail.com with ESMTPSA id fi3-20020a170906da0300b00a2adb417051sm1153685ejb.216.2024.01.09.07.38.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Jan 2024 07:38:39 -0800 (PST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 29fdd3c8-af05-11ee-98ef-6d05b1d4d9a1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cloud.com; s=cloud; t=1704814720; x=1705419520; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+00zpDD6E1F2vymnDKj104s79dZsxIp75zMuYgp0YY0=; b=gr2qTOtuZqyPVqd6P3vBDX4ulp7+VgwR10D9Vo9Lclgc+kyeZ12vC+3pjGkjMXcwQf 855q0K1Vig+UtngUpzKjJBygCBP9OW5xfuxT9t3y7M6unGs39QG1Coi6NsYiC25oBItS Xz0wMbRDnB8vJMyspBzIrxPtF5PKgNJlNkGRs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704814720; x=1705419520; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+00zpDD6E1F2vymnDKj104s79dZsxIp75zMuYgp0YY0=; b=gR+7dMd7RzypzrKvYxIOO/bs8aotn/J9iKs5rwTuZ6mFwzppgiaA0gnBm9n5Deh+CU SailEh5UFxxSZdCtAHzIlZ1Z8DfYDauKlZo2A1ipqZUiXc1FVMpm53BoFmA4+m/WRKEo K0GFKLZHVMqstXU9JJfknVtKqJm4RVTMdbov1DYo+9X0WdUS2cRLa+5sKXP6c839BogF z1GW7/02hL3eWLRgZtk/Z4LwlIr9FFPCfeJSLOxAqr3CsukgsQiSYVVtGoDqM8QXpex1 No0gjVT2Kpbq8ThSF3xxCATvV+P16kKM2OxZPH8fCvcrQN3Dpgv7Zc5LE6gG7tEvs3TQ f2dw== X-Gm-Message-State: AOJu0Yy8GjHOlmz9WFiHiZKLzIukuR1tjNSFRpVB3blYi0FPLU5+FKg3 u/0Yh4jWnpW/uWGw2BJotrtra4JAe4JtnZZl7PqixfYoO0c= X-Google-Smtp-Source: AGHT+IFMsroVWEpT8SgYSbgTDA+tq4Q7UFJVMCwsEySCtcDdTqRvpp+J6jABJErYFEZOm5SYRhPvRg== X-Received: by 2002:a1c:7707:0:b0:40e:4921:5044 with SMTP id t7-20020a1c7707000000b0040e49215044mr1207878wmi.55.1704814720090; Tue, 09 Jan 2024 07:38:40 -0800 (PST) From: Alejandro Vallejo To: Xen-devel Cc: Alejandro Vallejo , Wei Liu , Anthony PERARD , Juergen Gross , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH 2/6] tools/xc: Add xc_cpu_policy to the public xenctrl.h header Date: Tue, 9 Jan 2024 15:38:30 +0000 Message-Id: <20240109153834.4192-3-alejandro.vallejo@cloud.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240109153834.4192-1-alejandro.vallejo@cloud.com> References: <20240109153834.4192-1-alejandro.vallejo@cloud.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @cloud.com) X-ZM-MESSAGEID: 1704814748624100002 Content-Type: text/plain; charset="utf-8" Move struct xc_cpu_policy data structure out of xg_private.h and into the public xenguest.h so it can be used by libxl. Signed-off-by: Alejandro Vallejo --- tools/include/xenguest.h | 8 +++++++- tools/libs/guest/xg_private.h | 10 ---------- xen/include/xen/lib/x86/cpu-policy.h | 5 +++++ 3 files changed, 12 insertions(+), 11 deletions(-) diff --git a/tools/include/xenguest.h b/tools/include/xenguest.h index e01f494b77..4e9078fdee 100644 --- a/tools/include/xenguest.h +++ b/tools/include/xenguest.h @@ -784,7 +784,13 @@ xen_pfn_t *xc_map_m2p(xc_interface *xch, unsigned long *mfn0); =20 #if defined(__i386__) || defined(__x86_64__) -typedef struct xc_cpu_policy xc_cpu_policy_t; +#include + +typedef struct xc_cpu_policy { + struct cpu_policy policy; + xen_cpuid_leaf_t leaves[CPUID_MAX_SERIALISED_LEAVES]; + xen_msr_entry_t msrs[MSR_MAX_SERIALISED_ENTRIES]; +} xc_cpu_policy_t; =20 /* Create and free a xc_cpu_policy object. */ xc_cpu_policy_t *xc_cpu_policy_init(void); diff --git a/tools/libs/guest/xg_private.h b/tools/libs/guest/xg_private.h index d73947094f..d1940f1ea4 100644 --- a/tools/libs/guest/xg_private.h +++ b/tools/libs/guest/xg_private.h @@ -170,14 +170,4 @@ int pin_table(xc_interface *xch, unsigned int type, un= signed long mfn, #define M2P_SIZE(_m) ROUNDUP(((_m) * sizeof(xen_pfn_t)), M2P_SHIFT) #define M2P_CHUNKS(_m) (M2P_SIZE((_m)) >> M2P_SHIFT) =20 -#if defined(__x86_64__) || defined(__i386__) -#include - -struct xc_cpu_policy { - struct cpu_policy policy; - xen_cpuid_leaf_t leaves[CPUID_MAX_SERIALISED_LEAVES]; - xen_msr_entry_t msrs[MSR_MAX_SERIALISED_ENTRIES]; -}; -#endif /* x86 */ - #endif /* XG_PRIVATE_H */ diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86= /cpu-policy.h index 14724cedff..65f6335b32 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -85,6 +85,11 @@ unsigned int x86_cpuid_lookup_vendor(uint32_t ebx, uint3= 2_t ecx, uint32_t edx); */ const char *x86_cpuid_vendor_to_str(unsigned int vendor); =20 +#ifndef __XEN__ +/* Needed for MAX() */ +#include +#endif /* __XEN__ */ + #define CPUID_GUEST_NR_BASIC (0xdu + 1) #define CPUID_GUEST_NR_CACHE (5u + 1) #define CPUID_GUEST_NR_FEAT (2u + 1) --=20 2.34.1 From nobody Sat Sep 21 03:26:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; 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[46.102.197.194]) by smtp.gmail.com with ESMTPSA id fi3-20020a170906da0300b00a2adb417051sm1153685ejb.216.2024.01.09.07.38.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Jan 2024 07:38:40 -0800 (PST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 2a52ca72-af05-11ee-9b0f-b553b5be7939 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cloud.com; s=cloud; t=1704814721; x=1705419521; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3Tyvj96yu+ExmEaYuZYuzT4Vsi1GPehED1a8sOXZbwo=; b=XTGrQ8P4be3M0Vs5MtFzjdjzkSl3aZmMuFVzrPW/xLJrESOXbFgA0WzCEJyOUzjqyx AdTfrMG8kyv9s1L1QTSuEY6dCfvQa7jnqMNBYdGXcedBLcOixpDRPH2lE4QrNbQjbyXn wf/TgSSfSP/hkywnsSzqEe2blQoQtrztvpqQI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704814721; x=1705419521; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3Tyvj96yu+ExmEaYuZYuzT4Vsi1GPehED1a8sOXZbwo=; b=nT0K1q0BGTUA8VRiAAvzI4aLpOnP+GFT030fGcaIOLzrql3TLAmjd8DDFKzBi6UbJF 1NHMHXom48K32Drpy7Dx0c5OZWrfTPfpf6+Oh0w6zb6Ck2a3LbQS1sFtw++628PzfX0e J+syKXI6hc90Nt3b3JMoS5t7s2bEt/4g09mJSPpwMep9yuu9stuVLIdUaq5mKjfka/VV 8U8ma+9m6wDeqrA10qTjtDTOQDZ4/JvyuCRfzKX/XtmII/yPbr74OmS7wpgyNe/iNqvo SS3UCS+k0OC6ojuzXBE2/wEe19P1urg4Y/g5aCO+FutzUw5dKMmop64ysZOe4Bg0mA+p cfPA== X-Gm-Message-State: AOJu0YzJbsWgV5LNQDSCJIdh/Ij3uuakwdkws+pTBBNI72c+G2a/vX1j bSp7ENdcIuP2ardwK0snu6EKOuqrrALqYxsrOG+x+94SJ8A= X-Google-Smtp-Source: AGHT+IEFk0EhIfe0ycvYEIqj7VI5sVFnxOOeuQm8MgIUUKNKFkGLeTC02i742HgQRpSTYVgVXSDvpw== X-Received: by 2002:a17:906:dfe2:b0:a26:e9fe:f59f with SMTP id lc2-20020a170906dfe200b00a26e9fef59fmr697946ejc.133.1704814721012; Tue, 09 Jan 2024 07:38:41 -0800 (PST) From: Alejandro Vallejo To: Xen-devel Cc: Alejandro Vallejo , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu Subject: [PATCH 3/6] xen/x86: Refactor xen/lib/x86 so it can be linked in hvmloader Date: Tue, 9 Jan 2024 15:38:31 +0000 Message-Id: <20240109153834.4192-4-alejandro.vallejo@cloud.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240109153834.4192-1-alejandro.vallejo@cloud.com> References: <20240109153834.4192-1-alejandro.vallejo@cloud.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @cloud.com) X-ZM-MESSAGEID: 1704814750565100005 Content-Type: text/plain; charset="utf-8" A future patch will use these in hvmloader, which is freestanding, but lacks the Xen code. The following changes fix the compilation errors. * string.h =3D> Remove memset() usages and bzero through assignments * inttypes.h =3D> Use stdint.h (it's what it should've been to begin with) * errno.h =3D> Use xen/errno.h instead No functional change intended. Signed-off-by: Alejandro Vallejo --- xen/lib/x86/cpuid.c | 12 ++++++------ xen/lib/x86/private.h | 8 +++++--- 2 files changed, 11 insertions(+), 9 deletions(-) diff --git a/xen/lib/x86/cpuid.c b/xen/lib/x86/cpuid.c index eb7698dc73..4a138c3a11 100644 --- a/xen/lib/x86/cpuid.c +++ b/xen/lib/x86/cpuid.c @@ -5,8 +5,8 @@ static void zero_leaves(struct cpuid_leaf *l, unsigned int first, unsigned int last) { - if ( first <=3D last ) - memset(&l[first], 0, sizeof(*l) * (last - first + 1)); + for (l =3D &l[first]; first <=3D last; first++, l++ ) + *l =3D (struct cpuid_leaf){}; } =20 unsigned int x86_cpuid_lookup_vendor(uint32_t ebx, uint32_t ecx, uint32_t = edx) @@ -244,7 +244,7 @@ void x86_cpu_policy_clear_out_of_range_leaves(struct cp= u_policy *p) ARRAY_SIZE(p->basic.raw) - 1); =20 if ( p->basic.max_leaf < 4 ) - memset(p->cache.raw, 0, sizeof(p->cache.raw)); + p->cache =3D (typeof(p->cache)){}; else { for ( i =3D 0; (i < ARRAY_SIZE(p->cache.raw) && @@ -255,13 +255,13 @@ void x86_cpu_policy_clear_out_of_range_leaves(struct = cpu_policy *p) } =20 if ( p->basic.max_leaf < 7 ) - memset(p->feat.raw, 0, sizeof(p->feat.raw)); + p->feat =3D (typeof(p->feat)){}; else zero_leaves(p->feat.raw, p->feat.max_subleaf + 1, ARRAY_SIZE(p->feat.raw) - 1); =20 if ( p->basic.max_leaf < 0xb ) - memset(p->topo.raw, 0, sizeof(p->topo.raw)); + p->topo =3D (typeof(p->topo)){}; else { for ( i =3D 0; (i < ARRAY_SIZE(p->topo.raw) && @@ -272,7 +272,7 @@ void x86_cpu_policy_clear_out_of_range_leaves(struct cp= u_policy *p) } =20 if ( p->basic.max_leaf < 0xd || !cpu_policy_xstates(p) ) - memset(p->xstate.raw, 0, sizeof(p->xstate.raw)); + p->xstate =3D (typeof(p->xstate)){}; else { /* This logic will probably need adjusting when XCR0[63] gets used= . */ diff --git a/xen/lib/x86/private.h b/xen/lib/x86/private.h index 60bb82a400..4b8cb97e64 100644 --- a/xen/lib/x86/private.h +++ b/xen/lib/x86/private.h @@ -17,12 +17,14 @@ =20 #else =20 -#include -#include +#include #include #include -#include =20 +enum { +#define XEN_ERRNO(ident, rc) ident =3D (rc), +#include +}; #include #include =20 --=20 2.34.1 From nobody Sat Sep 21 03:26:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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[46.102.197.194]) by smtp.gmail.com with ESMTPSA id fi3-20020a170906da0300b00a2adb417051sm1153685ejb.216.2024.01.09.07.38.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Jan 2024 07:38:41 -0800 (PST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 2acaf547-af05-11ee-9b0f-b553b5be7939 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cloud.com; s=cloud; t=1704814722; x=1705419522; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Z/Mi6cC8uykb3/316Hk1+e5LTrJjSyfEFqMapLdzQzU=; b=IViI4yhHSDRuJkL+lOsd1cVKkAE1AiJJxXX1mvB0SF0ZHxqTzMT3XCo+wCL5FXgiP+ z937tQVBooFQ5UI75JONWqqmYlaEWH57u01vVn+K197x+/17/3CPsBFMAZ0MchWUvrgb ulHVKTAHkqimtUIKP8Gm4UrqRCB0MGvQfNbiY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704814722; x=1705419522; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Z/Mi6cC8uykb3/316Hk1+e5LTrJjSyfEFqMapLdzQzU=; b=lZ+RPMS6WMXRPVjvFd9GGLiAhy5ESC6pwPg1XA0zFaYKjZ+0S8wZGcL2OyNHvpNAoy Bs2JkM1CSFzvJgZphlz8/+ukM/96XV3wHMCdfPjQtSRc3q+wMk0vvLrxwxZX012QkqHj 6UowgVXfJYbjvuglQgzOHk7texyPMXX91ytVClO0niTVQp2CiejOfQDfFewU4ShZGceK LPzTvDmzBWcT+6HoHHQE+XCMXHeXy81LeMB1EQqhRSr0wGAaUccUgyiWYCE1wrlo8wTS hcF23Mo93+qCvcMy3kFGn43KWD4lDA8TeHw0hHPj+k90yWy84AGZeQTDKY2Sg90bJ8iM Gqlg== X-Gm-Message-State: AOJu0Yze1J3HQaMziTid7pLvJK7RDLF7chEV1Hi/lwvMW/XCw/ot+rrx 2oaLbnNSLRGpvcO6o+9NM07xERqrxhxQZoNgv7FeservqIc= X-Google-Smtp-Source: AGHT+IElL8SkPzR8ym/erEuOW/j52nGuVC8Q0DK5O9UwVPma0sgsQsnjC06cIgEky0KZlZPvm9yPVA== X-Received: by 2002:a17:906:a895:b0:a28:fdac:95e8 with SMTP id ha21-20020a170906a89500b00a28fdac95e8mr626937ejb.17.1704814721793; Tue, 09 Jan 2024 07:38:41 -0800 (PST) From: Alejandro Vallejo To: Xen-devel Cc: Alejandro Vallejo , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu , Anthony PERARD , Juergen Gross Subject: [PATCH 4/6] tools/hvmloader: Use cpu_policy to determine APIC IDs Date: Tue, 9 Jan 2024 15:38:32 +0000 Message-Id: <20240109153834.4192-5-alejandro.vallejo@cloud.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240109153834.4192-1-alejandro.vallejo@cloud.com> References: <20240109153834.4192-1-alejandro.vallejo@cloud.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @cloud.com) X-ZM-MESSAGEID: 1704814750622100009 Content-Type: text/plain; charset="utf-8" As part of topology correction efforts, APIC IDs can no longer be derived strictly through the vCPU ID alone. Bring in the machinery for policy retrieval and parsing in order to generate the proper MADT table and wake the appropriate CPUs. Signed-off-by: Alejandro Vallejo --- tools/firmware/hvmloader/Makefile | 7 +++++++ tools/firmware/hvmloader/config.h | 5 ++++- tools/firmware/hvmloader/hvmloader.c | 6 ++++++ tools/firmware/hvmloader/util.c | 3 ++- tools/libacpi/build.c | 27 +++++++++++++++++++++------ tools/libacpi/libacpi.h | 5 ++++- tools/libs/light/libxl_x86_acpi.c | 21 +++++++++++++++++++-- 7 files changed, 63 insertions(+), 11 deletions(-) diff --git a/tools/firmware/hvmloader/Makefile b/tools/firmware/hvmloader/M= akefile index e5de1ade17..503ef2e219 100644 --- a/tools/firmware/hvmloader/Makefile +++ b/tools/firmware/hvmloader/Makefile @@ -37,6 +37,13 @@ ifeq ($(debug),y) OBJS +=3D tests.o endif =20 +CFLAGS +=3D -I../../../xen/arch/x86/include/ + +vpath cpuid.c ../../../xen/lib/x86/ +OBJS +=3D cpuid.o +vpath policy.c ../../../xen/lib/x86/ +OBJS +=3D policy.o + CIRRUSVGA_DEBUG ?=3D n =20 ROMBIOS_DIR :=3D ../rombios diff --git a/tools/firmware/hvmloader/config.h b/tools/firmware/hvmloader/c= onfig.h index c82adf6dc5..3304b63cd8 100644 --- a/tools/firmware/hvmloader/config.h +++ b/tools/firmware/hvmloader/config.h @@ -3,10 +3,13 @@ =20 #include #include +#include =20 enum virtual_vga { VGA_none, VGA_std, VGA_cirrus, VGA_pt }; extern enum virtual_vga virtual_vga; =20 +extern struct cpu_policy cpu_policy; + extern unsigned long igd_opregion_pgbase; #define IGD_OPREGION_PAGES 3 =20 @@ -50,7 +53,7 @@ extern uint8_t ioapic_version; #define IOAPIC_ID 0x01 =20 #define LAPIC_BASE_ADDRESS 0xfee00000 -#define LAPIC_ID(vcpu_id) ((vcpu_id) * 2) +#define LAPIC_ID(vcpu_id) x86_x2apic_id_from_vcpu_id(&cpu_policy, vcpu_id) =20 #define PCI_ISA_DEVFN 0x08 /* dev 1, fn 0 */ #define PCI_ISA_IRQ_MASK 0x0c20U /* ISA IRQs 5,10,11 are PCI connected = */ diff --git a/tools/firmware/hvmloader/hvmloader.c b/tools/firmware/hvmloade= r/hvmloader.c index c58841e5b5..8874165c66 100644 --- a/tools/firmware/hvmloader/hvmloader.c +++ b/tools/firmware/hvmloader/hvmloader.c @@ -28,6 +28,7 @@ #include #include #include +#include #include =20 const struct hvm_start_info *hvm_start_info; @@ -118,6 +119,9 @@ uint8_t ioapic_version; =20 bool acpi_enabled; =20 +/* TODO: Remove after HVM ACPI building makes it to libxl */ +struct cpu_policy cpu_policy; + static void init_hypercalls(void) { uint32_t eax, ebx, ecx, edx; @@ -331,6 +335,8 @@ int main(void) printf("HVM Loader\n"); BUG_ON(hvm_start_info->magic !=3D XEN_HVM_START_MAGIC_VALUE); =20 + x86_cpu_policy_fill_native(&cpu_policy); + init_hypercalls(); =20 memory_map_setup(); diff --git a/tools/firmware/hvmloader/util.c b/tools/firmware/hvmloader/uti= l.c index e82047d993..25a0245c5c 100644 --- a/tools/firmware/hvmloader/util.c +++ b/tools/firmware/hvmloader/util.c @@ -30,6 +30,7 @@ #include #include #include +#include =20 /* * Check whether there exists overlap in the specified memory range. @@ -1041,7 +1042,7 @@ void hvmloader_acpi_build_tables(struct acpi_config *= config, ctxt.mem_ops.free =3D acpi_mem_free; ctxt.mem_ops.v2p =3D acpi_v2p; =20 - acpi_build_tables(&ctxt, config); + acpi_build_tables(&ctxt, config, &cpu_policy); =20 hvm_param_set(HVM_PARAM_VM_GENERATION_ID_ADDR, config->vm_gid_addr); } diff --git a/tools/libacpi/build.c b/tools/libacpi/build.c index 2f29863db1..ab05e54c96 100644 --- a/tools/libacpi/build.c +++ b/tools/libacpi/build.c @@ -17,6 +17,7 @@ #include #include #include +#include =20 #define ACPI_MAX_SECONDARY_TABLES 16 =20 @@ -65,7 +66,8 @@ static void set_checksum( =20 static struct acpi_20_madt *construct_madt(struct acpi_ctxt *ctxt, const struct acpi_config *confi= g, - struct acpi_info *info) + struct acpi_info *info, + const struct cpu_policy *policy) { struct acpi_20_madt *madt; struct acpi_20_madt_intsrcovr *intsrcovr; @@ -143,14 +145,25 @@ static struct acpi_20_madt *construct_madt(struct acp= i_ctxt *ctxt, info->madt_lapic0_addr =3D ctxt->mem_ops.v2p(ctxt, lapic); for ( i =3D 0; i < hvminfo->nr_vcpus; i++ ) { + uint32_t x2apic_id =3D x86_x2apic_id_from_vcpu_id(policy, i); + memset(lapic, 0, sizeof(*lapic)); lapic->type =3D ACPI_PROCESSOR_LOCAL_APIC; lapic->length =3D sizeof(*lapic); /* Processor ID must match processor-object IDs in the DSDT. */ lapic->acpi_processor_id =3D i; - lapic->apic_id =3D config->lapic_id(i); + lapic->apic_id =3D x2apic_id; lapic->flags =3D (test_bit(i, hvminfo->vcpu_online) ? ACPI_LOCAL_APIC_ENABLED : 0); + + /* + * Error-out if the x2APIC ID doesn't fit in the entry + * + * TODO: Use "x2apic" entries if biggest x2apic_id > 254 + */ + if ( lapic->apic_id !=3D x2apic_id ) + return NULL; + lapic++; } =20 @@ -335,7 +348,8 @@ static int construct_passthrough_tables(struct acpi_ctx= t *ctxt, static int construct_secondary_tables(struct acpi_ctxt *ctxt, unsigned long *table_ptrs, struct acpi_config *config, - struct acpi_info *info) + struct acpi_info *info, + const struct cpu_policy *policy) { int nr_tables =3D 0; struct acpi_20_madt *madt; @@ -349,7 +363,7 @@ static int construct_secondary_tables(struct acpi_ctxt = *ctxt, /* MADT. */ if ( (config->hvminfo->nr_vcpus > 1) || config->hvminfo->apic_mode ) { - madt =3D construct_madt(ctxt, config, info); + madt =3D construct_madt(ctxt, config, info, policy); if (!madt) return -1; table_ptrs[nr_tables++] =3D ctxt->mem_ops.v2p(ctxt, madt); } @@ -539,7 +553,8 @@ static int new_vm_gid(struct acpi_ctxt *ctxt, return 1; } =20 -int acpi_build_tables(struct acpi_ctxt *ctxt, struct acpi_config *config) +int acpi_build_tables(struct acpi_ctxt *ctxt, struct acpi_config *config, + struct cpu_policy *policy) { struct acpi_info *acpi_info; struct acpi_20_rsdp *rsdp; @@ -667,7 +682,7 @@ int acpi_build_tables(struct acpi_ctxt *ctxt, struct ac= pi_config *config) set_checksum(fadt, offsetof(struct acpi_header, checksum), fadt_size); =20 nr_secondaries =3D construct_secondary_tables(ctxt, secondary_tables, - config, acpi_info); + config, acpi_info, policy); if ( nr_secondaries < 0 ) goto oom; =20 diff --git a/tools/libacpi/libacpi.h b/tools/libacpi/libacpi.h index deda39e5db..24f62aa5d4 100644 --- a/tools/libacpi/libacpi.h +++ b/tools/libacpi/libacpi.h @@ -28,6 +28,8 @@ #define ACPI_HAS_CMOS_RTC (1<<14) #define ACPI_HAS_SSDT_LAPTOP_SLATE (1<<15) =20 +struct cpu_policy; + struct xen_vmemrange; struct acpi_numa { uint32_t nr_vmemranges; @@ -91,7 +93,8 @@ struct acpi_config { uint8_t ioapic_id; }; =20 -int acpi_build_tables(struct acpi_ctxt *ctxt, struct acpi_config *config); +int acpi_build_tables(struct acpi_ctxt *ctxt, struct acpi_config *config, + struct cpu_policy *policy); =20 #endif /* __LIBACPI_H__ */ =20 diff --git a/tools/libs/light/libxl_x86_acpi.c b/tools/libs/light/libxl_x86= _acpi.c index 620f3c700c..a5bd42683e 100644 --- a/tools/libs/light/libxl_x86_acpi.c +++ b/tools/libs/light/libxl_x86_acpi.c @@ -158,11 +158,27 @@ int libxl__dom_load_acpi(libxl__gc *gc, { struct acpi_config config =3D {0}; struct libxl_acpi_ctxt libxl_ctxt; - int rc =3D 0, acpi_pages_num; + uint16_t domid =3D dom->guest_domid; + int rc =3D 0, r, acpi_pages_num; + xc_cpu_policy_t *policy =3D NULL; =20 if (b_info->type !=3D LIBXL_DOMAIN_TYPE_PVH) goto out; =20 + policy =3D xc_cpu_policy_init(); + if (!policy) { + LOGED(ERROR, domid, "xc_cpu_policy_init failed"); + rc =3D ERROR_NOMEM; + goto out; + } + + r =3D xc_cpu_policy_get_domain(dom->xch, domid, policy); + if (r < 0) { + LOGED(ERROR, domid, "get_cpu_policy failed"); + rc =3D ERROR_FAIL; + goto out; + } + libxl_ctxt.page_size =3D XC_DOM_PAGE_SIZE(dom); libxl_ctxt.page_shift =3D XC_DOM_PAGE_SHIFT(dom); =20 @@ -192,7 +208,7 @@ int libxl__dom_load_acpi(libxl__gc *gc, libxl_ctxt.guest_end +=3D NUM_ACPI_PAGES * libxl_ctxt.page_size; =20 /* Build the tables. */ - rc =3D acpi_build_tables(&libxl_ctxt.c, &config); + rc =3D acpi_build_tables(&libxl_ctxt.c, &config, &policy->policy); if (rc) { LOG(ERROR, "acpi_build_tables failed with %d", rc); goto out; @@ -226,6 +242,7 @@ int libxl__dom_load_acpi(libxl__gc *gc, libxl_ctxt.page_size; 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[46.102.197.194]) by smtp.gmail.com with ESMTPSA id fi3-20020a170906da0300b00a2adb417051sm1153685ejb.216.2024.01.09.07.38.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Jan 2024 07:38:42 -0800 (PST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 2b3888ba-af05-11ee-98ef-6d05b1d4d9a1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cloud.com; s=cloud; t=1704814722; x=1705419522; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=V9v48h63fj7+uc/V0QQbcMsF6YnV1T/2wiKWzNfz/LI=; b=SDPpe2byTIkQ/t0jWOJ88cf43i8yaio67CN/DAA5UENn/CPI/tGwTPL4Whs9N3LUvu BfT3dy1DSfYTOtHEjYOxN7q21U3OgDBVOqpOmK0paH/30pUgovewJZ8EJDjSTf1Guo+P 1O8DmaQbt6EqYl6Na7GFkJmTrIXWLU/xAF/ww= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704814722; x=1705419522; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=V9v48h63fj7+uc/V0QQbcMsF6YnV1T/2wiKWzNfz/LI=; b=f0/KqbyLFSeVqjb6un7urXE+8Zi1HzZztdOGYpb5i0nd7hPcE0kcyvR82X2npHQC1m QCC7HHoTZtEvBs0YG3TLlcrVGFI0bufCHVmyXCXtnodZJi0e6WghqXxxIrgDpsOL8myh 77KG3PEGYZuvxkz9s4+9MYHLcIpBZpGusH/lTMHz6Z14S9PnJHr5uQu2Y5jpr0rJSkh/ QsCkMM56lX1T5WfpuCkTcOJSTKHF+LNzJ8V4arX4QvQsOC+6LaSnkzhhXzd3q1dV0qY5 Yxl9PSsain88ft1DBd3vRAX+Zi4AGje4cwRDcDC5W7Yat79ORJYAHBZLEcVf/vnKWnsi vq7g== X-Gm-Message-State: AOJu0YyDQfrEo8yqBL4OorVIcWsPwEI+nF+tttTHoBUG82uYv6cuVnVG 2UpG2LJnxfY8LvOptG8SSe6+nSFQUOc6mxt1rujF16/DrcM= X-Google-Smtp-Source: AGHT+IEo1krAN+qcSUiH5qafdfWiu4LMfiL5nRv9wcOqzqwtnyUI88IYyLgyrMkG9RRrc7rpezawRQ== X-Received: by 2002:a17:907:c91b:b0:a28:bb1a:6209 with SMTP id ui27-20020a170907c91b00b00a28bb1a6209mr526126ejc.118.1704814722498; Tue, 09 Jan 2024 07:38:42 -0800 (PST) From: Alejandro Vallejo To: Xen-devel Cc: Alejandro Vallejo , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu , Anthony PERARD Subject: [PATCH 5/6] xen/x86: Derive topologically correct x2APIC IDs from the policy Date: Tue, 9 Jan 2024 15:38:33 +0000 Message-Id: <20240109153834.4192-6-alejandro.vallejo@cloud.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240109153834.4192-1-alejandro.vallejo@cloud.com> References: <20240109153834.4192-1-alejandro.vallejo@cloud.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @cloud.com) X-ZM-MESSAGEID: 1704814750605100008 Content-Type: text/plain; charset="utf-8" Implements the helper for mapping vcpu_id to x2apic_id given a valid topology in a policy. The algo is written with the intention of extending it to leaves 0x1f and e26 in the future. Toolstack doesn't set leaf 0xb and the HVM default policy has it cleared, so the leaf is not implemented. In that case, the new helper just returns the legacy mapping. Signed-off-by: Alejandro Vallejo --- tools/tests/cpu-policy/test-cpu-policy.c | 128 +++++++++++++++++++++++ xen/include/xen/lib/x86/cpu-policy.h | 2 + xen/lib/x86/policy.c | 75 +++++++++++-- 3 files changed, 199 insertions(+), 6 deletions(-) diff --git a/tools/tests/cpu-policy/test-cpu-policy.c b/tools/tests/cpu-pol= icy/test-cpu-policy.c index 301df2c002..6ff5c1dd3d 100644 --- a/tools/tests/cpu-policy/test-cpu-policy.c +++ b/tools/tests/cpu-policy/test-cpu-policy.c @@ -650,6 +650,132 @@ static void test_is_compatible_failure(void) } } =20 +static void test_x2apic_id_from_vcpu_id_success(void) +{ + static struct test { + const char *name; + uint32_t vcpu_id; + uint32_t x2apic_id; + struct cpu_policy policy; + } tests[] =3D { + { + .name =3D "3v: 3 t/c, 8 c/s", .vcpu_id =3D 3, .x2apic_id =3D 1= << 2, + .policy =3D { + .x86_vendor =3D X86_VENDOR_AMD, + .topo.subleaf =3D { + [0] =3D { .nr_logical =3D 3, .level =3D 0, .type =3D 1= , .id_shift =3D 2, }, + [1] =3D { .nr_logical =3D 8, .level =3D 1, .type =3D 2= , .id_shift =3D 5, }, + }, + }, + }, + { + .name =3D "6v: 3 t/c, 8 c/s", .vcpu_id =3D 6, .x2apic_id =3D 2= << 2, + .policy =3D { + .x86_vendor =3D X86_VENDOR_AMD, + .topo.subleaf =3D { + [0] =3D { .nr_logical =3D 3, .level =3D 0, .type =3D 1= , .id_shift =3D 2, }, + [1] =3D { .nr_logical =3D 8, .level =3D 1, .type =3D 2= , .id_shift =3D 5, }, + }, + }, + }, + { + .name =3D "24v: 3 t/c, 8 c/s", .vcpu_id =3D 24, .x2apic_id =3D= 1 << 5, + .policy =3D { + .x86_vendor =3D X86_VENDOR_AMD, + .topo.subleaf =3D { + [0] =3D { .nr_logical =3D 3, .level =3D 0, .type =3D 1= , .id_shift =3D 2, }, + [1] =3D { .nr_logical =3D 8, .level =3D 1, .type =3D 2= , .id_shift =3D 5, }, + }, + }, + }, + { + .name =3D "35v: 3 t/c, 8 c/s", .vcpu_id =3D 35, + .x2apic_id =3D (35 % 3) | (((35 / 3) % 8) << 2) | ((35 / 24) = << 5), + .policy =3D { + .x86_vendor =3D X86_VENDOR_AMD, + .topo.subleaf =3D { + [0] =3D { .nr_logical =3D 3, .level =3D 0, .type =3D 1= , .id_shift =3D 2, }, + [1] =3D { .nr_logical =3D 8, .level =3D 1, .type =3D 2= , .id_shift =3D 5, }, + }, + }, + }, + { + .name =3D "96v: 7 t/c, 3 c/s", .vcpu_id =3D 96, + .x2apic_id =3D (96 % 7) | (((96 / 7) % 3) << 3) | ((96 / 21) = << 5), + .policy =3D { + .x86_vendor =3D X86_VENDOR_AMD, + .topo.subleaf =3D { + [0] =3D { .nr_logical =3D 7, .level =3D 0, .type =3D 1= , .id_shift =3D 3, }, + [1] =3D { .nr_logical =3D 3, .level =3D 1, .type =3D 2= , .id_shift =3D 5, }, + }, + }, + }, + { + .name =3D "3v: 3 t/c, 8 c/s", .vcpu_id =3D 3, .x2apic_id =3D 1= << 2, + .policy =3D { + .x86_vendor =3D X86_VENDOR_INTEL, + .topo.subleaf =3D { + [0] =3D { .nr_logical =3D 3, .level =3D 0, .type =3D = 1, .id_shift =3D 2, }, + [1] =3D { .nr_logical =3D 24, .level =3D 1, .type =3D = 2, .id_shift =3D 5, }, + }, + }, + }, + { + .name =3D "6v: 3 t/c, 8 c/s", .vcpu_id =3D 6, .x2apic_id =3D 2= << 2, + .policy =3D { + .x86_vendor =3D X86_VENDOR_INTEL, + .topo.subleaf =3D { + [0] =3D { .nr_logical =3D 3, .level =3D 0, .type =3D = 1, .id_shift =3D 2, }, + [1] =3D { .nr_logical =3D 24, .level =3D 1, .type =3D = 2, .id_shift =3D 5, }, + }, + }, + }, + { + .name =3D "24v: 3 t/c, 8 c/s", .vcpu_id =3D 24, .x2apic_id =3D= 1 << 5, + .policy =3D { + .x86_vendor =3D X86_VENDOR_INTEL, + .topo.subleaf =3D { + [0] =3D { .nr_logical =3D 3, .level =3D 0, .type =3D = 1, .id_shift =3D 2, }, + [1] =3D { .nr_logical =3D 24, .level =3D 1, .type =3D = 2, .id_shift =3D 5, }, + }, + }, + }, + { + .name =3D "35v: 3 t/c, 8 c/s", .vcpu_id =3D 35, + .x2apic_id =3D (35 % 3) | (((35 / 3) % 8) << 2) | ((35 / 24) = << 5), + .policy =3D { + .x86_vendor =3D X86_VENDOR_INTEL, + .topo.subleaf =3D { + [0] =3D { .nr_logical =3D 3, .level =3D 0, .type =3D = 1, .id_shift =3D 2, }, + [1] =3D { .nr_logical =3D 24, .level =3D 1, .type =3D = 2, .id_shift =3D 5, }, + }, + }, + }, + { + .name =3D "96v: 7 t/c, 3 c/s", .vcpu_id =3D 96, + .x2apic_id =3D (96 % 7) | (((96 / 7) % 3) << 3) | ((96 / 21) = << 5), + .policy =3D { + .x86_vendor =3D X86_VENDOR_INTEL, + .topo.subleaf =3D { + [0] =3D { .nr_logical =3D 7, .level =3D 0, .type =3D= 1, .id_shift =3D 3, }, + [1] =3D { .nr_logical =3D 21, .level =3D 1, .type =3D= 2, .id_shift =3D 5, }, + }, + }, + }, + }; + + printf("Testing x2apic id from vcpu id success:\n"); + + for ( size_t i =3D 0; i < ARRAY_SIZE(tests); ++i ) + { + struct test *t =3D &tests[i]; + uint32_t x2apic_id =3D x86_x2apic_id_from_vcpu_id(&t->policy, t->v= cpu_id); + if ( x2apic_id !=3D t->x2apic_id ) + fail("FAIL - '%s'. bad x2apic_id: expected=3D%u actual=3D%u\n", + t->name, t->x2apic_id, x2apic_id); + } +} + int main(int argc, char **argv) { printf("CPU Policy unit tests\n"); @@ -667,6 +793,8 @@ int main(int argc, char **argv) test_is_compatible_success(); test_is_compatible_failure(); =20 + test_x2apic_id_from_vcpu_id_success(); + if ( nr_failures ) printf("Done: %u failures\n", nr_failures); else diff --git a/xen/include/xen/lib/x86/cpu-policy.h b/xen/include/xen/lib/x86= /cpu-policy.h index 65f6335b32..d81ae2f47c 100644 --- a/xen/include/xen/lib/x86/cpu-policy.h +++ b/xen/include/xen/lib/x86/cpu-policy.h @@ -550,6 +550,8 @@ int x86_cpu_policies_are_compatible(const struct cpu_po= licy *host, /** * Calculates the x2APIC ID of a vCPU given a CPU policy * + * If the policy lacks leaf 0xb falls back to legacy mapping of apic_id=3D= cpu*2 + * * @param p CPU policy of the domain. * @param vcpu_id vCPU ID of the vCPU. * @returns x2APIC ID of the vCPU. diff --git a/xen/lib/x86/policy.c b/xen/lib/x86/policy.c index a3b24e6879..2a50bc076a 100644 --- a/xen/lib/x86/policy.c +++ b/xen/lib/x86/policy.c @@ -2,15 +2,78 @@ =20 #include =20 -uint32_t x86_x2apic_id_from_vcpu_id(const struct cpu_policy *p, uint32_t v= cpu_id) +static uint32_t parts_per_higher_scoped_level(const struct cpu_policy *p, = size_t lvl) { /* - * TODO: Derive x2APIC ID from the topology information inside `p` - * rather than from vCPU ID. This bodge is a temporary measure - * until all infra is in place to retrieve or derive the initial - * x2APIC ID from migrated domains. + * `nr_logical` reported by Intel is the number of THREADS contained in + * the next topological scope. For example, assuming a system with 2 + * threads/core and 3 cores/module in a fully symmetric topology, + * `nr_logical` at the core level will report 6. Because it's reporting + * the number of threads in a module. + * + * On AMD/Hygon, nr_logical is already normalized by the higher scoped + * level (cores/complex, etc) so we can return it as-is. */ - return vcpu_id * 2; + if ( p->x86_vendor !=3D X86_VENDOR_INTEL || !lvl ) + return p->topo.subleaf[lvl].nr_logical; + + return p->topo.subleaf[lvl].nr_logical / p->topo.subleaf[lvl - 1].nr_l= ogical; +} + +uint32_t x86_x2apic_id_from_vcpu_id(const struct cpu_policy *p, uint32_t i= d) +{ + uint32_t shift =3D 0, x2apic_id =3D 0; + + /* In the absence of topology leaves, fallback to traditional mapping = */ + if ( !p->topo.subleaf[0].type ) + return id * 2; + + /* + * `id` means different things at different points of the algo + * + * At lvl=3D0: global thread_id (same as vcpu_id) + * At lvl=3D1: global core_id + * At lvl=3D2: global socket_id (actually complex_id in AMD, module_id + * in Intel, but the name is inconsequenti= al) + * + * +--+ + * ____ |#0| ______ <=3D 1 socket + * / +--+ \+--+ + * __#0__ __|#1|__ <=3D 2 cores/socket + * / | \ +--+/ +-|+ \ + * #0 #1 #2 |#3| #4 #5 <=3D 3 threads/core + * +--+ + * + * ... and so on. Global in this context means that it's a unique + * identifier for the whole topology, and not relative to the level + * it's in. For example, in the diagram shown above, we're looking at + * thread #3 in the global sense, though it's #0 within its core. + * + * Note that dividing a global thread_id by the number of threads per + * core returns the global core id that contains it. e.g: 0, 1 or 2 + * divided by 3 returns core_id=3D0. 3, 4 or 5 divided by 3 returns co= re + * 1, and so on. An analogous argument holds for higher levels. This is + * the property we exploit to derive x2apic_id from vcpu_id. + * + * NOTE: `topo` is currently derived from leaf 0xb, which is bound to + * two levels, but once we track leaves 0x1f (or e26) there will be a + * few more. The algorithm is written to cope with that case. + */ + for ( uint32_t i =3D 0; i < ARRAY_SIZE(p->topo.raw); i++ ) + { + uint32_t nr_parts; + + if ( !p->topo.subleaf[i].type ) + /* sentinel subleaf */ + break; + + nr_parts =3D parts_per_higher_scoped_level(p, i); + x2apic_id |=3D (id % nr_parts) << shift; + id /=3D nr_parts; + shift =3D p->topo.subleaf[i].id_shift; + } + + return (id << shift) | x2apic_id; } =20 int x86_cpu_policies_are_compatible(const struct cpu_policy *host, --=20 2.34.1 From nobody Sat Sep 21 03:26:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=reject dis=none) header.from=cloud.com ARC-Seal: i=1; a=rsa-sha256; t=1704814749; cv=none; d=zohomail.com; s=zohoarc; b=DYbvPcXg4WnCm7OHWZLb1Mx8UbjoqUm8f0Rt4vIh6DrBJfIK1YnrLN9Z6OqTJcKzyBB4ZekHk9vQark7J78iJqC9dOShkFrlzA4xrVUmwkNpwB3FZsqVn4UTq9X5AscvXo7rW0MW5Hm4em3T8aMhxkvjLsb4dQc+YbRpCpLVyuQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1704814749; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=ip0/OxWiHAhF5VmbjEgxvgDRsSrRtgBm50FRE5FwbqQ=; b=jbHQpjvKxJoX9hNeoEGkzZ2Z6VmA49QyDfeCSChS5Aipj+4VuZSGh7JsbLzixTWGoX5fv3314pX8PrACc9suAYBRGb1E0pqEb/ALflZyDbmHuH9hIeCe0GoV7OYRXMWeLHShvaUCuRJ62dR9uT15OgVhfLV917Wq1V5zrc8/W2o= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1704814749036359.5807355375215; Tue, 9 Jan 2024 07:39:09 -0800 (PST) Received: from list by lists.xenproject.org with outflank-mailman.664704.1034847 (Exim 4.92) (envelope-from ) id 1rNEBk-00018S-N9; Tue, 09 Jan 2024 15:38:48 +0000 Received: by outflank-mailman (output) from mailman id 664704.1034847; Tue, 09 Jan 2024 15:38:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rNEBk-00017L-Ha; Tue, 09 Jan 2024 15:38:48 +0000 Received: by outflank-mailman (input) for mailman id 664704; Tue, 09 Jan 2024 15:38:46 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1rNEBi-00081N-M2 for xen-devel@lists.xenproject.org; Tue, 09 Jan 2024 15:38:46 +0000 Received: from mail-ed1-x533.google.com (mail-ed1-x533.google.com [2a00:1450:4864:20::533]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 2baa700d-af05-11ee-9b0f-b553b5be7939; Tue, 09 Jan 2024 16:38:43 +0100 (CET) Received: by mail-ed1-x533.google.com with SMTP id 4fb4d7f45d1cf-557bfc7f7b4so3275023a12.0 for ; Tue, 09 Jan 2024 07:38:43 -0800 (PST) Received: from EMEAENGAAD19049.citrite.net (default-46-102-197-194.interdsl.co.uk. [46.102.197.194]) by smtp.gmail.com with ESMTPSA id fi3-20020a170906da0300b00a2adb417051sm1153685ejb.216.2024.01.09.07.38.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Jan 2024 07:38:42 -0800 (PST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 2baa700d-af05-11ee-9b0f-b553b5be7939 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cloud.com; s=cloud; t=1704814723; x=1705419523; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ip0/OxWiHAhF5VmbjEgxvgDRsSrRtgBm50FRE5FwbqQ=; b=brS3bRqHxXNU66iQEeFqTDvN59lN3eTMjFOxwCfyQdMo0WRrADjAoGXYVCc3qnwFff Hz9MLJjoSSwcKAyhqe3n5HXxQBHm3qrHThtWYqx4j08VaxxsJu2VKp5Lzbv29D2XWAsg futw2kezOFtxTUCmz7Uoi4z+oGM+kr2itKnX4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704814723; x=1705419523; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ip0/OxWiHAhF5VmbjEgxvgDRsSrRtgBm50FRE5FwbqQ=; b=PliZcg2Hhv7Ey8nIIAdz6nKsGu1lIToqRVWYRkCrqPEDoQ1NEUMiaoH9sc+26v48XJ l7/bTBzsJ7QwLFedMrvwku3nlj5n94REAPFMkEbpCyMj2upBgRRmvN65GjbGuM+tyIPd cUasns67Y3+f8xCY9aCWXJtYXKURB3RwQV1WAJafllMZlN4kZlPO2BA0xfn9LDjDs4N4 GulWt8bXNwMJMD36JDmkxvRqY3YHLQc6WJm+3Ydk7qzW6nZ6dBGfIMfwxELt5blWxuNa zFk0YeLmHGp4Ukw/EgMduSePDTxrIpZWzmrUY4OovG4S4a6wHm8eGeTHU3+94SryitAS RKaQ== X-Gm-Message-State: AOJu0YziZ0o5mrKV7xnu5r4pfEDZpw0/9f3MAPnW+KnxpyMa88soWvDm FIidyC7ZHNoZKv1o3XvZOzlitFQ8mFgSLNm2TsZcHsfzr9Y= X-Google-Smtp-Source: AGHT+IE2HfS1HpRppvtt5bqnp8gTZZIdOPraqXzbpm3Ahk9DyKr+vlJhrMk3dVY1NAQcGCgux/5Vvg== X-Received: by 2002:a17:906:ecab:b0:a28:ac72:4570 with SMTP id qh11-20020a170906ecab00b00a28ac724570mr1014762ejb.21.1704814723186; Tue, 09 Jan 2024 07:38:43 -0800 (PST) From: Alejandro Vallejo To: Xen-devel Cc: Alejandro Vallejo , Wei Liu , Anthony PERARD , Juergen Gross , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH 6/6] xen/x86: Add topology generator Date: Tue, 9 Jan 2024 15:38:34 +0000 Message-Id: <20240109153834.4192-7-alejandro.vallejo@cloud.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240109153834.4192-1-alejandro.vallejo@cloud.com> References: <20240109153834.4192-1-alejandro.vallejo@cloud.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @cloud.com) X-ZM-MESSAGEID: 1704814750605100007 Content-Type: text/plain; charset="utf-8" This allows toolstack to synthesise sensible topologies for guests. In particular, this patch causes x2APIC IDs to be packed according to the topology now exposed to the guests on leaf 0xb. Signed-off-by: Alejandro Vallejo --- tools/include/xenguest.h | 15 ++++ tools/libs/guest/xg_cpuid_x86.c | 144 ++++++++++++++++++++------------ xen/arch/x86/cpu-policy.c | 6 +- 3 files changed, 107 insertions(+), 58 deletions(-) diff --git a/tools/include/xenguest.h b/tools/include/xenguest.h index 4e9078fdee..f0043c559b 100644 --- a/tools/include/xenguest.h +++ b/tools/include/xenguest.h @@ -843,5 +843,20 @@ enum xc_static_cpu_featuremask { XC_FEATUREMASK_HVM_HAP_DEF, }; const uint32_t *xc_get_static_cpu_featuremask(enum xc_static_cpu_featurema= sk); + +/** + * Synthesise topology information in `p` given high-level constraints + * + * Topology is given in various fields accross several leaves, some of + * which are vendor-specific. This function uses the policy itself to + * derive such leaves from threads/core and cores/package. + * + * @param p CPU policy of the domain. + * @param threads_per_core threads/core. Doesn't need to be a power of = 2. + * @param cores_per_package cores/package. Doesn't need to be a power of= 2. + */ +void xc_topo_from_parts(struct cpu_policy *p, + uint32_t threads_per_core, uint32_t cores_per_pkg); + #endif /* __i386__ || __x86_64__ */ #endif /* XENGUEST_H */ diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x8= 6.c index 4453178100..7a622721be 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -584,7 +584,7 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t d= omid, bool restore, bool hvm; xc_domaininfo_t di; struct xc_cpu_policy *p =3D xc_cpu_policy_init(); - unsigned int i, nr_leaves =3D ARRAY_SIZE(p->leaves), nr_msrs =3D 0; + unsigned int nr_leaves =3D ARRAY_SIZE(p->leaves), nr_msrs =3D 0; uint32_t err_leaf =3D -1, err_subleaf =3D -1, err_msr =3D -1; uint32_t host_featureset[FEATURESET_NR_ENTRIES] =3D {}; uint32_t len =3D ARRAY_SIZE(host_featureset); @@ -727,60 +727,8 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t = domid, bool restore, } else { - /* - * Topology for HVM guests is entirely controlled by Xen. For now= , we - * hardcode APIC_ID =3D vcpu_id * 2 to give the illusion of no SMT. - */ - p->policy.basic.htt =3D true; - p->policy.extd.cmp_legacy =3D false; - - /* - * Leaf 1 EBX[23:16] is Maximum Logical Processors Per Package. - * Update to reflect vLAPIC_ID =3D vCPU_ID * 2, but make sure to a= void - * overflow. - */ - if ( !p->policy.basic.lppp ) - p->policy.basic.lppp =3D 2; - else if ( !(p->policy.basic.lppp & 0x80) ) - p->policy.basic.lppp *=3D 2; - - switch ( p->policy.x86_vendor ) - { - case X86_VENDOR_INTEL: - for ( i =3D 0; (p->policy.cache.subleaf[i].type && - i < ARRAY_SIZE(p->policy.cache.raw)); ++i ) - { - p->policy.cache.subleaf[i].cores_per_package =3D - (p->policy.cache.subleaf[i].cores_per_package << 1) | = 1; - p->policy.cache.subleaf[i].threads_per_cache =3D 0; - } - break; - - case X86_VENDOR_AMD: - case X86_VENDOR_HYGON: - /* - * Leaf 0x80000008 ECX[15:12] is ApicIdCoreSize. - * Leaf 0x80000008 ECX[7:0] is NumberOfCores (minus one). - * Update to reflect vLAPIC_ID =3D vCPU_ID * 2. But avoid - * - overflow, - * - going out of sync with leaf 1 EBX[23:16], - * - incrementing ApicIdCoreSize when it's zero (which changes= the - * meaning of bits 7:0). - * - * UPDATE: I addition to avoiding overflow, some - * proprietary operating systems have trouble with - * apic_id_size values greater than 7. Limit the value to - * 7 for now. - */ - if ( p->policy.extd.nc < 0x7f ) - { - if ( p->policy.extd.apic_id_size !=3D 0 && p->policy.extd.= apic_id_size < 0x7 ) - p->policy.extd.apic_id_size++; - - p->policy.extd.nc =3D (p->policy.extd.nc << 1) | 1; - } - break; - } + /* TODO: Expose the ability to choose a custom topology for HVM/PV= H */ + xc_topo_from_parts(&p->policy, 1, di.max_vcpu_id + 1); } =20 nr_leaves =3D ARRAY_SIZE(p->leaves); @@ -1028,3 +976,89 @@ bool xc_cpu_policy_is_compatible(xc_interface *xch, x= c_cpu_policy_t *host, =20 return false; } + +static uint32_t order(uint32_t n) +{ + return 32 - __builtin_clz(n); +} + +void xc_topo_from_parts(struct cpu_policy *p, + uint32_t threads_per_core, uint32_t cores_per_pkg) +{ + uint32_t threads_per_pkg =3D threads_per_core * cores_per_pkg; + uint32_t apic_id_size; + + if ( p->basic.max_leaf < 0xb ) + p->basic.max_leaf =3D 0xb; + + memset(p->topo.raw, 0, sizeof(p->topo.raw)); + + /* thread level */ + p->topo.subleaf[0].nr_logical =3D threads_per_core; + p->topo.subleaf[0].id_shift =3D 0; + p->topo.subleaf[0].level =3D 0; + p->topo.subleaf[0].type =3D 1; + if ( threads_per_core > 1 ) + p->topo.subleaf[0].id_shift =3D order(threads_per_core - 1); + + /* core level */ + p->topo.subleaf[1].nr_logical =3D cores_per_pkg; + if ( p->x86_vendor =3D=3D X86_VENDOR_INTEL ) + p->topo.subleaf[1].nr_logical =3D threads_per_pkg; + p->topo.subleaf[1].id_shift =3D p->topo.subleaf[0].id_shift; + p->topo.subleaf[1].level =3D 1; + p->topo.subleaf[1].type =3D 2; + if ( cores_per_pkg > 1 ) + p->topo.subleaf[1].id_shift +=3D order(cores_per_pkg - 1); + + apic_id_size =3D p->topo.subleaf[1].id_shift; + + /* + * Contrary to what the name might seem to imply. HTT is an enabler for + * SMP and there's no harm in setting it even with a single vCPU. + */ + p->basic.htt =3D true; + + p->basic.lppp =3D 0xff; + if ( threads_per_pkg < 0xff ) + p->basic.lppp =3D threads_per_pkg; + + switch ( p->x86_vendor ) + { + case X86_VENDOR_INTEL: + struct cpuid_cache_leaf *sl =3D p->cache.subleaf; + for ( size_t i =3D 0; sl->type && + i < ARRAY_SIZE(p->cache.raw); i++, sl++ ) + { + sl->cores_per_package =3D cores_per_pkg - 1; + sl->threads_per_cache =3D threads_per_core - 1; + if ( sl->type =3D=3D 3 /* unified cache */ ) + sl->threads_per_cache =3D threads_per_pkg - 1; + } + break; + + case X86_VENDOR_AMD: + case X86_VENDOR_HYGON: + /* Expose p->basic.lppp */ + p->extd.cmp_legacy =3D true; + + /* Clip NC to the maximum value it can hold */ + p->extd.nc =3D 0xff; + if ( threads_per_pkg <=3D 0xff ) + p->extd.nc =3D threads_per_pkg - 1; + + /* TODO: Expose leaf e1E */ + p->extd.topoext =3D false; + + /* + * Clip APIC ID to 8, as that's what high core-count machines = do + * + * That what AMD EPYC 9654 does with >256 CPUs + */ + p->extd.apic_id_size =3D 8; + if ( apic_id_size < 8 ) + p->extd.apic_id_size =3D apic_id_size; + + break; + } +} diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 76efb050ed..679d1fe4fa 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -278,9 +278,6 @@ static void recalculate_misc(struct cpu_policy *p) =20 p->basic.raw[0x8] =3D EMPTY_LEAF; =20 - /* TODO: Rework topology logic. */ - memset(p->topo.raw, 0, sizeof(p->topo.raw)); - p->basic.raw[0xc] =3D EMPTY_LEAF; =20 p->extd.e1d &=3D ~CPUID_COMMON_1D_FEATURES; @@ -387,6 +384,9 @@ static void __init calculate_host_policy(void) recalculate_xstate(p); recalculate_misc(p); =20 + /* Wipe host topology. Toolstack is expected to synthesise a sensible = one */ + memset(p->topo.raw, 0, sizeof(p->topo.raw)); + /* When vPMU is disabled, drop it from the host policy. */ if ( vpmu_mode =3D=3D XENPMU_MODE_OFF ) p->basic.raw[0xa] =3D EMPTY_LEAF; --=20 2.34.1