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Mon, 04 Dec 2023 01:43:09 -0800 (PST) From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , Kevin Tian Subject: [PATCH v2 1/6] iommu/vt-d: do not assume page table levels for quarantine domain Date: Mon, 4 Dec 2023 10:43:00 +0100 Message-ID: <20231204094305.59267-2-roger.pau@citrix.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231204094305.59267-1-roger.pau@citrix.com> References: <20231204094305.59267-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1701683016336100001 Like XSA-445, do not assume IOMMU page table levels on VT-d are always set based on DEFAULT_DOMAIN_ADDRESS_WIDTH and instead fetch the value set by intel_iommu_hwdom_init() from the domain iommu structure. This prevents changes to intel_iommu_hwdom_init() possibly getting the levels out of sync with what intel_iommu_quarantine_init() expects. No functional change, since on Intel domains are hardcoded to use DEFAULT_DOMAIN_ADDRESS_WIDTH. Signed-off-by: Roger Pau Monn=C3=A9 Reviewed-by: Jan Beulich --- Changes since v1: - New in this version. --- xen/drivers/passthrough/vtd/iommu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/= vtd/iommu.c index e13b7d99db40..bc6181c9f911 100644 --- a/xen/drivers/passthrough/vtd/iommu.c +++ b/xen/drivers/passthrough/vtd/iommu.c @@ -3162,7 +3162,7 @@ static int cf_check intel_iommu_quarantine_init(struc= t pci_dev *pdev, { struct domain_iommu *hd =3D dom_iommu(dom_io); struct page_info *pg; - unsigned int agaw =3D width_to_agaw(DEFAULT_DOMAIN_ADDRESS_WIDTH); + unsigned int agaw =3D hd->arch.vtd.agaw; unsigned int level =3D agaw_to_level(agaw); const struct acpi_drhd_unit *drhd; const struct acpi_rmrr_unit *rmrr; --=20 2.43.0 From nobody Sun May 12 10:01:54 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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Mon, 04 Dec 2023 01:43:10 -0800 (PST) From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , Jan Beulich , Andrew Cooper Subject: [PATCH v2 2/6] amd-vi: set IOMMU page table levels based on guest reported paddr width Date: Mon, 4 Dec 2023 10:43:01 +0100 Message-ID: <20231204094305.59267-3-roger.pau@citrix.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231204094305.59267-1-roger.pau@citrix.com> References: <20231204094305.59267-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1701683012236100001 However take into account the minimum number of levels required by unity ma= ps when setting the page table levels. The previous setting of the page table levels for PV guests based on the highest RAM address was bogus, as there can be other non-RAM regions past t= he highest RAM address that need to be mapped, for example device MMIO. For HVM we also take amd_iommu_min_paging_mode into account, however if uni= ty maps require more than 4 levels attempting to add those will currently fail= at the p2m level, as 4 levels is the maximum supported. Fixes: 0700c962ac2d ('Add AMD IOMMU support into hypervisor') Signed-off-by: Roger Pau Monn=C3=A9 --- changes since v1: - Use paging_max_paddr_bits() instead of hardcoding DEFAULT_DOMAIN_ADDRESS_WIDTH. --- xen/drivers/passthrough/amd/pci_amd_iommu.c | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/xen/drivers/passthrough/amd/pci_amd_iommu.c b/xen/drivers/pass= through/amd/pci_amd_iommu.c index 6bc73dc21052..00a25e649f22 100644 --- a/xen/drivers/passthrough/amd/pci_amd_iommu.c +++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c @@ -359,21 +359,17 @@ int __read_mostly amd_iommu_min_paging_mode =3D 1; static int cf_check amd_iommu_domain_init(struct domain *d) { struct domain_iommu *hd =3D dom_iommu(d); + int pglvl =3D amd_iommu_get_paging_mode( + PFN_DOWN(1UL << paging_max_paddr_bits(d))); + + if ( pglvl < 0 ) + return pglvl; =20 /* - * Choose the number of levels for the IOMMU page tables. - * - PV needs 3 or 4, depending on whether there is RAM (including hot= plug - * RAM) above the 512G boundary. - * - HVM could in principle use 3 or 4 depending on how much guest - * physical address space we give it, but this isn't known yet so us= e 4 - * unilaterally. - * - Unity maps may require an even higher number. + * Choose the number of levels for the IOMMU page tables, taking into + * account unity maps. */ - hd->arch.amd.paging_mode =3D max(amd_iommu_get_paging_mode( - is_hvm_domain(d) - ? 1UL << (DEFAULT_DOMAIN_ADDRESS_WIDTH - PAGE_SHIFT) - : get_upper_mfn_bound() + 1), - amd_iommu_min_paging_mode); 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1701683026514100005 This change just introduces the boilerplate code in order to use a rangeset when setting up the hardware domain IOMMU mappings. The rangeset is never populated in this patch, so it's a non-functional change as far as the mapp= ings the domain gets established. Note there's a change for HVM domains (ie: PVH dom0) that will get switched= to create the p2m mappings using map_mmio_regions() instead of p2m_add_identity_entry(), so that ranges can be mapped with a single functi= on call if possible. Note that the interface of map_mmio_regions() doesn't al= low creating read-only mappings, but so far there are no such mappings created = for PVH dom0 in arch_iommu_hwdom_init(). Signed-off-by: Roger Pau Monn=C3=A9 --- Changes since v1: - Split from bigger patch. --- xen/drivers/passthrough/x86/iommu.c | 89 +++++++++++++++++++++++++++++ 1 file changed, 89 insertions(+) diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/= x86/iommu.c index 857dccb6a465..531a428f6496 100644 --- a/xen/drivers/passthrough/x86/iommu.c +++ b/xen/drivers/passthrough/x86/iommu.c @@ -370,10 +370,77 @@ static unsigned int __hwdom_init hwdom_iommu_map(cons= t struct domain *d, return perms; } =20 +struct map_data { + struct domain *d; + unsigned int flush_flags; + bool ro; +}; + +static int __hwdom_init cf_check identity_map(unsigned long s, unsigned lo= ng e, + void *data) +{ + struct map_data *info =3D data; + struct domain *d =3D info->d; + long rc; + + if ( iommu_verbose ) + printk(XENLOG_INFO " [%010lx, %010lx] R%c\n", + s, e, info->ro ? 'O' : 'W'); + + if ( paging_mode_translate(d) ) + { + if ( info->ro ) + { + ASSERT_UNREACHABLE(); + return 0; + } + while ( (rc =3D map_mmio_regions(d, _gfn(s), e - s + 1, _mfn(s))) = > 0 ) + { + s +=3D rc; + process_pending_softirqs(); + } + } + else + { + const unsigned int perms =3D IOMMUF_readable | IOMMUF_preempt | + (info->ro ? 0 : IOMMUF_writable); + + if ( info->ro && !iomem_access_permitted(d, s, e) ) + { + /* + * Should be more fine grained in order to not map the forbidd= en + * frame instead of rejecting the region as a whole, but it's = only + * for read-only MMIO regions, which are very limited. + */ + printk(XENLOG_DEBUG + "IOMMU read-only mapping of region [%lx, %lx] forbidden= \n", + s, e); + return 0; + } + while ( (rc =3D iommu_map(d, _dfn(s), _mfn(s), e - s + 1, + perms, &info->flush_flags)) > 0 ) + { + s +=3D rc; + process_pending_softirqs(); + } + } + ASSERT(rc <=3D 0); + if ( rc ) + printk(XENLOG_WARNING + "IOMMU identity mapping of [%lx, %lx] failed: %ld\n", + s, e, rc); + + /* Ignore errors and attempt to map the remaining regions. */ + return 0; +} + void __hwdom_init arch_iommu_hwdom_init(struct domain *d) { unsigned long i, top, max_pfn, start, count; unsigned int flush_flags =3D 0, start_perms =3D 0; + struct rangeset *map; + struct map_data map_data =3D { .d =3D d }; + int rc; =20 BUG_ON(!is_hardware_domain(d)); =20 @@ -397,6 +464,10 @@ void __hwdom_init arch_iommu_hwdom_init(struct domain = *d) if ( iommu_hwdom_passthrough ) return; =20 + map =3D rangeset_new(NULL, NULL, 0); + if ( !map ) + panic("IOMMU init: unable to allocate rangeset\n"); + max_pfn =3D (GB(4) >> PAGE_SHIFT) - 1; top =3D max(max_pdx, pfn_to_pdx(max_pfn) + 1); =20 @@ -451,6 +522,24 @@ void __hwdom_init arch_iommu_hwdom_init(struct domain = *d) goto commit; } =20 + if ( iommu_verbose ) + printk(XENLOG_INFO "d%u: identity mappings for IOMMU:\n", + d->domain_id); + + rc =3D rangeset_report_ranges(map, 0, ~0UL, identity_map, &map_data); + if ( rc ) + panic("IOMMU unable to create mappings: %d\n", rc); + if ( is_pv_domain(d) ) + { + map_data.ro =3D true; + rc =3D rangeset_report_ranges(mmio_ro_ranges, 0, ~0UL, identity_ma= p, + &map_data); + if ( rc ) + panic("IOMMU unable to create read-only mappings: %d\n", rc); + } + + rangeset_destroy(map); + /* Use if to avoid compiler warning */ if ( iommu_iotlb_flush_all(d, flush_flags) ) return; --=20 2.43.0 From nobody Sun May 12 10:01:54 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=reject dis=none) header.from=citrix.com ARC-Seal: i=1; a=rsa-sha256; t=1701683014; cv=none; d=zohomail.com; s=zohoarc; b=fxpBL3wB7C8ooUc91S3XUc7J9wo+7jlqb9EdBBlDtfT/dF3/ndqr62//CN5xTxhJjtqDVlIkA+2JgIlJVRhFOlOyvTbdkVaQwaU7lWh/msQwLws+RFulnlqRXvmcOFRLbbt5qky+KvnV1vEy0nAsoJCl6HshC+WFshIp006W32c= ARC-Message-Signature: i=1; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1701683016368100003 Introduce the code to remove regions not to be mapped from the rangeset that will be used to setup the IOMMU page tables for the hardware domain. This change also introduces two new functions: remove_xen_ranges() and vpci_subtract_mmcfg() that copy the logic in xen_in_range() and vpci_is_mmcfg_address() respectively and remove the ranges that would other= wise be intercepted by the original functions. Note that the rangeset is still not populated. Signed-off-by: Roger Pau Monn=C3=A9 --- Changes since v1: - Split from bigger patch. --- xen/arch/x86/hvm/io.c | 16 ++++++++ xen/arch/x86/include/asm/hvm/io.h | 3 ++ xen/arch/x86/include/asm/setup.h | 1 + xen/arch/x86/setup.c | 48 ++++++++++++++++++++++ xen/drivers/passthrough/x86/iommu.c | 64 +++++++++++++++++++++++++++++ 5 files changed, 132 insertions(+) diff --git a/xen/arch/x86/hvm/io.c b/xen/arch/x86/hvm/io.c index d75af83ad01f..a42854c52b65 100644 --- a/xen/arch/x86/hvm/io.c +++ b/xen/arch/x86/hvm/io.c @@ -369,6 +369,22 @@ bool vpci_is_mmcfg_address(const struct domain *d, pad= dr_t addr) return vpci_mmcfg_find(d, addr); } =20 +int __hwdom_init vpci_subtract_mmcfg(const struct domain *d, struct ranges= et *r) +{ + const struct hvm_mmcfg *mmcfg; + + list_for_each_entry ( mmcfg, &d->arch.hvm.mmcfg_regions, next ) + { + int rc =3D rangeset_remove_range(r, PFN_DOWN(mmcfg->addr), + PFN_DOWN(mmcfg->addr + mmcfg->size = - 1)); + + if ( rc ) + return rc; + } + + return 0; +} + static unsigned int vpci_mmcfg_decode_addr(const struct hvm_mmcfg *mmcfg, paddr_t addr, pci_sbdf_t *sbdf) { diff --git a/xen/arch/x86/include/asm/hvm/io.h b/xen/arch/x86/include/asm/h= vm/io.h index a97731657801..e1e5e6fe7491 100644 --- a/xen/arch/x86/include/asm/hvm/io.h +++ b/xen/arch/x86/include/asm/hvm/io.h @@ -156,6 +156,9 @@ void destroy_vpci_mmcfg(struct domain *d); /* Check if an address is between a MMCFG region for a domain. */ bool vpci_is_mmcfg_address(const struct domain *d, paddr_t addr); =20 +/* Remove MMCFG regions from a given rangeset. */ +int vpci_subtract_mmcfg(const struct domain *d, struct rangeset *r); + #endif /* __ASM_X86_HVM_IO_H__ */ =20 =20 diff --git a/xen/arch/x86/include/asm/setup.h b/xen/arch/x86/include/asm/se= tup.h index 9a460e4db8f4..cd07d98101d8 100644 --- a/xen/arch/x86/include/asm/setup.h +++ b/xen/arch/x86/include/asm/setup.h @@ -37,6 +37,7 @@ void discard_initial_images(void); void *bootstrap_map(const module_t *mod); =20 int xen_in_range(unsigned long mfn); +int remove_xen_ranges(struct rangeset *r); =20 extern uint8_t kbd_shift_flags; =20 diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 3cba2be0af6c..71fa0b46f181 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -2136,6 +2136,54 @@ int __hwdom_init xen_in_range(unsigned long mfn) return 0; } =20 +int __hwdom_init remove_xen_ranges(struct rangeset *r) +{ + paddr_t start, end; + int rc; + + /* S3 resume code (and other real mode trampoline code) */ + rc =3D rangeset_remove_range(r, PFN_DOWN(bootsym_phys(trampoline_start= )), + PFN_DOWN(bootsym_phys(trampoline_end))); + if ( rc ) + return rc; + + /* + * This needs to remain in sync with the uses of the same symbols in + * - __start_xen() + * - is_xen_fixed_mfn() + * - tboot_shutdown() + */ + /* hypervisor .text + .rodata */ + rc =3D rangeset_remove_range(r, PFN_DOWN(__pa(&_stext)), + PFN_DOWN(__pa(&__2M_rodata_end))); + if ( rc ) + return rc; + + /* hypervisor .data + .bss */ + if ( efi_boot_mem_unused(&start, &end) ) + { + ASSERT(__pa(start) >=3D __pa(&__2M_rwdata_start)); + rc =3D rangeset_remove_range(r, PFN_DOWN(__pa(&__2M_rwdata_start)), + PFN_DOWN(__pa(start))); + if ( rc ) + return rc; + ASSERT(__pa(end) <=3D __pa(&__2M_rwdata_end)); + rc =3D rangeset_remove_range(r, PFN_DOWN(__pa(end)), + PFN_DOWN(__pa(&__2M_rwdata_end))); + if ( rc ) + return rc; + } + else + { + rc =3D rangeset_remove_range(r, PFN_DOWN(__pa(&__2M_rwdata_start)), + PFN_DOWN(__pa(&__2M_rwdata_end))); + if ( rc ) + return rc; + } + + return 0; +} + static int __hwdom_init cf_check io_bitmap_cb( unsigned long s, unsigned long e, void *ctx) { diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/= x86/iommu.c index 531a428f6496..7e97805fccec 100644 --- a/xen/drivers/passthrough/x86/iommu.c +++ b/xen/drivers/passthrough/x86/iommu.c @@ -370,6 +370,14 @@ static unsigned int __hwdom_init hwdom_iommu_map(const= struct domain *d, return perms; } =20 +static int __hwdom_init cf_check map_subtract(unsigned long s, unsigned lo= ng e, + void *data) +{ + struct rangeset *map =3D data; + + return rangeset_remove_range(map, s, e); +} + struct map_data { struct domain *d; unsigned int flush_flags; @@ -522,6 +530,62 @@ void __hwdom_init arch_iommu_hwdom_init(struct domain = *d) goto commit; } =20 + /* Remove any areas in-use by Xen. */ + rc =3D remove_xen_ranges(map); + if ( rc ) + panic("IOMMU failed to remove Xen ranges: %d\n", rc); + + /* Remove any overlap with the Interrupt Address Range. */ + rc =3D rangeset_remove_range(map, 0xfee00, 0xfeeff); + if ( rc ) + panic("IOMMU failed to remove Interrupt Address Range: %d\n", + rc); + + /* If emulating IO-APIC(s) make sure the base address is unmapped. */ + if ( has_vioapic(d) ) + { + for ( i =3D 0; i < d->arch.hvm.nr_vioapics; i++ ) + { + rc =3D rangeset_remove_singleton(map, + PFN_DOWN(domain_vioapic(d, i)->base_address)); + if ( rc ) + panic("IOMMU failed to remove IO-APIC: %d\n", + rc); + } + } + + if ( is_pv_domain(d) ) + { + /* + * Be consistent with CPU mappings: Dom0 is permitted to establish= r/o + * ones there (also for e.g. HPET in certain cases), so it should = also + * have such established for IOMMUs. Remove any read-only ranges = here, + * since ranges in mmio_ro_ranges are already explicitly mapped be= low + * in read-only mode. + */ + rc =3D rangeset_report_ranges(mmio_ro_ranges, 0, ~0UL, map_subtrac= t, map); + if ( rc ) + panic("IOMMU failed to remove read-only regions: %d\n", + rc); + } + + if ( has_vpci(d) ) + { + /* + * TODO: runtime added MMCFG regions are not checked to make sure = they + * don't overlap with already mapped regions, thus preventing trap= ping. + */ + rc =3D vpci_subtract_mmcfg(d, map); + if ( rc ) + panic("IOMMU unable to remove MMCFG areas: %d\n", rc); + } + + /* Remove any regions past the last address addressable by the domain.= */ + rc =3D rangeset_remove_range(map, PFN_DOWN(1UL << paging_max_paddr_bit= s(d)), + ~0UL); + if ( rc ) + panic("IOMMU unable to remove unaddressable ranges: %d\n", rc); + if ( iommu_verbose ) printk(XENLOG_INFO "d%u: identity mappings for IOMMU:\n", d->domain_id); --=20 2.43.0 From nobody Sun May 12 10:01:55 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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Mon, 04 Dec 2023 01:43:14 -0800 (PST) From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , Jan Beulich , Paul Durrant Subject: [PATCH v2 5/6] x86/iommu: switch hwdom IOMMU to use a rangeset Date: Mon, 4 Dec 2023 10:43:04 +0100 Message-ID: <20231204094305.59267-6-roger.pau@citrix.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231204094305.59267-1-roger.pau@citrix.com> References: <20231204094305.59267-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1701683022462100001 The current loop that iterates from 0 to the maximum RAM address in order to setup the IOMMU mappings is highly inefficient, and it will get worse as the amount of RAM increases. It's also not accounting for any reserved regions past the last RAM address. Instead of iterating over memory addresses, iterate over the memory map reg= ions and use a rangeset in order to keep track of which ranges need to be identi= ty mapped in the hardware domain physical address space. On an AMD EPYC 7452 with 512GiB of RAM, the time to execute arch_iommu_hwdom_init() in nanoseconds is: x old + new N Min Max Median Avg Stddev x 5 2.2364154e+10 2.338244e+10 2.2474685e+10 2.2622409e+10 4.2949869e+08 + 5 1025012 1033036 1026188 1028276.2 3623.1194 Difference at 95.0% confidence -2.26214e+10 +/- 4.42931e+08 -99.9955% +/- 9.05152e-05% (Student's t, pooled s =3D 3.03701e+08) Execution time of arch_iommu_hwdom_init() goes down from ~22s to ~0.001s. Note there's a change for HVM domains (ie: PVH dom0) that get switched to create the p2m mappings using map_mmio_regions() instead of p2m_add_identity_entry(), so that ranges can be mapped with a single functi= on call if possible. Note that the interface of map_mmio_regions() doesn't allow creating read-only mappings, but so far there are no such mappings created for PVH dom0 in arch_iommu_hwdom_init(). No change intended in the resulting mappings that a hardware domain gets. Signed-off-by: Roger Pau Monn=C3=A9 --- Changes since v1: - Split from bigger patch. - Remove unneeded default case. --- xen/drivers/passthrough/x86/iommu.c | 157 ++++++++-------------------- 1 file changed, 42 insertions(+), 115 deletions(-) diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/= x86/iommu.c index 7e97805fccec..81d6129189d0 100644 --- a/xen/drivers/passthrough/x86/iommu.c +++ b/xen/drivers/passthrough/x86/iommu.c @@ -300,76 +300,6 @@ void iommu_identity_map_teardown(struct domain *d) } } =20 -static unsigned int __hwdom_init hwdom_iommu_map(const struct domain *d, - unsigned long pfn, - unsigned long max_pfn) -{ - mfn_t mfn =3D _mfn(pfn); - unsigned int i, type, perms =3D IOMMUF_readable | IOMMUF_writable; - - /* - * Set up 1:1 mapping for dom0. Default to include only conventional R= AM - * areas and let RMRRs include needed reserved regions. When set, the - * inclusive mapping additionally maps in every pfn up to 4GB except t= hose - * that fall in unusable ranges for PV Dom0. - */ - if ( (pfn > max_pfn && !mfn_valid(mfn)) || xen_in_range(pfn) ) - return 0; - - switch ( type =3D page_get_ram_type(mfn) ) - { - case RAM_TYPE_UNUSABLE: - return 0; - - case RAM_TYPE_CONVENTIONAL: - if ( iommu_hwdom_strict ) - return 0; - break; - - default: - if ( type & RAM_TYPE_RESERVED ) - { - if ( !iommu_hwdom_inclusive && !iommu_hwdom_reserved ) - perms =3D 0; - } - else if ( is_hvm_domain(d) ) - return 0; - else if ( !iommu_hwdom_inclusive || pfn > max_pfn ) - perms =3D 0; - } - - /* Check that it doesn't overlap with the Interrupt Address Range. */ - if ( pfn >=3D 0xfee00 && pfn <=3D 0xfeeff ) - return 0; - /* ... or the IO-APIC */ - if ( has_vioapic(d) ) - { - for ( i =3D 0; i < d->arch.hvm.nr_vioapics; i++ ) - if ( pfn =3D=3D PFN_DOWN(domain_vioapic(d, i)->base_address) ) - return 0; - } - else if ( is_pv_domain(d) ) - { - /* - * Be consistent with CPU mappings: Dom0 is permitted to establish= r/o - * ones there (also for e.g. HPET in certain cases), so it should = also - * have such established for IOMMUs. - */ - if ( iomem_access_permitted(d, pfn, pfn) && - rangeset_contains_singleton(mmio_ro_ranges, pfn) ) - perms =3D IOMMUF_readable; - } - /* - * ... or the PCIe MCFG regions. - * TODO: runtime added MMCFG regions are not checked to make sure they - * don't overlap with already mapped regions, thus preventing trapping. - */ - if ( has_vpci(d) && vpci_is_mmcfg_address(d, pfn_to_paddr(pfn)) ) - return 0; - - return perms; -} - static int __hwdom_init cf_check map_subtract(unsigned long s, unsigned lo= ng e, void *data) { @@ -444,8 +374,8 @@ static int __hwdom_init cf_check identity_map(unsigned = long s, unsigned long e, =20 void __hwdom_init arch_iommu_hwdom_init(struct domain *d) { - unsigned long i, top, max_pfn, start, count; - unsigned int flush_flags =3D 0, start_perms =3D 0; + const unsigned long max_pfn =3D PFN_DOWN(GB(4)) - 1; + unsigned int i; struct rangeset *map; struct map_data map_data =3D { .d =3D d }; int rc; @@ -476,58 +406,55 @@ void __hwdom_init arch_iommu_hwdom_init(struct domain= *d) if ( !map ) panic("IOMMU init: unable to allocate rangeset\n"); =20 - max_pfn =3D (GB(4) >> PAGE_SHIFT) - 1; - top =3D max(max_pdx, pfn_to_pdx(max_pfn) + 1); + if ( iommu_hwdom_inclusive ) + { + /* Add the whole range below 4GB, UNUSABLE regions will be removed= . */ + rc =3D rangeset_add_range(map, 0, max_pfn); + if ( rc ) + panic("IOMMU inclusive mappings can't be added: %d\n", + rc); + } =20 - for ( i =3D 0, start =3D 0, count =3D 0; i < top; ) + for ( i =3D 0; i < e820.nr_map; i++ ) { - unsigned long pfn =3D pdx_to_pfn(i); - unsigned int perms =3D hwdom_iommu_map(d, pfn, max_pfn); + struct e820entry entry =3D e820.map[i]; =20 - if ( !perms ) - /* nothing */; - else if ( paging_mode_translate(d) ) + switch ( entry.type ) { - int rc; + case E820_UNUSABLE: + if ( !iommu_hwdom_inclusive || PFN_DOWN(entry.addr) > max_pfn ) + continue; =20 - rc =3D p2m_add_identity_entry(d, pfn, - perms & IOMMUF_writable ? p2m_acce= ss_rw - : p2m_acce= ss_r, - 0); + rc =3D rangeset_remove_range(map, PFN_DOWN(entry.addr), + PFN_DOWN(entry.addr + entry.size - = 1)); if ( rc ) - printk(XENLOG_WARNING - "%pd: identity mapping of %lx failed: %d\n", - d, pfn, rc); - } - else if ( pfn !=3D start + count || perms !=3D start_perms ) - { - long rc; + panic("IOMMU failed to remove unusable memory: %d\n", + rc); + continue; =20 - commit: - while ( (rc =3D iommu_map(d, _dfn(start), _mfn(start), count, - start_perms | IOMMUF_preempt, - &flush_flags)) > 0 ) - { - start +=3D rc; - count -=3D rc; - process_pending_softirqs(); - } - if ( rc ) - printk(XENLOG_WARNING - "%pd: IOMMU identity mapping of [%lx,%lx) failed: %= ld\n", - d, start, start + count, rc); - start =3D pfn; - count =3D 1; - start_perms =3D perms; + case E820_RESERVED: + if ( !iommu_hwdom_inclusive && !iommu_hwdom_reserved ) + continue; + break; + + case E820_RAM: + if ( iommu_hwdom_strict ) + continue; + break; } - else - ++count; =20 - if ( !(++i & 0xfffff) ) - process_pending_softirqs(); + if ( iommu_hwdom_inclusive && + PFN_DOWN(entry.addr + entry.size - 1) <=3D max_pfn ) + /* + * Any range below 4GB is already in the rangeset if using inc= lusive + * mode. + */ + continue; =20 - if ( i =3D=3D top && count ) - goto commit; + rc =3D rangeset_add_range(map, PFN_DOWN(entry.addr), + PFN_DOWN(entry.addr + entry.size - 1)); + if ( rc ) + panic("IOMMU failed to add identity range: %d\n", rc); } =20 /* Remove any areas in-use by Xen. */ @@ -605,7 +532,7 @@ void __hwdom_init arch_iommu_hwdom_init(struct domain *= d) rangeset_destroy(map); =20 /* Use if to avoid compiler warning */ - if ( iommu_iotlb_flush_all(d, flush_flags) ) + if ( iommu_iotlb_flush_all(d, map_data.flush_flags) ) return; } =20 --=20 2.43.0 From nobody Sun May 12 10:01:55 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=reject dis=none) header.from=citrix.com ARC-Seal: i=1; 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Mon, 04 Dec 2023 01:43:15 -0800 (PST) From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , Paul Durrant , Jan Beulich , Andrew Cooper , Wei Liu , Lukasz Hawrylko , "Daniel P. Smith" , =?UTF-8?q?Mateusz=20M=C3=B3wka?= Subject: [PATCH v2 6/6] x86/iommu: cleanup unused functions Date: Mon, 4 Dec 2023 10:43:05 +0100 Message-ID: <20231204094305.59267-7-roger.pau@citrix.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231204094305.59267-1-roger.pau@citrix.com> References: <20231204094305.59267-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1701683024552100002 Remove xen_in_range() and vpci_is_mmcfg_address() now that hey are unused. Adjust comments to point to the new functions that replace the existing one= s. No functional change. Signed-off-by: Roger Pau Monn=C3=A9 --- Can be squashed with the previous patch if desired, split as a separate pat= ch for clarity. --- xen/arch/x86/include/asm/hvm/io.h | 3 -- xen/arch/x86/include/asm/setup.h | 1 - xen/arch/x86/setup.c | 53 ++----------------------------- xen/arch/x86/tboot.c | 2 +- 4 files changed, 3 insertions(+), 56 deletions(-) diff --git a/xen/arch/x86/include/asm/hvm/io.h b/xen/arch/x86/include/asm/h= vm/io.h index e1e5e6fe7491..24d1b6134f02 100644 --- a/xen/arch/x86/include/asm/hvm/io.h +++ b/xen/arch/x86/include/asm/hvm/io.h @@ -153,9 +153,6 @@ int register_vpci_mmcfg_handler(struct domain *d, paddr= _t addr, /* Destroy tracked MMCFG areas. */ void destroy_vpci_mmcfg(struct domain *d); =20 -/* Check if an address is between a MMCFG region for a domain. */ -bool vpci_is_mmcfg_address(const struct domain *d, paddr_t addr); - /* Remove MMCFG regions from a given rangeset. */ int vpci_subtract_mmcfg(const struct domain *d, struct rangeset *r); =20 diff --git a/xen/arch/x86/include/asm/setup.h b/xen/arch/x86/include/asm/se= tup.h index cd07d98101d8..1ced1299c77b 100644 --- a/xen/arch/x86/include/asm/setup.h +++ b/xen/arch/x86/include/asm/setup.h @@ -36,7 +36,6 @@ unsigned long initial_images_nrpages(nodeid_t node); void discard_initial_images(void); void *bootstrap_map(const module_t *mod); =20 -int xen_in_range(unsigned long mfn); int remove_xen_ranges(struct rangeset *r); =20 extern uint8_t kbd_shift_flags; diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 71fa0b46f181..7d2cb61a2a4a 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -1343,7 +1343,7 @@ void asmlinkage __init noreturn __start_xen(unsigned = long mbi_p) relocated =3D true; =20 /* - * This needs to remain in sync with xen_in_range() and the + * This needs to remain in sync with remove_xen_ranges() and the * respective reserve_e820_ram() invocation below. No need to * query efi_boot_mem_unused() here, though. */ @@ -1495,7 +1495,7 @@ void asmlinkage __init noreturn __start_xen(unsigned = long mbi_p) if ( using_2M_mapping() ) efi_boot_mem_unused(NULL, NULL); =20 - /* This needs to remain in sync with xen_in_range(). */ + /* This needs to remain in sync with remove_xen_ranges(). */ if ( efi_boot_mem_unused(&eb_start, &eb_end) ) { reserve_e820_ram(&boot_e820, __pa(_stext), __pa(eb_start)); @@ -2087,55 +2087,6 @@ void arch_get_xen_caps(xen_capabilities_info_t *info) } } =20 -int __hwdom_init xen_in_range(unsigned long mfn) -{ - paddr_t start, end; - int i; - - enum { region_s3, region_ro, region_rw, region_bss, nr_regions }; - static struct { - paddr_t s, e; - } xen_regions[nr_regions] __hwdom_initdata; - - /* initialize first time */ - if ( !xen_regions[0].s ) - { - /* S3 resume code (and other real mode trampoline code) */ - xen_regions[region_s3].s =3D bootsym_phys(trampoline_start); - xen_regions[region_s3].e =3D bootsym_phys(trampoline_end); - - /* - * This needs to remain in sync with the uses of the same symbols = in - * - __start_xen() (above) - * - is_xen_fixed_mfn() - * - tboot_shutdown() - */ - - /* hypervisor .text + .rodata */ - xen_regions[region_ro].s =3D __pa(&_stext); - xen_regions[region_ro].e =3D __pa(&__2M_rodata_end); - /* hypervisor .data + .bss */ - xen_regions[region_rw].s =3D __pa(&__2M_rwdata_start); - xen_regions[region_rw].e =3D __pa(&__2M_rwdata_end); - if ( efi_boot_mem_unused(&start, &end) ) - { - ASSERT(__pa(start) >=3D xen_regions[region_rw].s); - ASSERT(__pa(end) <=3D xen_regions[region_rw].e); - xen_regions[region_rw].e =3D __pa(start); - xen_regions[region_bss].s =3D __pa(end); - xen_regions[region_bss].e =3D __pa(&__2M_rwdata_end); - } - } - - start =3D (paddr_t)mfn << PAGE_SHIFT; - end =3D start + PAGE_SIZE; - for ( i =3D 0; i < nr_regions; i++ ) - if ( (start < xen_regions[i].e) && (end > xen_regions[i].s) ) - return 1; - - return 0; -} - int __hwdom_init remove_xen_ranges(struct rangeset *r) { paddr_t start, end; diff --git a/xen/arch/x86/tboot.c b/xen/arch/x86/tboot.c index 86c4c22cacb8..4c254b4e34b4 100644 --- a/xen/arch/x86/tboot.c +++ b/xen/arch/x86/tboot.c @@ -321,7 +321,7 @@ void tboot_shutdown(uint32_t shutdown_type) =20 /* * Xen regions for tboot to MAC. This needs to remain in sync with - * xen_in_range(). + * remove_xen_ranges(). */ g_tboot_shared->num_mac_regions =3D 3; /* S3 resume code (and other real mode trampoline code) */ --=20 2.43.0