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Wed, 15 Nov 2023 06:26:22 -0500 (EST) (envelope-from sakib@darkstar.site) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: cf16a516-83a9-11ee-98db-6d05b1d4d9a1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed; d=pobox.com; h=from:to:cc :subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; s=sasl; bh=sk3rL+DVQWnHfmbcVD4VUySak WU6iSq3V+yGTLD5SnE=; b=d65LZKjGp9RuGE/Irs55jSZ1205eAfYsgucZKQ6Fk svlBIePhvi7Q+jm1yIk0jQUQ278uRo5MqWBdP7OEud1ysi/WamDU1Tc+abwrQI2w uwQKK8tnRQXNzr06GI9av+WQNDJJruqI7fDWV6Jy8XUQta2VaN+eKv/ElQg1iZxr ZU= From: Sergiy Kibrik To: xen-devel@lists.xenproject.org Cc: Oleksandr Tyshchenko , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Sergiy Kibrik Subject: [RFC PATCH 2/6] xen/public: arch-arm: reserve resources for virtio-pci Date: Wed, 15 Nov 2023 13:26:07 +0200 Message-Id: <20231115112611.3865905-3-Sergiy_Kibrik@epam.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231115112611.3865905-1-Sergiy_Kibrik@epam.com> References: <20231115112611.3865905-1-Sergiy_Kibrik@epam.com> MIME-Version: 1.0 X-Pobox-Relay-ID: CE6E5C9E-83A9-11EE-8331-25B3960A682E-90055647!pb-smtp2.pobox.com Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @pobox.com) X-ZM-MESSAGEID: 1700047606016100005 Content-Type: text/plain; charset="utf-8" From: Oleksandr Tyshchenko In order to enable more use-cases such as having multiple device-models (Qemu) running in different backend domains which provide virtio-pci devices for the same guest, we allocate and expose one PCI host bridge for every virtio backend domain for that guest. For that purpose, reserve separate virtio-pci resources (memory and SPI ran= ge for Legacy PCI interrupts) up to 8 possible PCI hosts (to be aligned with MAX_NR_IOREQ_SERVERS) and allocate a host per backend domain. The PCI host details including its host_id to be written to dedicated Xenstore node for the device-model to retrieve. Signed-off-by: Oleksandr Tyshchenko Signed-off-by: Sergiy Kibrik --- xen/include/public/arch-arm.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index a25e87dbda..e6c9cd5335 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -466,6 +466,19 @@ typedef uint64_t xen_callback_t; #define GUEST_VPCI_MEM_ADDR xen_mk_ullong(0x23000000) #define GUEST_VPCI_MEM_SIZE xen_mk_ullong(0x10000000) =20 +/* + * 16 MB is reserved for virtio-pci configuration space based on calculati= on + * 8 bridges * 2 buses x 32 devices x 8 functions x 4 KB =3D 16 MB + */ +#define GUEST_VIRTIO_PCI_ECAM_BASE xen_mk_ullong(0x33000000) +#define GUEST_VIRTIO_PCI_TOTAL_ECAM_SIZE xen_mk_ullong(0x01000000) +#define GUEST_VIRTIO_PCI_HOST_ECAM_SIZE xen_mk_ullong(0x00200000) + +/* 64 MB is reserved for virtio-pci memory */ +#define GUEST_VIRTIO_PCI_ADDR_TYPE_MEM xen_mk_ullong(0x02000000) +#define GUEST_VIRTIO_PCI_MEM_ADDR xen_mk_ullong(0x34000000) +#define GUEST_VIRTIO_PCI_MEM_SIZE xen_mk_ullong(0x04000000) + /* * 16MB =3D=3D 4096 pages reserved for guest to use as a region to map its * grant table in. @@ -476,6 +489,11 @@ typedef uint64_t xen_callback_t; #define GUEST_MAGIC_BASE xen_mk_ullong(0x39000000) #define GUEST_MAGIC_SIZE xen_mk_ullong(0x01000000) =20 +/* 64 MB is reserved for virtio-pci Prefetch memory */ +#define GUEST_VIRTIO_PCI_ADDR_TYPE_PREFETCH_MEM xen_mk_ullong(0x4200000= 0) +#define GUEST_VIRTIO_PCI_PREFETCH_MEM_ADDR xen_mk_ullong(0x3a00000= 0) +#define GUEST_VIRTIO_PCI_PREFETCH_MEM_SIZE xen_mk_ullong(0x0400000= 0) + #define GUEST_RAM_BANKS 2 =20 /* @@ -515,6 +533,9 @@ typedef uint64_t xen_callback_t; #define GUEST_VIRTIO_MMIO_SPI_FIRST 33 #define GUEST_VIRTIO_MMIO_SPI_LAST 43 =20 +#define GUEST_VIRTIO_PCI_SPI_FIRST 44 +#define GUEST_VIRTIO_PCI_SPI_LAST 76 + /* PSCI functions */ #define PSCI_cpu_suspend 0 #define PSCI_cpu_off 1 --=20 2.25.1