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Mon, 13 Nov 2023 00:52:47 -0800 (PST) From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , Jan Beulich , Andrew Cooper , Wei Liu Subject: [PATCH] x86/intel: fix indentation Date: Mon, 13 Nov 2023 09:51:30 +0100 Message-ID: <20231113085130.43458-1-roger.pau@citrix.com> X-Mailer: git-send-email 2.42.0 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1699865614661100001 Adjust line to use a hard tab and align using spaces afterwards, instead of using all spaces. Fixes: fc3090a47b21 ('x86/boot: Clear XD_DISABLE from the early boot path') Signed-off-by: Roger Pau Monn=C3=A9 Acked-by: Jan Beulich --- Realized while doing backports, not sure if it's worth fixing on it's own. --- xen/arch/x86/cpu/intel.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c index a8ba3191e618..dfee64689ffe 100644 --- a/xen/arch/x86/cpu/intel.c +++ b/xen/arch/x86/cpu/intel.c @@ -307,7 +307,7 @@ static void cf_check early_init_intel(struct cpuinfo_x8= 6 *c) c->x86_cache_alignment =3D 128; =20 if (c =3D=3D &boot_cpu_data && - bootsym(trampoline_misc_enable_off) & MSR_IA32_MISC_ENABLE_XD_= DISABLE) + bootsym(trampoline_misc_enable_off) & MSR_IA32_MISC_ENABLE_XD_DISABLE) printk(KERN_INFO "re-enabled NX (Execute Disable) protection\n"); =20 /* Unmask CPUID levels and NX if masked: */ --=20 2.42.0