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helo=lists.xenproject.org; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Stewart Hildebrand To: CC: Stewart Hildebrand , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , "Volodymyr Babchuk" , Julien Grall Subject: [PATCH v6 1/9] xen/arm: don't pass iommu properties to hwdom for iommu-map Date: Thu, 9 Nov 2023 13:27:04 -0500 Message-ID: <20231109182716.367119-2-stewart.hildebrand@amd.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231109182716.367119-1-stewart.hildebrand@amd.com> References: <20231109182716.367119-1-stewart.hildebrand@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF0000150A:EE_|MW3PR12MB4396:EE_ X-MS-Office365-Filtering-Correlation-Id: cc82205d-a271-4535-a816-08dbe151a6dc X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: JXwiHmn91oleBrJtrLO5Bw8DdrFEMZBmiWxVrnIu4MzE0lVL4/PUbnDnRmTygMfS7DnqRdKauqrtNHPgD5DkTh+a++nZIWKBxxwlntwX+WzVspL5SVgnCFrb8l60N/kKmKCkegcw38KV5CypPnmA/Yyxo0eTkc1FdpQwhJBNPL80qI0p1ebsRMQmSk/86G3ZnNxLD0ZM4iXYMYLjN+yf3J0JAfH4wBDKBbZhwhLEYT9yrKM1Hg1xBmjZWBCqaiKAuw/T4SuDzO/GtPQs8jG8yDX0xpnYGmw8nu2Dl35+5uWmDLrFJsCxdV7j38bKAKrYPp6qbvIA+1y1X288Mf/5zpY0fqy8BAmIJc/voIr6m+fQTxssLlk+KWWxuSCugXacbL3Evbuf5GQ8pz3AP8S0JgtcvZxYtzCmG0x3hpxQCRQ1vRKsSLZ8ky4JOfMnjNNRWDC+pU/uOAv0Mb0Ff8mbtOrqG+WdZUXL5LDzVU1GptozAqy0VsmSd9qA3Dh/4DuGkIL3Rg4RTLQVsaUpyF6Y04YNzpAVSJaXXOR7eOZykV4IK1JeaN2MG6ChN8zL4qHHHi0pji9+n5vHvBeQJfCglkLSU55UJJFg7KayJLqGt4BVzOUjoW7621IEwx0pOvb9Ew+THeJcgnBqKru3mb/xgCxJ1StqJtKqf6z2M9qezUfoNTPq83JMiZHWOEI96JADj1hiobs3txLuA/kOjbhiO0puWUYfMTrqkxhplzf3zthXTrGdsMQgEhJu+90RkJfHkV2cIK6EE8cZg5KVXe5tGg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(39860400002)(376002)(136003)(396003)(346002)(230922051799003)(82310400011)(186009)(1800799009)(451199024)(64100799003)(36840700001)(40470700004)(46966006)(426003)(336012)(47076005)(2616005)(6666004)(36860700001)(966005)(26005)(70206006)(40480700001)(70586007)(6916009)(316002)(54906003)(1076003)(478600001)(4326008)(44832011)(82740400003)(40460700003)(2906002)(8676002)(8936002)(81166007)(356005)(36756003)(41300700001)(86362001)(5660300002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Nov 2023 18:28:21.0511 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cc82205d-a271-4535-a816-08dbe151a6dc X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF0000150A.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW3PR12MB4396 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1699554538507100001 Content-Type: text/plain; charset="utf-8" A device tree node for a PCIe root controller may have an iommu-map propert= y [1] with a phandle reference to the SMMU node, but not necessarily an iommus property. In this case, we want to treat it the same as we currently handle devices with an iommus property: don't pass the iommu related properties to hwdom. [1] https://www.kernel.org/doc/Documentation/devicetree/bindings/pci/pci-io= mmu.txt Reported-by: Michal Orzel Signed-off-by: Stewart Hildebrand Acked-by: Julien Grall --- v5->v6: * add Julien's A-b v4->v5: * new patch --- xen/arch/arm/domain_build.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 49792dd590ee..ca7d0f5ffde5 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -1135,6 +1135,8 @@ static int __init write_properties(struct domain *d, = struct kernel_info *kinfo, * should be skipped. */ iommu_node =3D dt_parse_phandle(node, "iommus", 0); + if ( !iommu_node ) + iommu_node =3D dt_parse_phandle(node, "iommu-map", 1); if ( iommu_node && device_get_class(iommu_node) !=3D DEVICE_IOMMU ) iommu_node =3D NULL; =20 --=20 2.42.0 From nobody Tue May 14 19:19:46 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; 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helo=lists.xenproject.org; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C From: Stewart Hildebrand To: CC: Oleksandr Tyshchenko , Stefano Stabellini , Julien Grall , Rahul Singh , Bertrand Marquis , "Jan Beulich" , Paul Durrant , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stewart Hildebrand" , Julien Grall Subject: [PATCH v6 2/9] iommu/arm: Add iommu_dt_xlate() Date: Thu, 9 Nov 2023 13:27:05 -0500 Message-ID: <20231109182716.367119-3-stewart.hildebrand@amd.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231109182716.367119-1-stewart.hildebrand@amd.com> References: <20231109182716.367119-1-stewart.hildebrand@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9DB:EE_|DM6PR12MB4973:EE_ X-MS-Office365-Filtering-Correlation-Id: 000bb191-197c-435c-9433-08dbe151b07d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Nov 2023 18:28:37.1740 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 000bb191-197c-435c-9433-08dbe151b07d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9DB.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4973 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1699554544400100001 Content-Type: text/plain; charset="utf-8" From: Oleksandr Tyshchenko Move code for processing DT IOMMU specifier to a separate helper. This helper will be re-used for adding PCI devices by the subsequent patches as we will need exact the same actions for processing DT PCI-IOMMU specifier. While at it introduce NO_IOMMU to avoid magic "1". Signed-off-by: Oleksandr Tyshchenko Signed-off-by: Stewart Hildebrand Reviewed-by: Julien Grall --- v5->v6: * pass ops parameter to iommu_dt_xlate() * add Julien's R-b v4->v5: * rebase on top of "dynamic node programming using overlay dtbo" series * move #define NO_IOMMU 1 to header * s/these/this/ inside comment v3->v4: * make dt_phandle_args *iommu_spec const * move !ops->add_device check to helper v2->v3: * no change v1->v2: * no change downstream->v1: * trivial rebase * s/dt_iommu_xlate/iommu_dt_xlate/ (cherry picked from commit c26bab0415ca303df86aba1d06ef8edc713734d3 from the downstream branch poc/pci-passthrough from https://gitlab.com/xen-project/people/bmarquis/xen-arm-poc.git) --- xen/drivers/passthrough/device_tree.c | 48 +++++++++++++++++---------- xen/include/xen/iommu.h | 2 ++ 2 files changed, 32 insertions(+), 18 deletions(-) diff --git a/xen/drivers/passthrough/device_tree.c b/xen/drivers/passthroug= h/device_tree.c index 075fb25a3706..4c35281d98ad 100644 --- a/xen/drivers/passthrough/device_tree.c +++ b/xen/drivers/passthrough/device_tree.c @@ -137,6 +137,30 @@ int iommu_release_dt_devices(struct domain *d) return 0; } =20 +static int iommu_dt_xlate(struct device *dev, + const struct dt_phandle_args *iommu_spec, + const struct iommu_ops *ops) +{ + int rc; + + if ( !ops->dt_xlate ) + return -EINVAL; + + if ( !dt_device_is_available(iommu_spec->np) ) + return NO_IOMMU; + + rc =3D iommu_fwspec_init(dev, &iommu_spec->np->dev); + if ( rc ) + return rc; + + /* + * Provide DT IOMMU specifier which describes the IOMMU master + * interfaces of that device (device IDs, etc) to the driver. + * The driver is responsible to decide how to interpret them. + */ + return ops->dt_xlate(dev, iommu_spec); +} + int iommu_remove_dt_device(struct dt_device_node *np) { const struct iommu_ops *ops =3D iommu_get_ops(); @@ -146,7 +170,7 @@ int iommu_remove_dt_device(struct dt_device_node *np) ASSERT(rw_is_locked(&dt_host_lock)); =20 if ( !iommu_enabled ) - return 1; + return NO_IOMMU; =20 if ( !ops ) return -EOPNOTSUPP; @@ -187,12 +211,12 @@ int iommu_add_dt_device(struct dt_device_node *np) const struct iommu_ops *ops =3D iommu_get_ops(); struct dt_phandle_args iommu_spec; struct device *dev =3D dt_to_dev(np); - int rc =3D 1, index =3D 0; + int rc =3D NO_IOMMU, index =3D 0; =20 ASSERT(system_state < SYS_STATE_active || rw_is_locked(&dt_host_lock)); =20 if ( !iommu_enabled ) - return 1; + return NO_IOMMU; =20 if ( !ops ) return -EINVAL; @@ -215,27 +239,15 @@ int iommu_add_dt_device(struct dt_device_node *np) { /* * The driver which supports generic IOMMU DT bindings must have - * these callback implemented. + * this callback implemented. */ - if ( !ops->add_device || !ops->dt_xlate ) + if ( !ops->add_device ) { rc =3D -EINVAL; goto fail; } =20 - if ( !dt_device_is_available(iommu_spec.np) ) - break; - - rc =3D iommu_fwspec_init(dev, &iommu_spec.np->dev); - if ( rc ) - break; - - /* - * Provide DT IOMMU specifier which describes the IOMMU master - * interfaces of that device (device IDs, etc) to the driver. - * The driver is responsible to decide how to interpret them. - */ - rc =3D ops->dt_xlate(dev, &iommu_spec); + rc =3D iommu_dt_xlate(dev, &iommu_spec, ops); if ( rc ) break; =20 diff --git a/xen/include/xen/iommu.h b/xen/include/xen/iommu.h index 0e747b0bbc1c..8cd4b9a6bfb2 100644 --- a/xen/include/xen/iommu.h +++ b/xen/include/xen/iommu.h @@ -245,6 +245,8 @@ int iommu_do_dt_domctl(struct xen_domctl *domctl, struc= t domain *d, */ int iommu_remove_dt_device(struct dt_device_node *np); =20 +#define NO_IOMMU 1 + #endif /* HAS_DEVICE_TREE */ =20 struct page_info; --=20 2.42.0 From nobody Tue May 14 19:19:46 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1 dmarc=pass fromdomain=amd.com); dmarc=pass(p=quarantine dis=none) header.from=amd.com ARC-Seal: i=2; a=rsa-sha256; t=1699554571; cv=pass; d=zohomail.com; s=zohoarc; b=VpPxuEjGV2JwIeXj8aHDcf1+1PNvkaM9I5JCRC78tAuoFdsbFGQybJy8KROXbHCTMn/itKq/UawbMiq1cZstZcBaFPxHtcvotu135DxCb30SiQaZcsMQvL1PbAXe4mVheFzuwuIHfoGD4AvLPj/r08Pg3Lb2tvls5xlP/C3AM1I= ARC-Message-Signature: i=2; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Nov 2023 18:28:56.7389 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f9e38f7f-e9ff-4fb7-56b4-08dbe151bc29 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9D5.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN9PR12MB5097 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1699554572535100001 Content-Type: text/plain; charset="utf-8" From: Oleksandr Tyshchenko The main purpose of this patch is to add a way to register PCI device (which is behind the IOMMU) using the generic PCI-IOMMU DT bindings [1] before assigning that device to a domain. This behaves similarly to the existing iommu_add_dt_device API, except it handles PCI devices, and it is to be invoked from the add_device hook in the SMMU driver. The function dt_map_id to translate an ID through a downstream mapping (which is also suitable for mapping Requester ID) was borrowed from Linux (v5.10-rc6) and updated according to the Xen code base. [1] https://www.kernel.org/doc/Documentation/devicetree/bindings/pci/pci-io= mmu.txt Signed-off-by: Oleksandr Tyshchenko Signed-off-by: Stewart Hildebrand --- v5->v6: * pass ops to iommu_dt_xlate() v4->v5: * style: add newlines after variable declarations and before return in iomm= u.h * drop device_is_protected() check in iommu_add_dt_pci_sideband_ids() * rebase on top of ("dynamic node programming using overlay dtbo") series * fix typo in commit message * remove #ifdef around dt_map_id() prototype * move dt_map_id() to xen/common/device_tree.c * add function name in error prints * use dprintk for debug prints * use GENMASK and #include * fix typo in comment * remove unnecessary (int) cast in loop condition * assign *id_out and return success in case of no translation in dt_map_id() * don't initialize local variable unnecessarily * return error in case of ACPI/no DT in iommu_add_{dt_}pci_sideband_ids() v3->v4: * wrap #include and if ( acpi_disabled ) in #ifdef CONFIG_ACPI * fix Michal's remarks about style, parenthesis, and print formats * remove !ops->dt_xlate check since it is already in iommu_dt_xlate helper * rename s/iommu_dt_pci_map_id/dt_map_id/ because it is generic, not specif= ic to iommu * update commit description v2->v3: * new patch title (was: iommu/arm: Introduce iommu_add_dt_pci_device API) * renamed function from: iommu_add_dt_pci_device to: iommu_add_dt_pci_sideband_ids * removed stale ops->add_device check * iommu.h: add empty stub iommu_add_dt_pci_sideband_ids for !HAS_DEVICE_TREE * iommu.h: add iommu_add_pci_sideband_ids helper * iommu.h: don't wrap prototype in #ifdef CONFIG_HAS_PCI * s/iommu_fwspec_free(pci_to_dev(pdev))/iommu_fwspec_free(dev)/ v1->v2: * remove extra devfn parameter since pdev fully describes the device * remove ops->add_device() call from iommu_add_dt_pci_device(). Instead, re= ly on the existing iommu call in iommu_add_device(). * move the ops->add_device and ops->dt_xlate checks earlier downstream->v1: * rebase * add const qualifier to struct dt_device_node *np arg in dt_map_id() * add const qualifier to struct dt_device_node *np declaration in iommu_add= _pci_device() * use stdint.h types instead of u8/u32/etc... * rename functions: s/dt_iommu_xlate/iommu_dt_xlate/ s/dt_map_id/iommu_dt_pci_map_id/ s/iommu_add_pci_device/iommu_add_dt_pci_device/ * add device_is_protected check in iommu_add_dt_pci_device * wrap prototypes in CONFIG_HAS_PCI (cherry picked from commit 734e3bf6ee77e7947667ab8fa96c25b349c2e1da from the downstream branch poc/pci-passthrough from https://gitlab.com/xen-project/people/bmarquis/xen-arm-poc.git) --- xen/common/device_tree.c | 91 +++++++++++++++++++++++++++ xen/drivers/passthrough/device_tree.c | 42 +++++++++++++ xen/include/xen/device_tree.h | 23 +++++++ xen/include/xen/iommu.h | 24 ++++++- 4 files changed, 179 insertions(+), 1 deletion(-) diff --git a/xen/common/device_tree.c b/xen/common/device_tree.c index b1c29529514f..5cb84864b89b 100644 --- a/xen/common/device_tree.c +++ b/xen/common/device_tree.c @@ -10,6 +10,7 @@ * published by the Free Software Foundation. */ =20 +#include #include #include #include @@ -2243,6 +2244,96 @@ int dt_get_pci_domain_nr(struct dt_device_node *node) return (u16)domain; } =20 +int dt_map_id(const struct dt_device_node *np, uint32_t id, + const char *map_name, const char *map_mask_name, + struct dt_device_node **target, uint32_t *id_out) +{ + uint32_t map_mask, masked_id, map_len; + const __be32 *map =3D NULL; + + if ( !np || !map_name || (!target && !id_out) ) + return -EINVAL; + + map =3D dt_get_property(np, map_name, &map_len); + if ( !map ) + { + if ( target ) + return -ENODEV; + + /* Otherwise, no map implies no translation */ + *id_out =3D id; + return 0; + } + + if ( !map_len || (map_len % (4 * sizeof(*map))) ) + { + printk(XENLOG_ERR "%s(): %s: Error: Bad %s length: %u\n", __func__, + np->full_name, map_name, map_len); + return -EINVAL; + } + + /* The default is to select all bits. */ + map_mask =3D GENMASK(31, 0); + + /* + * Can be overridden by "{iommu,msi}-map-mask" property. + * If dt_property_read_u32() fails, the default is used. + */ + if ( map_mask_name ) + dt_property_read_u32(np, map_mask_name, &map_mask); + + masked_id =3D map_mask & id; + for ( ; map_len > 0; map_len -=3D 4 * sizeof(*map), map +=3D 4 ) + { + struct dt_device_node *phandle_node; + uint32_t id_base =3D be32_to_cpup(map + 0); + uint32_t phandle =3D be32_to_cpup(map + 1); + uint32_t out_base =3D be32_to_cpup(map + 2); + uint32_t id_len =3D be32_to_cpup(map + 3); + + if ( id_base & ~map_mask ) + { + printk(XENLOG_ERR "%s(): %s: Invalid %s translation - %s-mask = (0x%"PRIx32") ignores id-base (0x%"PRIx32")\n", + __func__, np->full_name, map_name, map_name, map_mask, + id_base); + return -EFAULT; + } + + if ( (masked_id < id_base) || (masked_id >=3D (id_base + id_len)) ) + continue; + + phandle_node =3D dt_find_node_by_phandle(phandle); + if ( !phandle_node ) + return -ENODEV; + + if ( target ) + { + if ( !*target ) + *target =3D phandle_node; + + if ( *target !=3D phandle_node ) + continue; + } + + if ( id_out ) + *id_out =3D masked_id - id_base + out_base; + + dprintk(XENLOG_DEBUG, "%s: %s, using mask %08"PRIx32", id-base: %0= 8"PRIx32", out-base: %08"PRIx32", length: %08"PRIx32", id: %08"PRIx32" -> %= 08"PRIx32"\n", + np->full_name, map_name, map_mask, id_base, out_base, id_le= n, id, + masked_id - id_base + out_base); + return 0; + } + + dprintk(XENLOG_DEBUG, "%s: no %s translation for id 0x%"PRIx32" on %s\= n", + np->full_name, map_name, id, + (target && *target) ? (*target)->full_name : NULL); + + if ( id_out ) + *id_out =3D id; + + return 0; +} + /* * Local variables: * mode: C diff --git a/xen/drivers/passthrough/device_tree.c b/xen/drivers/passthroug= h/device_tree.c index 4c35281d98ad..edbd3f17adc5 100644 --- a/xen/drivers/passthrough/device_tree.c +++ b/xen/drivers/passthrough/device_tree.c @@ -161,6 +161,48 @@ static int iommu_dt_xlate(struct device *dev, return ops->dt_xlate(dev, iommu_spec); } =20 +#ifdef CONFIG_HAS_PCI +int iommu_add_dt_pci_sideband_ids(struct pci_dev *pdev) +{ + const struct iommu_ops *ops =3D iommu_get_ops(); + struct dt_phandle_args iommu_spec =3D { .args_count =3D 1 }; + struct device *dev =3D pci_to_dev(pdev); + const struct dt_device_node *np; + int rc; + + if ( !iommu_enabled ) + return NO_IOMMU; + + if ( !ops ) + return -EINVAL; + + if ( dev_iommu_fwspec_get(dev) ) + return -EEXIST; + + np =3D pci_find_host_bridge_node(pdev); + if ( !np ) + return -ENODEV; + + /* + * According to the Documentation/devicetree/bindings/pci/pci-iommu.txt + * from Linux. + */ + rc =3D dt_map_id(np, PCI_BDF(pdev->bus, pdev->devfn), "iommu-map", + "iommu-map-mask", &iommu_spec.np, iommu_spec.args); + if ( rc ) + return (rc =3D=3D -ENODEV) ? NO_IOMMU : rc; + + rc =3D iommu_dt_xlate(dev, &iommu_spec, ops); + if ( rc < 0 ) + { + iommu_fwspec_free(dev); + return -EINVAL; + } + + return rc; +} +#endif /* CONFIG_HAS_PCI */ + int iommu_remove_dt_device(struct dt_device_node *np) { const struct iommu_ops *ops =3D iommu_get_ops(); diff --git a/xen/include/xen/device_tree.h b/xen/include/xen/device_tree.h index a262bba2edaf..14ec3f565976 100644 --- a/xen/include/xen/device_tree.h +++ b/xen/include/xen/device_tree.h @@ -939,6 +939,29 @@ int dt_count_phandle_with_args(const struct dt_device_= node *np, */ int dt_get_pci_domain_nr(struct dt_device_node *node); =20 +/** + * dt_map_id - Translate an ID through a downstream mapping. + * @np: root complex device node. + * @id: device ID to map. + * @map_name: property name of the map to use. + * @map_mask_name: optional property name of the mask to use. + * @target: optional pointer to a target device node. + * @id_out: optional pointer to receive the translated ID. + * + * Given a device ID, look up the appropriate implementation-defined + * platform ID and/or the target device which receives transactions on that + * ID, as per the "iommu-map" and "msi-map" bindings. Either of @target or + * @id_out may be NULL if only the other is required. If @target points to + * a non-NULL device node pointer, only entries targeting that node will be + * matched; if it points to a NULL value, it will receive the device node = of + * the first matching target phandle, with a reference held. + * + * Return: 0 on success or a standard error code on failure. + */ +int dt_map_id(const struct dt_device_node *np, uint32_t id, + const char *map_name, const char *map_mask_name, + struct dt_device_node **target, uint32_t *id_out); + struct dt_device_node *dt_find_node_by_phandle(dt_phandle handle); =20 #ifdef CONFIG_DEVICE_TREE_DEBUG diff --git a/xen/include/xen/iommu.h b/xen/include/xen/iommu.h index 8cd4b9a6bfb2..2f081a8cea62 100644 --- a/xen/include/xen/iommu.h +++ b/xen/include/xen/iommu.h @@ -27,6 +27,9 @@ #include #include #include +#ifdef CONFIG_ACPI +#include +#endif #include =20 TYPE_SAFE(uint64_t, dfn); @@ -222,7 +225,8 @@ int iommu_dt_domain_init(struct domain *d); int iommu_release_dt_devices(struct domain *d); =20 /* - * Helper to add master device to the IOMMU using generic IOMMU DT binding= s. + * Helpers to add master device to the IOMMU using generic (PCI-)IOMMU + * DT bindings. * * Return values: * 0 : device is protected by an IOMMU @@ -231,6 +235,7 @@ int iommu_release_dt_devices(struct domain *d); * (IOMMU is not enabled/present or device is not connected to it). */ int iommu_add_dt_device(struct dt_device_node *np); +int iommu_add_dt_pci_sideband_ids(struct pci_dev *pdev); =20 int iommu_do_dt_domctl(struct xen_domctl *domctl, struct domain *d, XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl); @@ -247,8 +252,25 @@ int iommu_remove_dt_device(struct dt_device_node *np); =20 #define NO_IOMMU 1 =20 +#else /* !HAS_DEVICE_TREE */ +static inline int iommu_add_dt_pci_sideband_ids(struct pci_dev *pdev) +{ + return -ENOSYS; +} #endif /* HAS_DEVICE_TREE */ =20 +static inline int iommu_add_pci_sideband_ids(struct pci_dev *pdev) +{ + int ret =3D -ENOSYS; + +#ifdef CONFIG_ACPI + if ( acpi_disabled ) +#endif + ret =3D iommu_add_dt_pci_sideband_ids(pdev); + + return ret; +} + struct page_info; =20 /* --=20 2.42.0 From nobody Tue May 14 19:19:46 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Nov 2023 18:29:08.0365 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cf97dd45-08d0-4d91-0e62-08dbe151c2de X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00001508.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB7104 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1699554576480100001 Content-Type: text/plain; charset="utf-8" Handle phantom functions in iommu_add_dt_pci_sideband_ids(). Each phantom function will have a unique requestor ID (RID)/BDF. On ARM, we need to map/translate the RID/BDF to an AXI stream ID for each phantom function according to the pci-iommu device tree mapping [1]. The RID/BDF -> AXI stre= am ID mapping in DT could allow phantom devices (i.e. devices with phantom functi= ons) to use different AXI stream IDs based on the (phantom) function. [1] https://www.kernel.org/doc/Documentation/devicetree/bindings/pci/pci-io= mmu.txt Signed-off-by: Stewart Hildebrand --- v5->v6: * no change v4->v5: * no change v3->v4: * s/iommu_dt_pci_map_id/dt_map_id/ v2->v3: * new patch title (was: iommu/arm: iommu_add_dt_pci_device phantom handling) * rework loop to reduce duplication * s/iommu_fwspec_free(pci_to_dev(pdev))/iommu_fwspec_free(dev)/ v1->v2: * new patch --- xen/drivers/passthrough/device_tree.c | 33 ++++++++++++++++----------- 1 file changed, 20 insertions(+), 13 deletions(-) diff --git a/xen/drivers/passthrough/device_tree.c b/xen/drivers/passthroug= h/device_tree.c index edbd3f17adc5..eba1a5bac70a 100644 --- a/xen/drivers/passthrough/device_tree.c +++ b/xen/drivers/passthrough/device_tree.c @@ -169,6 +169,7 @@ int iommu_add_dt_pci_sideband_ids(struct pci_dev *pdev) struct device *dev =3D pci_to_dev(pdev); const struct dt_device_node *np; int rc; + unsigned int devfn =3D pdev->devfn; =20 if ( !iommu_enabled ) return NO_IOMMU; @@ -183,21 +184,27 @@ int iommu_add_dt_pci_sideband_ids(struct pci_dev *pde= v) if ( !np ) return -ENODEV; =20 - /* - * According to the Documentation/devicetree/bindings/pci/pci-iommu.txt - * from Linux. - */ - rc =3D dt_map_id(np, PCI_BDF(pdev->bus, pdev->devfn), "iommu-map", - "iommu-map-mask", &iommu_spec.np, iommu_spec.args); - if ( rc ) - return (rc =3D=3D -ENODEV) ? NO_IOMMU : rc; + do { + /* + * According to the Documentation/devicetree/bindings/pci/pci-iomm= u.txt + * from Linux. + */ + rc =3D dt_map_id(np, PCI_BDF(pdev->bus, devfn), "iommu-map", + "iommu-map-mask", &iommu_spec.np, iommu_spec.args); + if ( rc ) + return (rc =3D=3D -ENODEV) ? NO_IOMMU : rc; =20 - rc =3D iommu_dt_xlate(dev, &iommu_spec, ops); - if ( rc < 0 ) - { - iommu_fwspec_free(dev); - return -EINVAL; + rc =3D iommu_dt_xlate(dev, &iommu_spec, ops); + if ( rc < 0 ) + { + iommu_fwspec_free(dev); + return -EINVAL; + } + + devfn +=3D pdev->phantom_stride; } + while ( (devfn !=3D pdev->devfn) && + (PCI_SLOT(devfn) =3D=3D PCI_SLOT(pdev->devfn)) ); =20 return rc; } --=20 2.42.0 From nobody Tue May 14 19:19:46 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1 dmarc=pass fromdomain=amd.com); dmarc=pass(p=quarantine dis=none) header.from=amd.com ARC-Seal: i=2; a=rsa-sha256; t=1699554588; cv=pass; d=zohomail.com; s=zohoarc; b=Uy/YzddW5Ahl9uudmDKVtH7yUz/s2hTyQby+N3hIjOsms3hr4QTjLgR9065e4qoS3ZEfBOmc1X2/fF54EflPzu0n1JL+w9VbQc2aTtkD8GOZjYMTLgizugnxpq8QE1sLlqoi8WQxw05hfofSeiBMl5vyBhM0bx/aSgo5ygERHdg= ARC-Message-Signature: i=2; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Nov 2023 18:29:21.1602 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 88238014-4be6-41e5-5971-08dbe151cab5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9DA.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB8252 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1699554588563100001 Content-Type: text/plain; charset="utf-8" From: Oleksandr Andrushchenko Signed-off-by: Oleksandr Tyshchenko Signed-off-by: Oleksandr Andrushchenko Signed-off-by: Stewart Hildebrand --- v5->v6: * check for hardware_domain =3D=3D NULL (dom0less test case) * locking: assign pdev->domain before list_add() v4->v5: * assign device to pdev->domain (usually dom0) by default in add_device() h= ook * deassign from hwdom * rebase on top of ("dynamic node programming using overlay dtbo") series * remove TODO in comment about device prints * add TODO regarding locking * fixup after dropping ("xen/arm: Move is_protected flag to struct device") v3->v4: * add new device_is_protected check in add_device hook to match SMMUv3 and IPMMU-VMSA drivers v2->v3: * invoke iommu_add_pci_sideband_ids() from add_device hook v1->v2: * ignore add_device/assign_device/reassign_device calls for phantom functio= ns (i.e. devfn !=3D pdev->devfn) downstream->v1: * wrap unused function in #ifdef 0 * remove the remove_device() stub since it was submitted separately to the = list [XEN][PATCH v6 12/19] xen/smmu: Add remove_device callback for smmu_iommu= ops https://lists.xenproject.org/archives/html/xen-devel/2023-05/msg00204.html * arm_smmu_(de)assign_dev: return error instead of crashing system * update condition in arm_smmu_reassign_dev * style fixup * add && !is_hardware_domain(d) into condition in arm_smmu_assign_dev() (cherry picked from commit 0c11a7f65f044c26d87d1e27ac6283ef1f9cfb7a from the downstream branch spider-master from https://github.com/xen-troops/xen.git) --- xen/drivers/passthrough/arm/smmu.c | 199 ++++++++++++++++++++++++----- 1 file changed, 169 insertions(+), 30 deletions(-) diff --git a/xen/drivers/passthrough/arm/smmu.c b/xen/drivers/passthrough/a= rm/smmu.c index 11fc1d22ef0a..24d1c0353025 100644 --- a/xen/drivers/passthrough/arm/smmu.c +++ b/xen/drivers/passthrough/arm/smmu.c @@ -131,11 +131,21 @@ enum irqreturn { =20 typedef enum irqreturn irqreturn_t; =20 -/* Device logger functions - * TODO: Handle PCI - */ -#define dev_print(dev, lvl, fmt, ...) \ - printk(lvl "smmu: %s: " fmt, dt_node_full_name(dev_to_dt(dev)), ## __VA_= ARGS__) +/* Device logger functions */ +#ifndef CONFIG_HAS_PCI +#define dev_print(dev, lvl, fmt, ...) \ + printk(lvl "smmu: %s: " fmt, dev_name(dev), ## __VA_ARGS__) +#else +#define dev_print(dev, lvl, fmt, ...) ({ \ + if ( !dev_is_pci((dev)) ) \ + printk(lvl "smmu: %s: " fmt, dev_name((dev)), ## __VA_ARGS__); \ + else \ + { \ + struct pci_dev *pdev =3D dev_to_pci((dev)); \ + printk(lvl "smmu: %pp: " fmt, &pdev->sbdf, ## __VA_ARGS__); \ + } \ +}) +#endif =20 #define dev_dbg(dev, fmt, ...) dev_print(dev, XENLOG_DEBUG, fmt, ## __VA_A= RGS__) #define dev_notice(dev, fmt, ...) dev_print(dev, XENLOG_INFO, fmt, ## __VA= _ARGS__) @@ -187,6 +197,7 @@ static void __iomem *devm_ioremap_resource(struct devic= e *dev, * Xen: PCI functions * TODO: It should be implemented when PCI will be supported */ +#if 0 /* unused */ #define to_pci_dev(dev) (NULL) static inline int pci_for_each_dma_alias(struct pci_dev *pdev, int (*fn) (struct pci_dev *pdev, @@ -196,6 +207,7 @@ static inline int pci_for_each_dma_alias(struct pci_dev= *pdev, BUG(); return 0; } +#endif =20 /* Xen: misc */ #define PHYS_MASK_SHIFT PADDR_BITS @@ -631,7 +643,7 @@ struct arm_smmu_master_cfg { for (i =3D 0; idx =3D cfg->smendx[i], i < num; ++i) =20 struct arm_smmu_master { - struct device_node *of_node; + struct device *dev; struct rb_node node; struct arm_smmu_master_cfg cfg; }; @@ -723,7 +735,7 @@ arm_smmu_get_fwspec(struct arm_smmu_master_cfg *cfg) { struct arm_smmu_master *master =3D container_of(cfg, struct arm_smmu_master, cfg); - return dev_iommu_fwspec_get(&master->of_node->dev); + return dev_iommu_fwspec_get(master->dev); } =20 static void parse_driver_options(struct arm_smmu_device *smmu) @@ -756,7 +768,7 @@ static struct device_node *dev_get_dev_node(struct devi= ce *dev) } =20 static struct arm_smmu_master *find_smmu_master(struct arm_smmu_device *sm= mu, - struct device_node *dev_node) + struct device *dev) { struct rb_node *node =3D smmu->masters.rb_node; =20 @@ -765,9 +777,9 @@ static struct arm_smmu_master *find_smmu_master(struct = arm_smmu_device *smmu, =20 master =3D container_of(node, struct arm_smmu_master, node); =20 - if (dev_node < master->of_node) + if (dev < master->dev) node =3D node->rb_left; - else if (dev_node > master->of_node) + else if (dev > master->dev) node =3D node->rb_right; else return master; @@ -802,9 +814,9 @@ static int insert_smmu_master(struct arm_smmu_device *s= mmu, =3D container_of(*new, struct arm_smmu_master, node); =20 parent =3D *new; - if (master->of_node < this->of_node) + if (master->dev < this->dev) new =3D &((*new)->rb_left); - else if (master->of_node > this->of_node) + else if (master->dev > this->dev) new =3D &((*new)->rb_right); else return -EEXIST; @@ -836,28 +848,37 @@ static int arm_smmu_dt_add_device_legacy(struct arm_s= mmu_device *smmu, struct arm_smmu_master *master; struct device_node *dev_node =3D dev_get_dev_node(dev); =20 - master =3D find_smmu_master(smmu, dev_node); + master =3D find_smmu_master(smmu, dev); if (master) { dev_err(dev, "rejecting multiple registrations for master device %s\n", - dev_node->name); + dev_node ? dev_node->name : ""); return -EBUSY; } =20 master =3D devm_kzalloc(dev, sizeof(*master), GFP_KERNEL); if (!master) return -ENOMEM; - master->of_node =3D dev_node; + master->dev =3D dev; =20 - /* Xen: Let Xen know that the device is protected by an SMMU */ - dt_device_set_protected(dev_node); + if ( !dev_is_pci(dev) ) + { + if ( dt_device_is_protected(dev_node) ) + { + dev_err(dev, "Already added to SMMU\n"); + return -EEXIST; + } + + /* Xen: Let Xen know that the device is protected by an SMMU */ + dt_device_set_protected(dev_node); + } =20 for (i =3D 0; i < fwspec->num_ids; ++i) { if (!(smmu->features & ARM_SMMU_FEAT_STREAM_MATCH) && (fwspec->ids[i] >=3D smmu->num_mapping_groups)) { dev_err(dev, "stream ID for master device %s greater than maximum allowed (%d)\n", - dev_node->name, smmu->num_mapping_groups); + dev_node ? dev_node->name : "", smmu->num_mapping_groups); return -ERANGE; } master->cfg.smendx[i] =3D INVALID_SMENDX; @@ -872,7 +893,7 @@ static int arm_smmu_dt_remove_device_legacy(struct arm_= smmu_device *smmu, struct device_node *dev_node =3D dev_get_dev_node(dev); int ret; =20 - master =3D find_smmu_master(smmu, dev_node); + master =3D find_smmu_master(smmu, dev); if (master =3D=3D NULL) { dev_err(dev, "No registrations found for master device %s\n", @@ -884,8 +905,9 @@ static int arm_smmu_dt_remove_device_legacy(struct arm_= smmu_device *smmu, if (ret) return ret; =20 - /* Protected by dt_host_lock and dtdevs_lock as caller holds these locks.= */ - dev_node->is_protected =3D false; + if ( !dev_is_pci(dev) ) + /* Protected by dt_host_lock and dtdevs_lock as caller holds these locks= . */ + dev_node->is_protected =3D false; =20 kfree(master); return 0; @@ -914,6 +936,12 @@ static int register_smmu_master(struct arm_smmu_device= *smmu, fwspec); } =20 +/* Forward declaration */ +static int arm_smmu_assign_dev(struct domain *d, u8 devfn, + struct device *dev, u32 flag); +static int arm_smmu_deassign_dev(struct domain *d, uint8_t devfn, + struct device *dev); + /* * The driver which supports generic IOMMU DT bindings must have this * callback implemented. @@ -938,6 +966,22 @@ static int arm_smmu_dt_add_device_generic(u8 devfn, st= ruct device *dev) { struct arm_smmu_device *smmu; struct iommu_fwspec *fwspec; + int ret; + +#ifdef CONFIG_HAS_PCI + if ( dev_is_pci(dev) ) + { + struct pci_dev *pdev =3D dev_to_pci(dev); + int ret; + + if ( devfn !=3D pdev->devfn ) + return 0; + + ret =3D iommu_add_pci_sideband_ids(pdev); + if ( ret < 0 ) + iommu_fwspec_free(dev); + } +#endif =20 fwspec =3D dev_iommu_fwspec_get(dev); if (fwspec =3D=3D NULL) @@ -947,7 +991,24 @@ static int arm_smmu_dt_add_device_generic(u8 devfn, st= ruct device *dev) if (smmu =3D=3D NULL) return -ENXIO; =20 - return arm_smmu_dt_add_device_legacy(smmu, dev, fwspec); + ret =3D arm_smmu_dt_add_device_legacy(smmu, dev, fwspec); + if ( ret ) + return ret; + +#ifdef CONFIG_HAS_PCI + if ( dev_is_pci(dev) ) + { + struct pci_dev *pdev =3D dev_to_pci(dev); + + /* + * During PHYSDEVOP_pci_device_add, Xen does not assign the + * device, so we must do it here. + */ + ret =3D arm_smmu_assign_dev(pdev->domain, devfn, dev, 0); + } +#endif + + return ret; } =20 static int arm_smmu_dt_xlate_generic(struct device *dev, @@ -970,11 +1031,10 @@ static struct arm_smmu_device *find_smmu_for_device(= struct device *dev) { struct arm_smmu_device *smmu; struct arm_smmu_master *master =3D NULL; - struct device_node *dev_node =3D dev_get_dev_node(dev); =20 spin_lock(&arm_smmu_devices_lock); list_for_each_entry(smmu, &arm_smmu_devices, list) { - master =3D find_smmu_master(smmu, dev_node); + master =3D find_smmu_master(smmu, dev); if (master) break; } @@ -2066,6 +2126,7 @@ static bool arm_smmu_capable(enum iommu_cap cap) } #endif =20 +#if 0 /* Not used */ static int __arm_smmu_get_pci_sid(struct pci_dev *pdev, u16 alias, void *d= ata) { *((u16 *)data) =3D alias; @@ -2076,6 +2137,7 @@ static void __arm_smmu_release_pci_iommudata(void *da= ta) { kfree(data); } +#endif =20 static int arm_smmu_add_device(struct device *dev) { @@ -2083,12 +2145,13 @@ static int arm_smmu_add_device(struct device *dev) struct arm_smmu_master_cfg *cfg; struct iommu_group *group; void (*releasefn)(void *data) =3D NULL; - int ret; =20 smmu =3D find_smmu_for_device(dev); if (!smmu) return -ENODEV; =20 + /* There is no need to distinguish here, thanks to PCI-IOMMU DT bindings = */ +#if 0 if (dev_is_pci(dev)) { struct pci_dev *pdev =3D to_pci_dev(dev); struct iommu_fwspec *fwspec; @@ -2113,10 +2176,12 @@ static int arm_smmu_add_device(struct device *dev) &fwspec->ids[0]); releasefn =3D __arm_smmu_release_pci_iommudata; cfg->smmu =3D smmu; - } else { + } else +#endif + { struct arm_smmu_master *master; =20 - master =3D find_smmu_master(smmu, dev->of_node); + master =3D find_smmu_master(smmu, dev); if (!master) { return -ENODEV; } @@ -2784,6 +2849,61 @@ static int arm_smmu_assign_dev(struct domain *d, u8 = devfn, return -ENOMEM; } =20 +#ifdef CONFIG_HAS_PCI + if ( dev_is_pci(dev) && !is_hardware_domain(d) ) + { + struct pci_dev *pdev =3D dev_to_pci(dev); + + printk(XENLOG_INFO "Assigning device %04x:%02x:%02x.%u to dom%d\n", + pdev->seg, pdev->bus, PCI_SLOT(devfn), PCI_FUNC(devfn), + d->domain_id); + + if ( devfn !=3D pdev->devfn || pdev->domain =3D=3D d ) + return 0; + + ASSERT(pcidevs_locked()); + + /* TODO: acquire pci_lock */ +#if 0 + write_lock(&pdev->domain->pci_lock); +#endif + list_del(&pdev->domain_list); +#if 0 + write_unlock(&pdev->domain->pci_lock); +#endif + + pdev->domain =3D d; + +#if 0 + write_lock(&d->pci_lock); +#endif + list_add(&pdev->domain_list, &d->pdev_list); +#if 0 + write_unlock(&d->pci_lock); +#endif + + if ( hardware_domain ) + { + domain =3D dev_iommu_domain(dev); + + /* + * Xen may not deassign the device from hwdom before + * assigning it elsewhere. + */ + if ( domain && is_hardware_domain(domain->priv->cfg.domain) ) + { + ret =3D arm_smmu_deassign_dev(hardware_domain, devfn, dev); + if ( ret ) + return ret; + } + } + + /* dom_io is used as a sentinel for quarantined devices */ + if ( d =3D=3D dom_io ) + return 0; + } +#endif + if (!dev_iommu_group(dev)) { ret =3D arm_smmu_add_device(dev); if (ret) @@ -2833,11 +2953,30 @@ out: return ret; } =20 -static int arm_smmu_deassign_dev(struct domain *d, struct device *dev) +static int arm_smmu_deassign_dev(struct domain *d, uint8_t devfn, + struct device *dev) { struct iommu_domain *domain =3D dev_iommu_domain(dev); struct arm_smmu_xen_domain *xen_domain; =20 +#ifdef CONFIG_HAS_PCI + if ( dev_is_pci(dev) ) + { + struct pci_dev *pdev =3D dev_to_pci(dev); + + printk(XENLOG_INFO "Deassigning device %04x:%02x:%02x.%u from dom%d\n", + pdev->seg, pdev->bus, PCI_SLOT(devfn), PCI_FUNC(devfn), + d->domain_id); + + if ( devfn !=3D pdev->devfn ) + return 0; + + /* dom_io is used as a sentinel for quarantined devices */ + if ( d =3D=3D dom_io ) + return 0; + } +#endif + xen_domain =3D dom_iommu(d)->arch.priv; =20 if (!domain || domain->priv->cfg.domain !=3D d) { @@ -2865,13 +3004,13 @@ static int arm_smmu_reassign_dev(struct domain *s, = struct domain *t, int ret =3D 0; =20 /* Don't allow remapping on other domain than hwdom */ - if ( t && !is_hardware_domain(t) ) + if ( t && !is_hardware_domain(t) && t !=3D dom_io ) return -EPERM; =20 if (t =3D=3D s) return 0; =20 - ret =3D arm_smmu_deassign_dev(s, dev); + ret =3D arm_smmu_deassign_dev(s, devfn, dev); if (ret) return ret; =20 --=20 2.42.0 From nobody Tue May 14 19:19:46 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Nov 2023 18:29:35.8961 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8a841bac-4b36-4b66-1816-08dbe151d379 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00001504.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4110 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1699554602635100001 Content-Type: text/plain; charset="utf-8" From: Rahul Singh Signed-off-by: Rahul Singh Signed-off-by: Stewart Hildebrand --- v5->v6: * check for hardware_domain =3D=3D NULL (dom0less test case) * locking: assign pdev->domain before list_add() v4->v5: * deassign from hwdom * add TODO regarding locking * fixup after dropping ("xen/arm: Move is_protected flag to struct device") v3->v4: * no change v2->v3: * rebase * invoke iommu_add_pci_sideband_ids() from add_device hook v1->v2: * ignore add_device/assign_device/reassign_device calls for phantom functio= ns (i.e. devfn !=3D pdev->devfn) downstream->v1: * rebase * move 2 replacements of s/dt_device_set_protected(dev_to_dt(dev))/device_s= et_protected(dev)/ from this commit to ("xen/arm: Move is_protected flag to struct device") so as to not break ability to bisect * adjust patch title (remove stray space) * arm_smmu_(de)assign_dev: return error instead of crashing system * remove arm_smmu_remove_device() stub * update condition in arm_smmu_reassign_dev * style fixup (cherry picked from commit 7ed6c3ab250d899fe6e893a514278e406a2893e8 from the downstream branch poc/pci-passthrough from https://gitlab.com/xen-project/people/bmarquis/xen-arm-poc.git) --- xen/drivers/passthrough/arm/smmu-v3.c | 131 ++++++++++++++++++++++++-- 1 file changed, 121 insertions(+), 10 deletions(-) diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthroug= h/arm/smmu-v3.c index cdbb505134b7..ac6532e29b02 100644 --- a/xen/drivers/passthrough/arm/smmu-v3.c +++ b/xen/drivers/passthrough/arm/smmu-v3.c @@ -1469,14 +1469,34 @@ static bool arm_smmu_sid_in_range(struct arm_smmu_d= evice *smmu, u32 sid) } /* Forward declaration */ static struct arm_smmu_device *arm_smmu_get_by_dev(const struct device *de= v); +static int arm_smmu_assign_dev(struct domain *d, u8 devfn, struct device *= dev, + u32 flag); +static int arm_smmu_deassign_dev(struct domain *d, uint8_t devfn, + struct device *dev); =20 static int arm_smmu_add_device(u8 devfn, struct device *dev) { int i, ret; struct arm_smmu_device *smmu; struct arm_smmu_master *master; - struct iommu_fwspec *fwspec =3D dev_iommu_fwspec_get(dev); + struct iommu_fwspec *fwspec; + +#ifdef CONFIG_HAS_PCI + if ( dev_is_pci(dev) ) + { + struct pci_dev *pdev =3D dev_to_pci(dev); + int ret; + + if ( devfn !=3D pdev->devfn ) + return 0; + + ret =3D iommu_add_pci_sideband_ids(pdev); + if ( ret < 0 ) + iommu_fwspec_free(dev); + } +#endif =20 + fwspec =3D dev_iommu_fwspec_get(dev); if (!fwspec) return -ENODEV; =20 @@ -1521,17 +1541,35 @@ static int arm_smmu_add_device(u8 devfn, struct dev= ice *dev) */ arm_smmu_enable_pasid(master); =20 - if (dt_device_is_protected(dev_to_dt(dev))) { - dev_err(dev, "Already added to SMMUv3\n"); - return -EEXIST; - } + if ( !dev_is_pci(dev) ) + { + if (dt_device_is_protected(dev_to_dt(dev))) { + dev_err(dev, "Already added to SMMUv3\n"); + return -EEXIST; + } =20 - /* Let Xen know that the master device is protected by an IOMMU. */ - dt_device_set_protected(dev_to_dt(dev)); + /* Let Xen know that the master device is protected by an IOMMU. */ + dt_device_set_protected(dev_to_dt(dev)); + } =20 dev_info(dev, "Added master device (SMMUv3 %s StreamIds %u)\n", dev_name(fwspec->iommu_dev), fwspec->num_ids); =20 +#ifdef CONFIG_HAS_PCI + if ( dev_is_pci(dev) ) + { + struct pci_dev *pdev =3D dev_to_pci(dev); + + /* + * During PHYSDEVOP_pci_device_add, Xen does not assign the + * device, so we must do it here. + */ + ret =3D arm_smmu_assign_dev(pdev->domain, devfn, dev, 0); + if (ret) + goto err_free_master; + } +#endif + return 0; =20 err_free_master: @@ -2621,6 +2659,61 @@ static int arm_smmu_assign_dev(struct domain *d, u8 = devfn, struct arm_smmu_domain *smmu_domain; struct arm_smmu_xen_domain *xen_domain =3D dom_iommu(d)->arch.priv; =20 +#ifdef CONFIG_HAS_PCI + if ( dev_is_pci(dev) && !is_hardware_domain(d) ) + { + struct pci_dev *pdev =3D dev_to_pci(dev); + + printk(XENLOG_INFO "Assigning device %04x:%02x:%02x.%u to dom%d\n", + pdev->seg, pdev->bus, PCI_SLOT(devfn), + PCI_FUNC(devfn), d->domain_id); + + if ( devfn !=3D pdev->devfn || pdev->domain =3D=3D d ) + return 0; + + ASSERT(pcidevs_locked()); + + /* TODO: acquire pci_lock */ +#if 0 + write_lock(&pdev->domain->pci_lock); +#endif + list_del(&pdev->domain_list); +#if 0 + write_unlock(&pdev->domain->pci_lock); +#endif + + pdev->domain =3D d; + +#if 0 + write_lock(&d->pci_lock); +#endif + list_add(&pdev->domain_list, &d->pdev_list); +#if 0 + write_unlock(&d->pci_lock); +#endif + + if ( hardware_domain ) + { + io_domain =3D arm_smmu_get_domain(hardware_domain, dev); + + /* + * Xen may not deassign the device from hwdom before + * assigning it elsewhere. + */ + if ( io_domain ) + { + ret =3D arm_smmu_deassign_dev(hardware_domain, devfn, dev); + if ( ret ) + return ret; + } + } + + /* dom_io is used as a sentinel for quarantined devices */ + if ( d =3D=3D dom_io ) + return 0; + } +#endif + spin_lock(&xen_domain->lock); =20 /* @@ -2654,7 +2747,7 @@ out: return ret; } =20 -static int arm_smmu_deassign_dev(struct domain *d, struct device *dev) +static int arm_smmu_deassign_dev(struct domain *d, uint8_t devfn, struct d= evice *dev) { struct iommu_domain *io_domain =3D arm_smmu_get_domain(d, dev); struct arm_smmu_xen_domain *xen_domain =3D dom_iommu(d)->arch.priv; @@ -2666,6 +2759,24 @@ static int arm_smmu_deassign_dev(struct domain *d, s= truct device *dev) return -ESRCH; } =20 +#ifdef CONFIG_HAS_PCI + if ( dev_is_pci(dev) ) + { + struct pci_dev *pdev =3D dev_to_pci(dev); + + printk(XENLOG_INFO "Deassigning device %04x:%02x:%02x.%u from dom%d\n", + pdev->seg, pdev->bus, PCI_SLOT(devfn), + PCI_FUNC(devfn), d->domain_id); + + if ( devfn !=3D pdev->devfn ) + return 0; + + /* dom_io is used as a sentinel for quarantined devices */ + if ( d =3D=3D dom_io ) + return 0; + } +#endif + spin_lock(&xen_domain->lock); =20 arm_smmu_detach_dev(master); @@ -2685,13 +2796,13 @@ static int arm_smmu_reassign_dev(struct domain *s, = struct domain *t, int ret =3D 0; =20 /* Don't allow remapping on other domain than hwdom */ - if ( t && !is_hardware_domain(t) ) + if ( t && !is_hardware_domain(t) && (t !=3D dom_io) ) return -EPERM; =20 if (t =3D=3D s) return 0; =20 - ret =3D arm_smmu_deassign_dev(s, dev); + ret =3D arm_smmu_deassign_dev(s, devfn, dev); if (ret) return ret; =20 --=20 2.42.0 From nobody Tue May 14 19:19:46 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1 dmarc=pass fromdomain=amd.com); dmarc=pass(p=quarantine dis=none) header.from=amd.com ARC-Seal: i=2; a=rsa-sha256; t=1699554613; cv=pass; d=zohomail.com; s=zohoarc; b=XkhnYC6r4sTfbq65lEg3SYJ2A5N1k1s3WFgGPkd1bloRvP7BQU5WpyOVc6MU+OZIOI84wQ8Jb6KKZR6+miUPkgje87RDTjyPkS3OPg+EJianS52LDMsYCFyb35CURwAAuGp1EkG9u9hXLJeTXvqQR8lT78k5RYcH8ZcLUCeOCJs= ARC-Message-Signature: i=2; a=rsa-sha256; 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helo=lists.xenproject.org; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C From: Stewart Hildebrand To: CC: Rahul Singh , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , "Volodymyr Babchuk" , Stewart Hildebrand Subject: [PATCH v6 7/9] xen/arm: Fix mapping for PCI bridge mmio region Date: Thu, 9 Nov 2023 13:27:10 -0500 Message-ID: <20231109182716.367119-8-stewart.hildebrand@amd.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231109182716.367119-1-stewart.hildebrand@amd.com> References: <20231109182716.367119-1-stewart.hildebrand@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9DC:EE_|SJ1PR12MB6027:EE_ X-MS-Office365-Filtering-Correlation-Id: 838934e6-8042-405c-2839-08dbe151dc87 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Nov 2023 18:29:51.0565 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 838934e6-8042-405c-2839-08dbe151dc87 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9DC.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6027 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1699554614627100001 Content-Type: text/plain; charset="utf-8" From: Rahul Singh Current code skip the mapping for PCI bridge MMIO region to dom0 when pci_passthrough_enabled flag is set. Mapping should be skip when has_vpci(d) is enabled for the domain, as we need to skip the mapping only when VPCI handler are registered for ECAM. Signed-off-by: Rahul Singh Signed-off-by: Stewart Hildebrand Acked-by: Julien Grall --- This patch was originally picked up from [1] v5->v6: * drop unrelated change in xen/arch/arm/domain_build.c:handle_linux_pci_dom= ain() v4->v5: * new patch changes since picking up from [1]: * rebase on top of "dynamic node programming using overlay dtbo" series * replace !is_pci_passthrough_enabled() check with !IS_ENABLED(CONFIG_HAS_P= CI) instead of removing [1] https://lists.xenproject.org/archives/html/xen-devel/2023-07/msg00483.h= tml --- xen/arch/arm/device.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/arm/device.c b/xen/arch/arm/device.c index 1f631d327441..4d69c298858d 100644 --- a/xen/arch/arm/device.c +++ b/xen/arch/arm/device.c @@ -330,7 +330,7 @@ int handle_device(struct domain *d, struct dt_device_no= de *dev, p2m_type_t p2mt, .d =3D d, .p2mt =3D p2mt, .skip_mapping =3D !own_device || - (is_pci_passthrough_enabled() && + (has_vpci(d) && (device_get_class(dev) =3D=3D DEVICE_PCI_HOSTBRIDG= E)), .iomem_ranges =3D iomem_ranges, .irq_ranges =3D irq_ranges --=20 2.42.0 From nobody Tue May 14 19:19:46 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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helo=lists.xenproject.org; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C From: Stewart Hildebrand To: CC: Stewart Hildebrand , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , "Volodymyr Babchuk" , Andrew Cooper , George Dunlap , "Jan Beulich" , Wei Liu Subject: [PATCH v6 8/9] xen/arm: enable dom0 to use PCI devices with pci-passthrough=no Date: Thu, 9 Nov 2023 13:27:11 -0500 Message-ID: <20231109182716.367119-9-stewart.hildebrand@amd.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231109182716.367119-1-stewart.hildebrand@amd.com> References: <20231109182716.367119-1-stewart.hildebrand@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9D7:EE_|DM6PR12MB4090:EE_ X-MS-Office365-Filtering-Correlation-Id: a74a21c8-0eb1-454d-52bd-08dbe151e645 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Nov 2023 18:30:07.3866 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a74a21c8-0eb1-454d-52bd-08dbe151e645 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9D7.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4090 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1699555102686100001 Content-Type: text/plain; charset="utf-8" Enable the use of IOMMU + PCI in dom0 without having to specify "pci-passthrough=3Dyes". We rely on dom0 to initialize the PCI controller and perform a PHYSDEVOP_pci_device_add call to add each device to SMMU. Enable pci_init() for initializing Xen's internal PCI subsystem, and allow PHYSDEVOP_pci_device_add when pci-passthrough is disabled. Signed-off-by: Stewart Hildebrand --- v5->v6: * new patch - this effectively replaces ("Revert "xen/arm: Add cmdline boot option "pci-passthrough =3D = """) --- xen/arch/arm/pci/pci.c | 3 ++- xen/drivers/pci/physdev.c | 6 ------ 2 files changed, 2 insertions(+), 7 deletions(-) diff --git a/xen/arch/arm/pci/pci.c b/xen/arch/arm/pci/pci.c index 78b97beaef12..ba72fbaf1dfc 100644 --- a/xen/arch/arm/pci/pci.c +++ b/xen/arch/arm/pci/pci.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include =20 @@ -85,7 +86,7 @@ static int __init pci_init(void) * Enable PCI passthrough when has been enabled explicitly * (pci-passthrough=3Don). */ - if ( !pci_passthrough_enabled ) + if ( !is_pci_passthrough_enabled() && !iommu_enabled ) return 0; =20 pci_segments_init(); diff --git a/xen/drivers/pci/physdev.c b/xen/drivers/pci/physdev.c index 42db3e6d133c..4f3e1a96c0fd 100644 --- a/xen/drivers/pci/physdev.c +++ b/xen/drivers/pci/physdev.c @@ -18,9 +18,6 @@ ret_t pci_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void= ) arg) struct pci_dev_info pdev_info; nodeid_t node =3D NUMA_NO_NODE; =20 - if ( !is_pci_passthrough_enabled() ) - return -EOPNOTSUPP; - ret =3D -EFAULT; if ( copy_from_guest(&add, arg, 1) !=3D 0 ) break; @@ -56,9 +53,6 @@ ret_t pci_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void= ) arg) case PHYSDEVOP_pci_device_remove: { struct physdev_pci_device dev; =20 - if ( !is_pci_passthrough_enabled() ) - return -EOPNOTSUPP; - ret =3D -EFAULT; if ( copy_from_guest(&dev, arg, 1) !=3D 0 ) break; --=20 2.42.0 From nobody Tue May 14 19:19:46 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1 dmarc=pass fromdomain=amd.com); dmarc=pass(p=quarantine dis=none) header.from=amd.com ARC-Seal: i=2; a=rsa-sha256; t=1699554648; cv=pass; d=zohomail.com; s=zohoarc; b=C71WcF3yS3awua3I0b670/Udka3IHWcK6L7GozLZWSwz3RP9KZrun0X5ipnJANDyJfdDeHtyzwUd9sGpme/Ftfc4wztUPQNIqFw4Vkm3d4zaV5JPxrikE4KAI3F55wkVMB+R2ZyXXG7bP2MxkeS/qRHoIOE6av+pl80Shri9LXg= ARC-Message-Signature: i=2; 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helo=lists.xenproject.org; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Stewart Hildebrand To: CC: Rahul Singh , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , "Volodymyr Babchuk" , Stewart Hildebrand Subject: [PATCH v6 9/9] xen/arm: Map ITS doorbell register to IOMMU page tables Date: Thu, 9 Nov 2023 13:27:12 -0500 Message-ID: <20231109182716.367119-10-stewart.hildebrand@amd.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231109182716.367119-1-stewart.hildebrand@amd.com> References: <20231109182716.367119-1-stewart.hildebrand@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF0000150B:EE_|LV2PR12MB5823:EE_ X-MS-Office365-Filtering-Correlation-Id: 6b292af5-935c-4b3d-4f16-08dbe151eee5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Nov 2023 18:30:21.9038 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6b292af5-935c-4b3d-4f16-08dbe151eee5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF0000150B.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV2PR12MB5823 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1699554650795100001 Content-Type: text/plain; charset="utf-8" From: Rahul Singh When ITS is enabled and PCI devices that are behind an SMMU generate an MSI interrupt, SMMU fault will be observed as there is currently no mapping in p2m table for the ITS translation register (GITS_TRANSLATER). A mapping is required in the p2m page tables so that the device can generate the MSI interrupt writing to the GITS_TRANSLATER register. The GITS_TRANSLATER register is a 32-bit register, so map a single page. Signed-off-by: Rahul Singh Signed-off-by: Stewart Hildebrand --- This patch was originally picked up from [1], and commit description loosely borrowed from [2]. Example SMMUv3 fault (qemu-system-aarch64 virt model), ITS base 0x8080000: (XEN) SMMUv3: /smmuv3@9050000: event 0x10 received: (XEN) SMMUv3: /smmuv3@9050000: 0x0000000800000010 (XEN) SMMUv3: /smmuv3@9050000: 0x0000008000000000 (XEN) SMMUv3: /smmuv3@9050000: 0x0000000008090040 (XEN) SMMUv3: /smmuv3@9050000: 0x0000000000000000 Example SMMUv2 fault (AMD/Xilinx Versal), ITS base 0xf9020000: (XEN) smmu: /axi/smmu@fd800000: Unhandled context fault: fsr=3D0x402, iova= =3D0xf9030040, fsynr=3D0x12, cb=3D0 v5->v6: * switch to iommu_map() interface * fix page_count argument * style fixup * use gprintk instead of printk * add my Signed-off-by * move to vgic_v3_its_init_virtual() v4->v5: * new patch [1] https://lists.xenproject.org/archives/html/xen-devel/2023-07/msg00483.h= tml [2] https://gitlab.com/xen-project/people/bmarquis/xen-arm-poc/-/commit/623= 2a0d53377009bb7fbc3c3ab81d0153734be6b --- xen/arch/arm/vgic-v3-its.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/xen/arch/arm/vgic-v3-its.c b/xen/arch/arm/vgic-v3-its.c index 05429030b539..c35d5f9eb53e 100644 --- a/xen/arch/arm/vgic-v3-its.c +++ b/xen/arch/arm/vgic-v3-its.c @@ -1477,6 +1477,21 @@ static int vgic_v3_its_init_virtual(struct domain *d= , paddr_t guest_addr, =20 register_mmio_handler(d, &vgic_its_mmio_handler, guest_addr, SZ_64K, i= ts); =20 + if ( is_iommu_enabled(its->d) ) + { + mfn_t mfn =3D maddr_to_mfn(its->doorbell_address); + unsigned int flush_flags =3D 0; + int ret =3D iommu_map(its->d, _dfn(mfn_x(mfn)), mfn, 1, IOMMUF_wri= table, + &flush_flags); + if ( ret < 0 ) + { + gprintk(XENLOG_ERR, + "GICv3: Map ITS translation register %pd failed.\n", + its->d); + return ret; + } + } + /* Register the virtual ITS to be able to clean it up later. */ list_add_tail(&its->vits_list, &d->arch.vgic.vits_list); =20 --=20 2.42.0