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h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Bu0XMjhxMP6timxPh7gDT0on9fDPrVaAmCnLeZEdkGk=; b=OyQTXACynKHO/Lse9cLu26gGXKN+3au3GlQbZAJKe8wjn0Oe8PuP2GrLIIjtwdE8snBN6Fha36Ousnnpa4WFq89IhSR51elQQp32L9SwvJAk1S2tiXI7IBAJxdHUis7RWSr3eY5YVlvpurCfVHjYhAsODpiPmd7cDOkfOjujDNA= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Ayan Kumar Halder To: CC: , , , , Ayan Kumar Halder Subject: [XEN v2] xen/arm: arm32: Use adr_l instead of load_paddr for getting address of symbols Date: Thu, 26 Oct 2023 12:12:28 +0100 Message-ID: <20231026111228.2724962-1-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000F0E5:EE_|DS7PR12MB5766:EE_ X-MS-Office365-Filtering-Correlation-Id: 823291fa-515e-49cd-6a86-08dbd6147374 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Oct 2023 11:12:32.7287 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 823291fa-515e-49cd-6a86-08dbd6147374 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0E5.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB5766 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1698318782003100001 Content-Type: text/plain; charset="utf-8" Before the MMU is turned on, PC uses physical address. Thus, one can use ad= r_l instead of load_paddr to obtain the physical address of a symbol. The only exception (for this replacement) is create_table_entry() which is called before and after MMU is turned on. Also, in lookup_processor_type() "r10" is no longer used. The reason being __lookup_processor_type uses adr_l (thus r10 is no longer used to obtain the physical address offset). Signed-off-by: Ayan Kumar Halder --- Refer https://lists.archive.carbon60.com/xen/devel/682900 for details. Changes from :- v1 :- 1. No need to modify create_table_entry(). 2. Remove "mov r10, #0 " in lookup_processor_type(). xen/arch/arm/arm32/head.S | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S index 33b038e7e0..e0ff46e92f 100644 --- a/xen/arch/arm/arm32/head.S +++ b/xen/arch/arm/arm32/head.S @@ -171,7 +171,7 @@ past_zImage: =20 /* Using the DTB in the .dtb section? */ .ifnes CONFIG_DTB_FILE,"" - load_paddr r8, _sdtb + adr_l r8, _sdtb .endif =20 /* Initialize the UART if earlyprintk has been enabled. */ @@ -213,7 +213,7 @@ GLOBAL(init_secondary) mrc CP32(r1, MPIDR) bic r7, r1, #(~MPIDR_HWID_MASK) /* Mask out flags to get CPU ID = */ =20 - load_paddr r0, smp_up_cpu + adr_l r0, smp_up_cpu dsb 2: ldr r1, [r0] cmp r1, r7 @@ -479,7 +479,7 @@ create_page_tables: * create_table_entry_paddr() will clobber the register storing * the physical address of the table to point to. */ - load_paddr r5, boot_third + adr_l r5, boot_third mov_w r4, XEN_VIRT_START .rept XEN_NR_ENTRIES(2) mov r0, r5 /* r0 :=3D paddr(l3 table) */ @@ -578,7 +578,7 @@ enable_mmu: flush_xen_tlb_local r0 =20 /* Write Xen's PT's paddr into the HTTBR */ - load_paddr r0, boot_pgtable + adr_l r0, boot_pgtable mov r1, #0 /* r0:r1 is paddr (boot_pagetable) */ mcrr CP64(r0, r1, HTTBR) isb @@ -877,7 +877,6 @@ putn: mov pc, lr /* This provides a C-API version of __lookup_processor_type */ ENTRY(lookup_processor_type) stmfd sp!, {r4, r10, lr} - mov r10, #0 /* r10 :=3D offset between virt&ph= ys */ bl __lookup_processor_type mov r0, r1 ldmfd sp!, {r4, r10, pc} @@ -897,8 +896,8 @@ ENTRY(lookup_processor_type) */ __lookup_processor_type: mrc CP32(r0, MIDR) /* r0 :=3D our cpu id */ - load_paddr r1, __proc_info_start - load_paddr r2, __proc_info_end + adr_l r1, __proc_info_start + adr_l r2, __proc_info_end 1: ldr r3, [r1, #PROCINFO_cpu_mask] and r4, r0, r3 /* r4 :=3D our cpu id with mas= k */ ldr r3, [r1, #PROCINFO_cpu_val] /* r3 :=3D cpu val in current = proc info */ --=20 2.25.1