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bh=eyHJM/XB9UyoPZnhX7laqyMoe+H9DU7nM/b3lw43Krw=; b=47S0YALwxJV3TgNaBH+VI53yBTw+oq6/x6BK3osALYblgzuJrkZ+lddS+63SNmq2yKv+js8JolIwT0RKDXaDiZ1OYRrs8evEpeUy09QfWpaALULLgkcTI9hBZ2tAEYptFZamAjLLIJnLRCuyTmtE8njcBjNgcgJhbdLrho14bnc= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Ayan Kumar Halder To: CC: , , , , Ayan Kumar Halder Subject: [XEN] xen/arm: arm32: Use adr_l instead of load_paddr for getting address of symbols Date: Wed, 25 Oct 2023 18:03:04 +0100 Message-ID: <20231025170304.2331922-1-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE3A:EE_|SJ0PR12MB7082:EE_ X-MS-Office365-Filtering-Correlation-Id: 4384aa27-6df3-4e4e-c323-08dbd57c4a2b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Oct 2023 17:03:19.9162 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4384aa27-6df3-4e4e-c323-08dbd57c4a2b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3A.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB7082 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1698253454712100001 Content-Type: text/plain; charset="utf-8" Before the MMU is turned on, the address returned for any symbol will alway= s be physical address. Thus, one can use adr_l instead of load_paddr. create_table_entry() now takes an extra argument to denote if it is called = after the mmu is turned on or not. If it is called with mmu on, then it uses load_paddr to get the physical address of the page table symbol. Signed-off-by: Ayan Kumar Halder --- Refer https://lists.archive.carbon60.com/xen/devel/682900 for details. xen/arch/arm/arm32/head.S | 35 ++++++++++++++++++++--------------- 1 file changed, 20 insertions(+), 15 deletions(-) diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S index 33b038e7e0..bf442b0434 100644 --- a/xen/arch/arm/arm32/head.S +++ b/xen/arch/arm/arm32/head.S @@ -171,7 +171,7 @@ past_zImage: =20 /* Using the DTB in the .dtb section? */ .ifnes CONFIG_DTB_FILE,"" - load_paddr r8, _sdtb + adr_l r8, _sdtb .endif =20 /* Initialize the UART if earlyprintk has been enabled. */ @@ -213,7 +213,7 @@ GLOBAL(init_secondary) mrc CP32(r1, MPIDR) bic r7, r1, #(~MPIDR_HWID_MASK) /* Mask out flags to get CPU ID = */ =20 - load_paddr r0, smp_up_cpu + adr_l r0, smp_up_cpu dsb 2: ldr r1, [r0] cmp r1, r7 @@ -406,6 +406,7 @@ ENDPROC(cpu_init) * tbl: table symbol to point to * virt: virtual address * lvl: page-table level + * mmu_on: is mmu on * * Preserves \virt * Clobbers r1 - r4 @@ -414,10 +415,14 @@ ENDPROC(cpu_init) * * Note that \virt should be in a register other than r1 - r4 */ -.macro create_table_entry, ptbl, tbl, virt, lvl +.macro create_table_entry, ptbl, tbl, virt, lvl, mmu_on + .if \mmu_on =3D=3D 1 load_paddr r4, \tbl - create_table_entry_from_paddr \ptbl, r4, \virt, \lvl - .endm + .else + adr_l r4, \tbl + .endif + create_table_entry_from_paddr \ptbl, r4, \virt, \lvl +.endm =20 /* * Macro to create a mapping entry in \tbl to \paddr. Only mapping in 3rd @@ -479,7 +484,7 @@ create_page_tables: * create_table_entry_paddr() will clobber the register storing * the physical address of the table to point to. */ - load_paddr r5, boot_third + adr_l r5, boot_third mov_w r4, XEN_VIRT_START .rept XEN_NR_ENTRIES(2) mov r0, r5 /* r0 :=3D paddr(l3 table) */ @@ -522,8 +527,8 @@ create_page_tables: * Setup the 1:1 mapping so we can turn the MMU on. Note that * only the first page of Xen will be part of the 1:1 mapping. */ - create_table_entry boot_pgtable, boot_second_id, r9, 1 - create_table_entry boot_second_id, boot_third_id, r9, 2 + create_table_entry boot_pgtable, boot_second_id, r9, 1, 0 + create_table_entry boot_second_id, boot_third_id, r9, 2, 0 create_mapping_entry boot_third_id, r9, r9 =20 /* @@ -537,7 +542,7 @@ create_page_tables: bne use_temporary_mapping =20 mov_w r0, XEN_VIRT_START - create_table_entry boot_pgtable, boot_second, r0, 1 + create_table_entry boot_pgtable, boot_second, r0, 1, 0 mov r12, #0 /* r12 :=3D temporary mapping not cre= ated */ mov pc, lr =20 @@ -551,7 +556,7 @@ use_temporary_mapping: =20 /* Map boot_second (cover Xen mappings) to the temporary 1st slot = */ mov_w r0, TEMPORARY_XEN_VIRT_START - create_table_entry boot_pgtable, boot_second, r0, 1 + create_table_entry boot_pgtable, boot_second, r0, 1, 0 =20 mov r12, #1 /* r12 :=3D temporary mapping created= */ mov pc, lr @@ -578,7 +583,7 @@ enable_mmu: flush_xen_tlb_local r0 =20 /* Write Xen's PT's paddr into the HTTBR */ - load_paddr r0, boot_pgtable + adr_l r0, boot_pgtable mov r1, #0 /* r0:r1 is paddr (boot_pagetable) */ mcrr CP64(r0, r1, HTTBR) isb @@ -658,7 +663,7 @@ switch_to_runtime_mapping: =20 /* Map boot_second into boot_pgtable */ mov_w r0, XEN_VIRT_START - create_table_entry boot_pgtable, boot_second, r0, 1 + create_table_entry boot_pgtable, boot_second, r0, 1, 1 =20 /* Ensure any page table updates are visible before continuing */ dsb nsh @@ -739,7 +744,7 @@ setup_fixmap: #endif /* Map fixmap into boot_second */ mov_w r0, FIXMAP_ADDR(0) - create_table_entry boot_second, xen_fixmap, r0, 2 + create_table_entry boot_second, xen_fixmap, r0, 2, 0 /* Ensure any page table updates made above have occurred. */ dsb nshst /* @@ -897,8 +902,8 @@ ENTRY(lookup_processor_type) */ __lookup_processor_type: mrc CP32(r0, MIDR) /* r0 :=3D our cpu id */ - load_paddr r1, __proc_info_start - load_paddr r2, __proc_info_end + adr_l r1, __proc_info_start + adr_l r2, __proc_info_end 1: ldr r3, [r1, #PROCINFO_cpu_mask] and r4, r0, r3 /* r4 :=3D our cpu id with mas= k */ ldr r3, [r1, #PROCINFO_cpu_val] /* r3 :=3D cpu val in current = proc info */ --=20 2.25.1