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[46.102.197.194]) by smtp.gmail.com with ESMTPSA id c27-20020a17090603db00b009829d2e892csm11522697eja.15.2023.10.12.10.26.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 10:26:13 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 71d2dda0-6924-11ee-98d4-6d05b1d4d9a1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cloud.com; s=cloud; t=1697131574; x=1697736374; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=uYHV7c90aO56gEQ/yK3mNJoFKYNlYbtCnmi3by1vlgc=; b=ZSXcIGPvSi6t2VwdCyqED9PMfrCIbXj0a/qLUZOFTtFUpQXXsLfui1HAU2tAS16maw mndIsEoP/7f+YrKnPU93ezNfVng8B1PrvgzzQ8Ukpah9f/T7Ht2r3P7pUoUt/Cxg72vn 09xp4p/5amWxNHbWArfRt4xD2P0vQMw+bvXWA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697131574; x=1697736374; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=uYHV7c90aO56gEQ/yK3mNJoFKYNlYbtCnmi3by1vlgc=; b=NcduBccM/smj45P70LU/g6+1yIJ9QBbj1xTNDJDE/NnbP+MxXL7cuftjtZFgPQeOfs z85xeA3d+acBA52egi6KGVaL2xXIDR8RqxPymd5i42xdBwxoeDDvaV3AF+xnWrJ9vTNP ymJtjBbmnh3AIz/42EkYnPQdlsvR1MrU3kKp8TvaJrjVtSSWUKVF2jAQp/VAK2JYTZ0U HEfUu7LJq85QsEnH2phM4HCWAROFK2knivOUEcJtMvpCOLWNdkiLMb+G6TNRQRDYc6TS 8hc0TxOWAchmuDuh1+ieOZGgchLxoRTpdmdnvUVDU02qQKPG4SjXIpxkP9CquYgDOk3+ 1ABw== X-Gm-Message-State: AOJu0Yyo2IogQJdU/weAndB9hk2t47w9UIHoNNCpjlUeYieVuhhGfJ2/ rMEPlweSmaf7k23OIVDLrEI0ZtTURAlIrDFjozE= X-Google-Smtp-Source: AGHT+IHRwpZDbak1cbJkyC0ODfF+hHpgBGwY1qDI0jSxs/Tj6PLxWKdj0EN48ydhsaE6q8DDy1FSfw== X-Received: by 2002:a17:906:290:b0:9b2:89eb:79b5 with SMTP id 16-20020a170906029000b009b289eb79b5mr24435349ejf.35.1697131573891; Thu, 12 Oct 2023 10:26:13 -0700 (PDT) From: Alejandro Vallejo To: Xen-devel Cc: Alejandro Vallejo , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu , Henry Wang Subject: [for-4.18][PATCH 1/2] xen/x86: Add family guards to the is_zen[12]_uarch() macros Date: Thu, 12 Oct 2023 18:26:00 +0100 Message-Id: <20231012172601.22600-2-alejandro.vallejo@cloud.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231012172601.22600-1-alejandro.vallejo@cloud.com> References: <20231012172601.22600-1-alejandro.vallejo@cloud.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @cloud.com) X-ZM-MESSAGEID: 1697131612501100005 Content-Type: text/plain; charset="utf-8" It slightly simplifies the code that uses them at no real cost because the code is very rarely executed. This makes it harder to confuse zen uarches due to missing or mistaken family checks. No functional change intended. Signed-off-by: Alejandro Vallejo --- xen/arch/x86/cpu/amd.c | 5 ++--- xen/arch/x86/include/asm/amd.h | 9 +++++---- xen/arch/x86/spec_ctrl.c | 3 --- 3 files changed, 7 insertions(+), 10 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 4f27187f92..22aa8c0085 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -1056,8 +1056,7 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) =20 amd_init_ssbd(c); =20 - if (c->x86 =3D=3D 0x17) - amd_init_spectral_chicken(); + amd_init_spectral_chicken(); =20 /* Probe for NSCB on Zen2 CPUs when not virtualised */ if (!cpu_has_hypervisor && !cpu_has_nscb && c =3D=3D &boot_cpu_data && @@ -1293,7 +1292,7 @@ static int __init cf_check zen2_c6_errata_check(void) */ s_time_t delta; =20 - if (cpu_has_hypervisor || boot_cpu_data.x86 !=3D 0x17 || !is_zen2_uarch()) + if (cpu_has_hypervisor || !is_zen2_uarch()) return 0; =20 /* diff --git a/xen/arch/x86/include/asm/amd.h b/xen/arch/x86/include/asm/amd.h index d862cb7972..5a40bcc2ba 100644 --- a/xen/arch/x86/include/asm/amd.h +++ b/xen/arch/x86/include/asm/amd.h @@ -145,11 +145,12 @@ * Hygon (Fam18h) but without simple model number rules. Instead, use STI= BP * as a heuristic that distinguishes the two. * - * The caller is required to perform the appropriate vendor/family checks - * first. + * The caller is required to perform the appropriate vendor check first. */ -#define is_zen1_uarch() (!boot_cpu_has(X86_FEATURE_AMD_STIBP)) -#define is_zen2_uarch() boot_cpu_has(X86_FEATURE_AMD_STIBP) +#define is_zen1_uarch() ((boot_cpu_data.x86 =3D=3D 0x17 || boot_cpu_data.x= 86 =3D=3D 0x18) && \ + !boot_cpu_has(X86_FEATURE_AMD_STIBP)) +#define is_zen2_uarch() (boot_cpu_data.x86 =3D=3D 0x17 && \ + boot_cpu_has(X86_FEATURE_AMD_STIBP)) =20 struct cpuinfo_x86; int cpu_has_amd_erratum(const struct cpuinfo_x86 *, int, ...); diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 6fd7d44ce4..508c454516 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -976,9 +976,6 @@ static bool __init has_div_vuln(void) (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) return false; =20 - if ( boot_cpu_data.x86 !=3D 0x17 && boot_cpu_data.x86 !=3D 0x18 ) - return false; - return is_zen1_uarch(); } =20 --=20 2.34.1 From nobody Sat May 18 20:15:19 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=reject dis=none) header.from=cloud.com ARC-Seal: i=1; a=rsa-sha256; t=1697131609; cv=none; d=zohomail.com; s=zohoarc; b=cokqu8KFZxVlkKgDcZT39GJHgKlBSzhBkwskn52IlAIcGRW/0byN+U+5jlpUYm46yz3uZjXzLXrbJofNzqum8IbizzvetwSsMSlUYUI/XST0ewzdBOMZLLgpN3+nSHP02nBQQ2vO6RvyBH/dMveBUXll1uDuliuxRsyHU3POjYk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1697131609; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=PHonUX6qskc9LU/MXpGEpaoXVXfgW0/B6Ythy10CTCA=; b=JttoxSbv9zzig7Nl4j0i04+FlfnZJKU0xDcm2vy+XBd/ZYnP/QIbom/5PoAiUMsdNEvNPG2xSbXmWUKqONkJ9YWE/WOA3nQFbmEJ86n3mdI/cNhz7AawmAfZ12CWNAXQqIH4yHH5W7CgD8AZ5MLJ1P9el0JZJSxoq0193logkto= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=reject dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1697131609906216.01415013018823; Thu, 12 Oct 2023 10:26:49 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.615949.957533 (Exim 4.92) (envelope-from ) id 1qqzRy-0001xM-U9; Thu, 12 Oct 2023 17:26:18 +0000 Received: by outflank-mailman (output) from mailman id 615949.957533; Thu, 12 Oct 2023 17:26:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qqzRy-0001xF-RO; Thu, 12 Oct 2023 17:26:18 +0000 Received: by outflank-mailman (input) for mailman id 615949; Thu, 12 Oct 2023 17:26:16 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qqzRw-0001Tc-TU for xen-devel@lists.xenproject.org; Thu, 12 Oct 2023 17:26:16 +0000 Received: from mail-ej1-x62d.google.com (mail-ej1-x62d.google.com [2a00:1450:4864:20::62d]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 72533c5b-6924-11ee-98d4-6d05b1d4d9a1; Thu, 12 Oct 2023 19:26:15 +0200 (CEST) Received: by mail-ej1-x62d.google.com with SMTP id a640c23a62f3a-9b275afb6abso504690066b.1 for ; Thu, 12 Oct 2023 10:26:15 -0700 (PDT) Received: from EMEAENGAAD19049.citrite.net (default-46-102-197-194.interdsl.co.uk. [46.102.197.194]) by smtp.gmail.com with ESMTPSA id c27-20020a17090603db00b009829d2e892csm11522697eja.15.2023.10.12.10.26.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 10:26:14 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 72533c5b-6924-11ee-98d4-6d05b1d4d9a1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cloud.com; s=cloud; t=1697131575; x=1697736375; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PHonUX6qskc9LU/MXpGEpaoXVXfgW0/B6Ythy10CTCA=; b=S6fKjYO9qaLEy0hA4GbQ5dRdITEUgS7niOVT6/aF7VaQHD41GJYY14OM856SYqgMh2 rN9Y75kSU9ZT7zG+JvpzYTsFwym3O0OOWABci/K4YJruVERpytLt3mYLcJnC3GtnVACI PlZCk+V3wj45ySJbXDGFOSFmsao4QVstBbw0k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697131575; x=1697736375; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PHonUX6qskc9LU/MXpGEpaoXVXfgW0/B6Ythy10CTCA=; b=P3m0ef1oittp9NCKX0N8icUVpVTGbURHcBnuK4wgVw/IYkSS5sMPL+ssfLAnw3jsoo Y678yPtGM4n56Wacoo8dAfp5G7uUPwR7F7V2mfGhEGHtRWn85GbBT+cz3n8phdgSrP9b hMJ4ur39k92rKRKRhm7cC5Z2aFExwLbaqt85isd1ZuIuCYNCo14k460z2IIq1XsZs7kL EObZNto2iT1YWIHf+2LV0QezUlyoFwjXeaVQhTlUqW0tRIslqCuMljXrwheLDDzcxHF+ dK3KDrWUWNEYD3icamdJXki1fE5wdKdDrphKF5eJYBpmb59c2J9h54HAh1nejTMxnNOu VNQA== X-Gm-Message-State: AOJu0Yzm9akC17CAlKoT/7dNd9EPBh3Wk26W/QPXp7Tjc6qaTaDuUOS5 SijZkO2D0rw6S0Fd9wxdVTjo5gHA5ErUJwoAZa0= X-Google-Smtp-Source: AGHT+IG0DlS7JEKfVHkAj3AyveqIG+PLDvU2Kj8UbESfWVaf/EtRySDFGTifCMBpejk5ttc8LmMKFA== X-Received: by 2002:a17:906:3b8d:b0:9b2:b808:6a1c with SMTP id u13-20020a1709063b8d00b009b2b8086a1cmr20519203ejf.35.1697131574775; Thu, 12 Oct 2023 10:26:14 -0700 (PDT) From: Alejandro Vallejo To: Xen-devel Cc: Alejandro Vallejo , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu , Henry Wang Subject: [for-4.18][PATCH 2/2] x86/amd: Prevent potentially fetching wrong instruction bytes on Zen4 Date: Thu, 12 Oct 2023 18:26:01 +0100 Message-Id: <20231012172601.22600-3-alejandro.vallejo@cloud.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231012172601.22600-1-alejandro.vallejo@cloud.com> References: <20231012172601.22600-1-alejandro.vallejo@cloud.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @cloud.com) X-ZM-MESSAGEID: 1697131610770100002 Content-Type: text/plain; charset="utf-8" If Zen4 runs with SMT and without STIBP, then it may corrupt its own code stream. This is erratum #1485 in the AMD specs. Fix adapted off Linux's mailing list: https://lore.kernel.org/lkml/D99589F4-BC5D-430B-87B2-72C20370CF57@exactco= de.com/T/#u Signed-off-by: Alejandro Vallejo --- xen/arch/x86/cpu/amd.c | 11 +++++++++++ xen/arch/x86/include/asm/amd.h | 8 ++++++++ xen/arch/x86/include/asm/msr-index.h | 2 ++ 3 files changed, 21 insertions(+) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 22aa8c0085..2426e4cf15 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -1166,6 +1166,17 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) if (c->x86 =3D=3D 0x10) __clear_bit(X86_FEATURE_MONITOR, c->x86_capability); =20 + /* + * Erratum #1485: Outdated microcode on Zen4 may cause corruption + * in the code stream if SMT is enabled and STIBP is not. The fix + * is cheap, so it's applied irrespective of the loaded microcode. + */ + if (!cpu_has_hypervisor && is_zen4_uarch()) { + rdmsrl(MSR_AMD64_BP_CFG, value); + wrmsrl(MSR_AMD64_BP_CFG, + value | AMD64_BP_CFG_SHARED_BTB_FIX); + } + if (!cpu_has_amd_erratum(c, AMD_ERRATUM_121)) opt_allow_unsafe =3D 1; else if (opt_allow_unsafe < 0) diff --git a/xen/arch/x86/include/asm/amd.h b/xen/arch/x86/include/asm/amd.h index 5a40bcc2ba..7d18f7c66b 100644 --- a/xen/arch/x86/include/asm/amd.h +++ b/xen/arch/x86/include/asm/amd.h @@ -145,12 +145,20 @@ * Hygon (Fam18h) but without simple model number rules. Instead, use STI= BP * as a heuristic that distinguishes the two. * + * Zen3 and Zen4 are easier to spot by model number, but it's still not a + * single range. We use AutoIBRS to to discriminate instead, as that's a + * Zen4-specific feature. + * * The caller is required to perform the appropriate vendor check first. */ #define is_zen1_uarch() ((boot_cpu_data.x86 =3D=3D 0x17 || boot_cpu_data.x= 86 =3D=3D 0x18) && \ !boot_cpu_has(X86_FEATURE_AMD_STIBP)) #define is_zen2_uarch() (boot_cpu_data.x86 =3D=3D 0x17 && \ boot_cpu_has(X86_FEATURE_AMD_STIBP)) +#define is_zen3_uarch() (boot_cpu_data.x86 =3D=3D 0x19 && \ + !boot_cpu_has(X86_FEATURE_AUTO_IBRS)) +#define is_zen4_uarch() (boot_cpu_data.x86 =3D=3D 0x19 && \ + boot_cpu_has(X86_FEATURE_AUTO_IBRS)) =20 struct cpuinfo_x86; int cpu_has_amd_erratum(const struct cpuinfo_x86 *, int, ...); diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/as= m/msr-index.h index 11ffed543a..4437e8a63e 100644 --- a/xen/arch/x86/include/asm/msr-index.h +++ b/xen/arch/x86/include/asm/msr-index.h @@ -403,6 +403,8 @@ #define MSR_AMD64_DE_CFG 0xc0011029 #define AMD64_DE_CFG_LFENCE_SERIALISE (_AC(1, ULL) << 1) #define MSR_AMD64_EX_CFG 0xc001102c +#define MSR_AMD64_BP_CFG 0xc001102e +#define AMD64_BP_CFG_SHARED_BTB_FIX (_AC(1, ULL) << 5) #define MSR_AMD64_DE_CFG2 0xc00110e3 =20 #define MSR_AMD64_DR0_ADDRESS_MASK 0xc0011027 --=20 2.34.1