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The chosen format for expressing MSR policy data matches the current one used for CPUID. Note that existing callers of xc_cpuid_apply_policy() can pass NULL as the value for the newly introduced 'msr' parameter in order to preserve the same functionality, and in fact that's done in libxl on this patch. Signed-off-by: Roger Pau Monn=C3=A9 Acked-by: Anthony PERARD --- Changes since v2: - Some code adjustment, no functional change. --- tools/include/xenctrl.h | 21 +++- tools/libs/guest/xg_cpuid_x86.c | 169 +++++++++++++++++++++++++++++++- tools/libs/light/libxl_cpuid.c | 2 +- 3 files changed, 188 insertions(+), 4 deletions(-) diff --git a/tools/include/xenctrl.h b/tools/include/xenctrl.h index dba33d5d0f39..faec1dd82453 100644 --- a/tools/include/xenctrl.h +++ b/tools/include/xenctrl.h @@ -1822,6 +1822,21 @@ struct xc_xend_cpuid { char *policy[4]; }; =20 +/* + * MSR policy data. + * + * The format of the policy string is the following: + * '1' -> force to 1 + * '0' -> force to 0 + * 'x' -> we don't care (use default) + * 'k' -> pass through host value + */ +struct xc_msr { + uint32_t index; + char policy[65]; +}; +#define XC_MSR_INPUT_UNUSED 0xffffffffu + /* * Make adjustments to the CPUID settings for a domain. * @@ -1833,13 +1848,15 @@ struct xc_xend_cpuid { * Either pass a full new @featureset (and @nr_features), or adjust indivi= dual * features (@pae, @itsc, @nested_virt). * - * Then (optionally) apply legacy XEND overrides (@xend) to the result. + * Then (optionally) apply legacy XEND CPUID overrides (@xend) or MSR (@ms= r) + * to the result. */ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, const uint32_t *featureset, unsigned int nr_features, bool pae, bool itsc, - bool nested_virt, const struct xc_xend_cpuid *xe= nd); + bool nested_virt, const struct xc_xend_cpuid *xe= nd, + const struct xc_msr *msr); int xc_mca_op(xc_interface *xch, struct xen_mc *mc); int xc_mca_op_inject_v2(xc_interface *xch, unsigned int flags, xc_cpumap_t cpumap, unsigned int nr_cpus); diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x8= 6.c index 5b035223f4f5..f2b1e809011d 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -423,10 +423,170 @@ static int xc_cpuid_xend_policy( return rc; } =20 +static int compare_msr(const void *l, const void *r) +{ + const xen_msr_entry_t *lhs =3D l; + const xen_msr_entry_t *rhs =3D r; + + if ( lhs->idx =3D=3D rhs->idx ) + return 0; + + return lhs->idx < rhs->idx ? -1 : 1; +} + +static xen_msr_entry_t *find_msr( + xen_msr_entry_t *msrs, unsigned int nr_msrs, + uint32_t index) +{ + const xen_msr_entry_t key =3D { .idx =3D index }; + + return bsearch(&key, msrs, nr_msrs, sizeof(*msrs), compare_msr); +} + + +static int xc_msr_policy(xc_interface *xch, domid_t domid, + const struct xc_msr *msr) +{ + int rc; + bool hvm; + xc_domaininfo_t di; + unsigned int nr_leaves, nr_msrs; + uint32_t err_leaf =3D -1, err_subleaf =3D -1, err_msr =3D -1; + /* + * Three full policies. The host, default for the domain type, + * and domain current. + */ + xen_msr_entry_t *host =3D NULL, *def =3D NULL, *cur =3D NULL; + unsigned int nr_host, nr_def, nr_cur; + + if ( (rc =3D xc_domain_getinfo_single(xch, domid, &di)) < 0 ) + { + PERROR("Failed to obtain d%d info", domid); + rc =3D -errno; + goto out; + } + hvm =3D di.flags & XEN_DOMINF_hvm_guest; + + rc =3D xc_cpu_policy_get_size(xch, &nr_leaves, &nr_msrs); + if ( rc ) + { + PERROR("Failed to obtain policy info size"); + rc =3D -errno; + goto out; + } + + if ( (host =3D calloc(nr_msrs, sizeof(*host))) =3D=3D NULL || + (def =3D calloc(nr_msrs, sizeof(*def))) =3D=3D NULL || + (cur =3D calloc(nr_msrs, sizeof(*cur))) =3D=3D NULL ) + { + ERROR("Unable to allocate memory for %u CPUID leaves", nr_leaves); + rc =3D -ENOMEM; + goto out; + } + + /* Get the domain's current policy. */ + nr_leaves =3D 0; + nr_cur =3D nr_msrs; + rc =3D get_domain_cpu_policy(xch, domid, &nr_leaves, NULL, &nr_cur, cu= r); + if ( rc ) + { + PERROR("Failed to obtain d%d current policy", domid); + rc =3D -errno; + goto out; + } + + /* Get the domain type's default policy. */ + nr_leaves =3D 0; + nr_def =3D nr_msrs; + rc =3D get_system_cpu_policy(xch, hvm ? XEN_SYSCTL_cpu_policy_hvm_defa= ult + : XEN_SYSCTL_cpu_policy_pv_default, + &nr_leaves, NULL, &nr_def, def); + if ( rc ) + { + PERROR("Failed to obtain %s def policy", hvm ? "hvm" : "pv"); + rc =3D -errno; + goto out; + } + + /* Get the host policy. */ + nr_leaves =3D 0; + nr_host =3D nr_msrs; + rc =3D get_system_cpu_policy(xch, XEN_SYSCTL_cpu_policy_host, + &nr_leaves, NULL, &nr_host, host); + if ( rc ) + { + PERROR("Failed to obtain host policy"); + rc =3D -errno; + goto out; + } + + for ( ; msr->index !=3D XC_MSR_INPUT_UNUSED; ++msr ) + { + xen_msr_entry_t *cur_msr =3D find_msr(cur, nr_cur, msr->index); + const xen_msr_entry_t *def_msr =3D find_msr(def, nr_def, msr->inde= x); + const xen_msr_entry_t *host_msr =3D find_msr(host, nr_host, msr->i= ndex); + unsigned int i; + + if ( cur_msr =3D=3D NULL || def_msr =3D=3D NULL || host_msr =3D=3D= NULL ) + { + ERROR("Missing MSR %#x", msr->index); + rc =3D -ENOENT; + goto out; + } + + for ( i =3D 0; i < ARRAY_SIZE(msr->policy) - 1; i++ ) + { + bool val; + + if ( msr->policy[i] =3D=3D '1' ) + val =3D true; + else if ( msr->policy[i] =3D=3D '0' ) + val =3D false; + else if ( msr->policy[i] =3D=3D 'x' ) + val =3D test_bit(63 - i, &def_msr->val); + else if ( msr->policy[i] =3D=3D 'k' ) + val =3D test_bit(63 - i, &host_msr->val); + else + { + ERROR("MSR index %#x: bad character '%c' in policy string = '%s'", + msr->index, msr->policy[i], msr->policy); + rc =3D -EINVAL; + goto out; + } + + if ( val ) + set_bit(63 - i, &cur_msr->val); + else + clear_bit(63 - i, &cur_msr->val); + } + } + + /* Feed the transformed policy back up to Xen. */ + rc =3D xc_set_domain_cpu_policy(xch, domid, 0, NULL, nr_cur, cur, + &err_leaf, &err_subleaf, &err_msr); + if ( rc ) + { + PERROR("Failed to set d%d's policy (err leaf %#x, subleaf %#x, msr= %#x)", + domid, err_leaf, err_subleaf, err_msr); + rc =3D -errno; + goto out; + } + + /* Success! */ + + out: + free(cur); + free(def); + free(host); + + return rc; +} + int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, const uint32_t *featureset, unsigned int nr_feat= ures, bool pae, bool itsc, bool nested_virt, - const struct xc_xend_cpuid *xend) + const struct xc_xend_cpuid *xend, + const struct xc_msr *msr) { int rc; bool hvm; @@ -663,6 +823,13 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t = domid, bool restore, if ( xend && (rc =3D xc_cpuid_xend_policy(xch, domid, xend)) ) goto out; =20 + if ( msr ) + { + rc =3D xc_msr_policy(xch, domid, msr); + if ( rc ) + goto out; + } + rc =3D 0; =20 out: diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index f5ce9f97959c..c96aeb3bce46 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -502,7 +502,7 @@ int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid,= bool restore, info->tsc_mode =3D=3D LIBXL_TSC_MODE_ALWAYS_EMULATE); =20 r =3D xc_cpuid_apply_policy(ctx->xch, domid, restore, NULL, 0, - pae, itsc, nested_virt, info->cpuid); + pae, itsc, nested_virt, info->cpuid, NULL); if (r) LOGEVD(ERROR, -r, domid, "Failed to apply CPUID policy"); =20 --=20 2.41.0 From nobody Thu Nov 14 06:57:57 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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Change the type to instead be a structure that contains one array for CPUID policies, in preparation for it also holding another array for MSR policies. Signed-off-by: Roger Pau Monn=C3=A9 Reviewed-by: Anthony PERARD --- Changes since v2: - Add braces in the inner loop. - Do not set the policy to NULL. --- tools/include/libxl.h | 8 +-- tools/libs/light/libxl_cpuid.c | 87 ++++++++++++++++++++----------- tools/libs/light/libxl_internal.h | 4 ++ 3 files changed, 63 insertions(+), 36 deletions(-) diff --git a/tools/include/libxl.h b/tools/include/libxl.h index cac641a7eba2..f3975ecc021f 100644 --- a/tools/include/libxl.h +++ b/tools/include/libxl.h @@ -1455,12 +1455,8 @@ typedef struct { void libxl_bitmap_init(libxl_bitmap *map); void libxl_bitmap_dispose(libxl_bitmap *map); =20 -/* - * libxl_cpuid_policy is opaque in the libxl ABI. Users of both libxl and - * libxc may not make assumptions about xc_xend_cpuid. - */ -typedef struct xc_xend_cpuid libxl_cpuid_policy; -typedef libxl_cpuid_policy * libxl_cpuid_policy_list; +struct libxl__cpu_policy; +typedef struct libxl__cpu_policy *libxl_cpuid_policy_list; void libxl_cpuid_dispose(libxl_cpuid_policy_list *cpuid_list); int libxl_cpuid_policy_list_length(const libxl_cpuid_policy_list *l); void libxl_cpuid_policy_list_copy(libxl_ctx *ctx, diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index c96aeb3bce46..3c8b2a72c0b8 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -19,22 +19,29 @@ int libxl__cpuid_policy_is_empty(libxl_cpuid_policy_lis= t *pl) return !libxl_cpuid_policy_list_length(pl); } =20 -void libxl_cpuid_dispose(libxl_cpuid_policy_list *p_cpuid_list) +void libxl_cpuid_dispose(libxl_cpuid_policy_list *pl) { - int i, j; - libxl_cpuid_policy_list cpuid_list =3D *p_cpuid_list; + libxl_cpuid_policy_list policy =3D *pl; =20 - if (cpuid_list =3D=3D NULL) + if (policy =3D=3D NULL) return; - for (i =3D 0; cpuid_list[i].input[0] !=3D XEN_CPUID_INPUT_UNUSED; i++)= { - for (j =3D 0; j < 4; j++) - if (cpuid_list[i].policy[j] !=3D NULL) { - free(cpuid_list[i].policy[j]); - cpuid_list[i].policy[j] =3D NULL; + + if (policy->cpuid) { + unsigned int i, j; + struct xc_xend_cpuid *cpuid_list =3D policy->cpuid; + + for (i =3D 0; cpuid_list[i].input[0] !=3D XEN_CPUID_INPUT_UNUSED; = i++) { + for (j =3D 0; j < 4; j++) { + if (cpuid_list[i].policy[j] !=3D NULL) { + free(cpuid_list[i].policy[j]); + } } + } + free(policy->cpuid); } - free(cpuid_list); - *p_cpuid_list =3D NULL; + + free(policy); + *pl =3D NULL; return; } =20 @@ -62,11 +69,17 @@ struct cpuid_flags { /* go through the dynamic array finding the entry for a specified leaf. * if no entry exists, allocate one and return that. */ -static libxl_cpuid_policy_list cpuid_find_match(libxl_cpuid_policy_list *l= ist, - uint32_t leaf, uint32_t subleaf) +static struct xc_xend_cpuid *cpuid_find_match(libxl_cpuid_policy_list *pl, + uint32_t leaf, uint32_t subl= eaf) { + libxl_cpuid_policy_list policy =3D *pl; + struct xc_xend_cpuid **list; int i =3D 0; =20 + if (policy =3D=3D NULL) + policy =3D *pl =3D calloc(1, sizeof(*policy)); + + list =3D &policy->cpuid; if (*list !=3D NULL) { for (i =3D 0; (*list)[i].input[0] !=3D XEN_CPUID_INPUT_UNUSED; i++= ) { if ((*list)[i].input[0] =3D=3D leaf && (*list)[i].input[1] =3D= =3D subleaf) @@ -86,7 +99,7 @@ static libxl_cpuid_policy_list cpuid_find_match(libxl_cpu= id_policy_list *list, * Will overwrite earlier entries and thus can be called multiple * times. */ -int libxl_cpuid_parse_config(libxl_cpuid_policy_list *cpuid, const char* s= tr) +int libxl_cpuid_parse_config(libxl_cpuid_policy_list *policy, const char* = str) { #define NA XEN_CPUID_INPUT_UNUSED static const struct cpuid_flags cpuid_flags[] =3D { @@ -345,7 +358,7 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *c= puid, const char* str) if (flag->name =3D=3D NULL) { return 2; } - entry =3D cpuid_find_match(cpuid, flag->leaf, flag->subleaf); + entry =3D cpuid_find_match(policy, flag->leaf, flag->subleaf); resstr =3D entry->policy[flag->reg - 1]; num =3D strtoull(val, &endptr, 0); flags[flag->length] =3D 0; @@ -400,7 +413,7 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *c= puid, const char* str) * the strings for each register were directly exposed to the user. * Used for maintaining compatibility with older config files */ -int libxl_cpuid_parse_config_xend(libxl_cpuid_policy_list *cpuid, +int libxl_cpuid_parse_config_xend(libxl_cpuid_policy_list *policy, const char* str) { char *endptr; @@ -427,7 +440,7 @@ int libxl_cpuid_parse_config_xend(libxl_cpuid_policy_li= st *cpuid, return 3; } str =3D endptr + 1; - entry =3D cpuid_find_match(cpuid, leaf, subleaf); + entry =3D cpuid_find_match(policy, leaf, subleaf); for (str =3D endptr + 1; *str !=3D 0;) { if (str[0] !=3D 'e' || str[2] !=3D 'x') { return 4; @@ -502,7 +515,8 @@ int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid,= bool restore, info->tsc_mode =3D=3D LIBXL_TSC_MODE_ALWAYS_EMULATE); =20 r =3D xc_cpuid_apply_policy(ctx->xch, domid, restore, NULL, 0, - pae, itsc, nested_virt, info->cpuid, NULL); + pae, itsc, nested_virt, + info->cpuid ? info->cpuid->cpuid : NULL, NUL= L); if (r) LOGEVD(ERROR, -r, domid, "Failed to apply CPUID policy"); =20 @@ -527,16 +541,18 @@ static const char *policy_names[4] =3D { "eax", "ebx"= , "ecx", "edx" }; */ =20 yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand, - libxl_cpuid_policy_list *pcpuid) + libxl_cpuid_policy_list *pl) { - libxl_cpuid_policy_list cpuid =3D *pcpuid; + libxl_cpuid_policy_list policy =3D *pl; + struct xc_xend_cpuid *cpuid; yajl_gen_status s; int i, j; =20 s =3D yajl_gen_array_open(hand); if (s !=3D yajl_gen_status_ok) goto out; =20 - if (cpuid =3D=3D NULL) goto empty; + if (policy =3D=3D NULL || policy->cpuid =3D=3D NULL) goto empty; + cpuid =3D policy->cpuid; =20 for (i =3D 0; cpuid[i].input[0] !=3D XEN_CPUID_INPUT_UNUSED; i++) { s =3D yajl_gen_map_open(hand); @@ -575,7 +591,7 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, libxl_cpuid_policy_list *p) { int i, size; - libxl_cpuid_policy_list l; + struct xc_xend_cpuid *l; flexarray_t *array; =20 if (!libxl__json_object_is_array(o)) @@ -586,8 +602,10 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, return 0; =20 size =3D array->count; + *p =3D libxl__calloc(NOGC, 1, sizeof(**p)); /* need one extra slot as sentinel */ - l =3D *p =3D libxl__calloc(NOGC, size + 1, sizeof(libxl_cpuid_policy)); + l =3D (*p)->cpuid =3D libxl__calloc(NOGC, size + 1, + sizeof(struct xc_xend_cpuid)); =20 l[size].input[0] =3D XEN_CPUID_INPUT_UNUSED; l[size].input[1] =3D XEN_CPUID_INPUT_UNUSED; @@ -630,8 +648,12 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, int libxl_cpuid_policy_list_length(const libxl_cpuid_policy_list *pl) { int i =3D 0; - libxl_cpuid_policy_list l =3D *pl; + const struct xc_xend_cpuid *l; + + if (*pl =3D=3D NULL) + return 0; =20 + l =3D (*pl)->cpuid; if (l) { while (l[i].input[0] !=3D XEN_CPUID_INPUT_UNUSED) i++; @@ -641,20 +663,25 @@ int libxl_cpuid_policy_list_length(const libxl_cpuid_= policy_list *pl) } =20 void libxl_cpuid_policy_list_copy(libxl_ctx *ctx, - libxl_cpuid_policy_list *dst, - const libxl_cpuid_policy_list *src) + libxl_cpuid_policy_list *pdst, + const libxl_cpuid_policy_list *psrc) { + struct xc_xend_cpuid **dst; + struct xc_xend_cpuid *const *src; GC_INIT(ctx); int i, j, len; =20 - if (*src =3D=3D NULL) { - *dst =3D NULL; + if (*psrc =3D=3D NULL) { + *pdst =3D NULL; goto out; } =20 - len =3D libxl_cpuid_policy_list_length(src); + *pdst =3D libxl__calloc(NOGC, 1, sizeof(**pdst)); + dst =3D &(*pdst)->cpuid; + src =3D &(*psrc)->cpuid; + len =3D libxl_cpuid_policy_list_length(psrc); /* one extra slot for sentinel */ - *dst =3D libxl__calloc(NOGC, len + 1, sizeof(libxl_cpuid_policy)); + *dst =3D libxl__calloc(NOGC, len + 1, sizeof(struct xc_xend_cpuid)); (*dst)[len].input[0] =3D XEN_CPUID_INPUT_UNUSED; (*dst)[len].input[1] =3D XEN_CPUID_INPUT_UNUSED; =20 diff --git a/tools/libs/light/libxl_internal.h b/tools/libs/light/libxl_int= ernal.h index 1cf3d400bfce..ef882cff3912 100644 --- a/tools/libs/light/libxl_internal.h +++ b/tools/libs/light/libxl_internal.h @@ -4869,6 +4869,10 @@ int libxl__setresuid(uid_t ruid, uid_t euid, uid_t s= uid); _hidden int libxl__domain_set_paging_mempool_size( libxl__gc *gc, libxl_domain_config *d_config, uint32_t domid); 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Adding the MSR data in the libxl_cpuid_policy_list type is done so that existing users can seamlessly pass MSR features as part of the CPUID data, without requiring the introduction of a separate domain_build_info field, and a new set of handlers functions. Note that support for parsing the old JSON format is kept, as that's required in order to restore domains or received migrations from previous tool versions. Differentiation between the old and the new formats is done based on whether the contents of the 'cpuid' field is an array or a map JSON object. Signed-off-by: Roger Pau Monn=C3=A9 Reviewed-by: Anthony PERARD --- Changes since v3: - Keep support for the old json format in the parse function. Changes since v2: - Unconditionally call free(). - Implement the JSON marshaling functions. --- tools/libs/light/libxl_cpuid.c | 152 ++++++++++++++++++++++++++---- tools/libs/light/libxl_internal.h | 1 + tools/libs/light/libxl_types.idl | 2 +- 3 files changed, 138 insertions(+), 17 deletions(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 3c8b2a72c0b8..dd97699bbde7 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -16,7 +16,7 @@ =20 int libxl__cpuid_policy_is_empty(libxl_cpuid_policy_list *pl) { - return !libxl_cpuid_policy_list_length(pl); + return !*pl || (!libxl_cpuid_policy_list_length(pl) && !(*pl)->msr); } =20 void libxl_cpuid_dispose(libxl_cpuid_policy_list *pl) @@ -40,6 +40,8 @@ void libxl_cpuid_dispose(libxl_cpuid_policy_list *pl) free(policy->cpuid); } =20 + free(policy->msr); + free(policy); *pl =3D NULL; return; @@ -516,7 +518,8 @@ int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid,= bool restore, =20 r =3D xc_cpuid_apply_policy(ctx->xch, domid, restore, NULL, 0, pae, itsc, nested_virt, - info->cpuid ? info->cpuid->cpuid : NULL, NUL= L); + info->cpuid ? info->cpuid->cpuid : NULL, + info->cpuid ? info->cpuid->msr : NULL); if (r) LOGEVD(ERROR, -r, domid, "Failed to apply CPUID policy"); =20 @@ -528,16 +531,22 @@ static const char *input_names[2] =3D { "leaf", "subl= eaf" }; static const char *policy_names[4] =3D { "eax", "ebx", "ecx", "edx" }; /* * Aiming for: - * [ - * { 'leaf': 'val-eax', - * 'subleaf': 'val-ecx', - * 'eax': 'filter', - * 'ebx': 'filter', - * 'ecx': 'filter', - * 'edx': 'filter' }, - * { 'leaf': 'val-eax', ..., 'eax': 'filter', ... }, - * ... etc ... - * ] + * { 'cpuid': [ + * { 'leaf': 'val-eax', + * 'subleaf': 'val-ecx', + * 'eax': 'filter', + * 'ebx': 'filter', + * 'ecx': 'filter', + * 'edx': 'filter' }, + * { 'leaf': 'val-eax', ..., 'eax': 'filter', ... }, + * ... etc ... + * ], + * 'msr': [ + * { 'index': 'val-index', + * 'policy': 'filter', }, + * ... etc ... + * ], + * } */ =20 yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand, @@ -545,9 +554,16 @@ yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_= gen hand, { libxl_cpuid_policy_list policy =3D *pl; struct xc_xend_cpuid *cpuid; + const struct xc_msr *msr; yajl_gen_status s; int i, j; =20 + s =3D yajl_gen_map_open(hand); + if (s !=3D yajl_gen_status_ok) goto out; + + s =3D libxl__yajl_gen_asciiz(hand, "cpuid"); + if (s !=3D yajl_gen_status_ok) goto out; + s =3D yajl_gen_array_open(hand); if (s !=3D yajl_gen_status_ok) goto out; =20 @@ -582,6 +598,39 @@ yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_= gen hand, =20 empty: s =3D yajl_gen_array_close(hand); + if (s !=3D yajl_gen_status_ok) goto out; + + s =3D libxl__yajl_gen_asciiz(hand, "msr"); + if (s !=3D yajl_gen_status_ok) goto out; + + s =3D yajl_gen_array_open(hand); + if (s !=3D yajl_gen_status_ok) goto out; + + if (!policy || !policy->msr) goto done; + msr =3D policy->msr; + + for (i =3D 0; msr[i].index !=3D XC_MSR_INPUT_UNUSED; i++) { + s =3D yajl_gen_map_open(hand); + if (s !=3D yajl_gen_status_ok) goto out; + + s =3D libxl__yajl_gen_asciiz(hand, "index"); + if (s !=3D yajl_gen_status_ok) goto out; + s =3D yajl_gen_integer(hand, msr[i].index); + if (s !=3D yajl_gen_status_ok) goto out; + s =3D libxl__yajl_gen_asciiz(hand, "policy"); + if (s !=3D yajl_gen_status_ok) goto out; + s =3D yajl_gen_string(hand, + (const unsigned char *)msr[i].policy, 64); + if (s !=3D yajl_gen_status_ok) goto out; + + s =3D yajl_gen_map_close(hand); + if (s !=3D yajl_gen_status_ok) goto out; + } + +done: + s =3D yajl_gen_array_close(hand); + if (s !=3D yajl_gen_status_ok) goto out; + s =3D yajl_gen_map_close(hand); out: return s; } @@ -592,17 +641,32 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, { int i, size; struct xc_xend_cpuid *l; + struct xc_msr *msr; + const libxl__json_object *co; flexarray_t *array; + bool cpuid_only =3D false; + + if (libxl__json_object_is_array(o)) { + co =3D o; + cpuid_only =3D true; + goto parse_cpuid; + } + + if (!libxl__json_object_is_map(o)) + return ERROR_FAIL; =20 - if (!libxl__json_object_is_array(o)) + co =3D libxl__json_map_get("cpuid", o, JSON_ARRAY); + if (!libxl__json_object_is_array(co)) return ERROR_FAIL; =20 - array =3D libxl__json_object_get_array(o); +parse_cpuid: + *p =3D libxl__calloc(NOGC, 1, sizeof(**p)); + + array =3D libxl__json_object_get_array(co); if (!array->count) - return 0; + goto cpuid_empty; =20 size =3D array->count; - *p =3D libxl__calloc(NOGC, 1, sizeof(**p)); /* need one extra slot as sentinel */ l =3D (*p)->cpuid =3D libxl__calloc(NOGC, size + 1, sizeof(struct xc_xend_cpuid)); @@ -641,6 +705,42 @@ int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, libxl__strdup(NOGC, libxl__json_object_get_string(r)); } } + if (cpuid_only) + return 0; + +cpuid_empty: + co =3D libxl__json_map_get("msr", o, JSON_ARRAY); + if (!libxl__json_object_is_array(co)) + return ERROR_FAIL; + + array =3D libxl__json_object_get_array(co); + if (!array->count) + return 0; + size =3D array->count; + /* need one extra slot as sentinel */ + msr =3D (*p)->msr =3D libxl__calloc(NOGC, size + 1, sizeof(struct xc_m= sr)); + + msr[size].index =3D XC_MSR_INPUT_UNUSED; + + for (i =3D 0; i < size; i++) { + const libxl__json_object *t, *r; + + if (flexarray_get(array, i, (void**)&t) !=3D 0) + return ERROR_FAIL; + + if (!libxl__json_object_is_map(t)) + return ERROR_FAIL; + + r =3D libxl__json_map_get("index", t, JSON_INTEGER); + if (!r) return ERROR_FAIL; + msr[i].index =3D libxl__json_object_get_integer(r); + r =3D libxl__json_map_get("policy", t, JSON_STRING); + if (!r) return ERROR_FAIL; + if (strlen(libxl__json_object_get_string(r)) !=3D + ARRAY_SIZE(msr[i].policy) - 1) + return ERROR_FAIL; + strcpy(msr[i].policy, libxl__json_object_get_string(r)); + } =20 return 0; } @@ -677,6 +777,10 @@ void libxl_cpuid_policy_list_copy(libxl_ctx *ctx, } =20 *pdst =3D libxl__calloc(NOGC, 1, sizeof(**pdst)); + + if (!(*psrc)->cpuid) + goto copy_msr; + dst =3D &(*pdst)->cpuid; src =3D &(*psrc)->cpuid; len =3D libxl_cpuid_policy_list_length(psrc); @@ -696,6 +800,22 @@ void libxl_cpuid_policy_list_copy(libxl_ctx *ctx, (*dst)[i].policy[j] =3D NULL; } =20 +copy_msr: + if ((*psrc)->msr) { + const struct xc_msr *msr =3D (*psrc)->msr; + + for (i =3D 0; msr[i].index !=3D XC_MSR_INPUT_UNUSED; i++) + ; + len =3D i; + (*pdst)->msr =3D libxl__calloc(NOGC, len + 1, sizeof(struct xc_msr= )); + (*pdst)->msr[len].index =3D XC_MSR_INPUT_UNUSED; + + for (i =3D 0; i < len; i++) { + (*pdst)->msr[i].index =3D msr[i].index; + strcpy((*pdst)->msr[i].policy, msr[i].policy); + } + } + out: GC_FREE; } diff --git a/tools/libs/light/libxl_internal.h b/tools/libs/light/libxl_int= ernal.h index ef882cff3912..b1a7cd9f615b 100644 --- a/tools/libs/light/libxl_internal.h +++ b/tools/libs/light/libxl_internal.h @@ -4871,6 +4871,7 @@ _hidden int libxl__domain_set_paging_mempool_size( =20 struct libxl__cpu_policy { struct xc_xend_cpuid *cpuid; + struct xc_msr *msr; }; =20 #endif diff --git a/tools/libs/light/libxl_types.idl b/tools/libs/light/libxl_type= s.idl index 9e48bb772646..fd2f3f6e485f 100644 --- a/tools/libs/light/libxl_types.idl +++ b/tools/libs/light/libxl_types.idl @@ -19,7 +19,7 @@ libxl_mac =3D Builtin("mac", json_parse_type=3D"JSON_STRI= NG", passby=3DPASS_BY_REFEREN libxl_bitmap =3D Builtin("bitmap", json_parse_type=3D"JSON_ARRAY", dispose= _fn=3D"libxl_bitmap_dispose", passby=3DPASS_BY_REFERENCE, check_default_fn=3D"libxl_bitmap_is_empty", copy_fn= =3D"libxl_bitmap_copy_alloc") libxl_cpuid_policy_list =3D Builtin("cpuid_policy_list", dispose_fn=3D"lib= xl_cpuid_dispose", passby=3DPASS_BY_REFERENCE, - json_parse_type=3D"JSON_ARRAY", check_de= fault_fn=3D"libxl__cpuid_policy_is_empty", + json_parse_type=3D"JSON_ANY", check_defa= ult_fn=3D"libxl__cpuid_policy_is_empty", copy_fn=3D"libxl_cpuid_policy_list_copy") =20 libxl_string_list =3D Builtin("string_list", dispose_fn=3D"libxl_string_li= st_dispose", passby=3DPASS_BY_REFERENCE, --=20 2.41.0 From nobody Thu Nov 14 06:57:57 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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This is in preparation for also adding MSR feature parsing support. No functional change intended. Signed-off-by: Roger Pau Monn=C3=A9 Reviewed-by: Anthony PERARD --- Changes since v3: - Fix UB and use strtoul. --- tools/libs/light/libxl_cpuid.c | 120 +++++++++++++++++---------------- 1 file changed, 63 insertions(+), 57 deletions(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index dd97699bbde7..f04b192c0e44 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -96,6 +96,66 @@ static struct xc_xend_cpuid *cpuid_find_match(libxl_cpui= d_policy_list *pl, return *list + i; } =20 +static int cpuid_add(libxl_cpuid_policy_list *policy, + const struct cpuid_flags *flag, const char *val) +{ + struct xc_xend_cpuid *entry =3D cpuid_find_match(policy, flag->leaf, + flag->subleaf); + unsigned long num; + char flags[33], *resstr, *endptr; + unsigned int i; + + resstr =3D entry->policy[flag->reg - 1]; + num =3D strtoul(val, &endptr, 0); + flags[flag->length] =3D 0; + if (endptr !=3D val) { + /* if this was a valid number, write the binary form into the stri= ng */ + for (i =3D 0; i < flag->length; i++) { + flags[flag->length - 1 - i] =3D "01"[(num >> i) & 1]; + } + } else { + switch(val[0]) { + case 'x': case 'k': case 's': + memset(flags, val[0], flag->length); + break; + default: + return 3; + } + } + + if (resstr =3D=3D NULL) { + resstr =3D strdup("xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx"); + } + + /* the family and model entry is potentially split up across + * two fields in Fn0000_0001_EAX, so handle them here separately. + */ + if (!strcmp(flag->name, "family")) { + if (num < 16) { + memcpy(resstr + (32 - 4) - flag->bit, flags + 4, 4); + memcpy(resstr + (32 - 8) - 20, "00000000", 8); + } else { + num -=3D 15; + memcpy(resstr + (32 - 4) - flag->bit, "1111", 4); + for (i =3D 0; i < 7; i++) { + flags[7 - i] =3D "01"[num & 1]; + num >>=3D 1; + } + memcpy(resstr + (32 - 8) - 20, flags, 8); + } + } else if (!strcmp(flag->name, "model")) { + memcpy(resstr + (32 - 4) - 16, flags, 4); + memcpy(resstr + (32 - 4) - flag->bit, flags + 4, 4); + } else { + memcpy(resstr + (32 - flag->length) - flag->bit, flags, + flag->length); + } + entry->policy[flag->reg - 1] =3D resstr; + + return 0; + +} + /* parse a single key=3Dvalue pair and translate it into the libxc * used interface using 32-characters strings for each register. * Will overwrite earlier entries and thus can be called multiple @@ -340,12 +400,8 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *= policy, const char* str) {NULL, 0, NA, CPUID_REG_INV, 0, 0} }; #undef NA - char *sep, *val, *endptr; - int i; + const char *sep, *val; const struct cpuid_flags *flag; - struct xc_xend_cpuid *entry; - unsigned long num; - char flags[33], *resstr; =20 sep =3D strchr(str, '=3D'); if (sep =3D=3D NULL) { @@ -355,60 +411,10 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list = *policy, const char* str) } for (flag =3D cpuid_flags; flag->name !=3D NULL; flag++) { if(!strncmp(str, flag->name, sep - str) && flag->name[sep - str] = =3D=3D 0) - break; - } - if (flag->name =3D=3D NULL) { - return 2; - } - entry =3D cpuid_find_match(policy, flag->leaf, flag->subleaf); - resstr =3D entry->policy[flag->reg - 1]; - num =3D strtoull(val, &endptr, 0); - flags[flag->length] =3D 0; - if (endptr !=3D val) { - /* if this was a valid number, write the binary form into the stri= ng */ - for (i =3D 0; i < flag->length; i++) { - flags[flag->length - 1 - i] =3D "01"[!!(num & (1 << i))]; - } - } else { - switch(val[0]) { - case 'x': case 'k': case 's': - memset(flags, val[0], flag->length); - break; - default: - return 3; - } - } - - if (resstr =3D=3D NULL) { - resstr =3D strdup("xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx"); + return cpuid_add(policy, flag, val); } =20 - /* the family and model entry is potentially split up across - * two fields in Fn0000_0001_EAX, so handle them here separately. - */ - if (!strncmp(str, "family", sep - str)) { - if (num < 16) { - memcpy(resstr + (32 - 4) - flag->bit, flags + 4, 4); - memcpy(resstr + (32 - 8) - 20, "00000000", 8); - } else { - num -=3D 15; - memcpy(resstr + (32 - 4) - flag->bit, "1111", 4); - for (i =3D 0; i < 7; i++) { - flags[7 - i] =3D "01"[num & 1]; - num >>=3D 1; - } - memcpy(resstr + (32 - 8) - 20, flags, 8); - } - } else if (!strncmp(str, "model", sep - str)) { - memcpy(resstr + (32 - 4) - 16, flags, 4); - memcpy(resstr + (32 - 4) - flag->bit, flags + 4, 4); - } else { - memcpy(resstr + (32 - flag->length) - flag->bit, flags, - flag->length); - } - entry->policy[flag->reg - 1] =3D resstr; - - return 0; + return 2; } =20 /* parse a single list item from the legacy Python xend syntax, where --=20 2.41.0 From nobody Thu Nov 14 06:57:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1 dmarc=pass fromdomain=citrix.com); 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Avoid such duplication by using the automatically generated list of cpuid features in INIT_FEATURE_NAMES in order to map feature names to featureset bits, and then translate from featureset bits into cpuid leaf, subleaf, register tuple. Note that the full contents of the previous cpuid translation table can't be removed. That's because some feature names allowed by libxl are not described in the featuresets, or because naming has diverged and the previous nomenclature is preserved for compatibility reasons. Should result in no functional change observed by callers, albeit some new cpuid features will be available as a result of the change. While there constify cpuid_flags name field. Signed-off-by: Roger Pau Monn=C3=A9 Reviewed-by: Anthony PERARD --- Changes since v1: - const unnamed structure cast. - Declare struct feature_name outside the function. - Use strcmp. - Fix indentation. - Add back missing feature name options. - Return ERROR_NOMEM if allocation fails. - Improve xl.cfg documentation about how to reference the features described in the public header. --- docs/man/xl.cfg.5.pod.in | 24 +-- tools/libs/light/libxl_cpuid.c | 267 ++++++++++++--------------------- tools/xl/xl_parse.c | 3 + 3 files changed, 107 insertions(+), 187 deletions(-) diff --git a/docs/man/xl.cfg.5.pod.in b/docs/man/xl.cfg.5.pod.in index 3979be2a590a..55161856f4c7 100644 --- a/docs/man/xl.cfg.5.pod.in +++ b/docs/man/xl.cfg.5.pod.in @@ -2010,24 +2010,16 @@ proccount procpkg stepping =20 =3Dback =20 -List of keys taking a character: +List of keys taking a character can be found in the public header file +L =20 -=3Dover 4 - -3dnow 3dnowext 3dnowprefetch abm acpi adx aes altmovcr8 apic arat avx avx2 -avx512-4fmaps avx512-4vnniw avx512bw avx512cd avx512dq avx512er avx512f -avx512ifma avx512pf avx512vbmi avx512vl bmi1 bmi2 clflushopt clfsh clwb cm= ov -cmplegacy cmpxchg16 cmpxchg8 cmt cntxid dca de ds dscpl dtes64 erms est ex= tapic -f16c ffxsr fma fma4 fpu fsgsbase fxsr hle htt hypervisor ia64 ibs invpcid -invtsc lahfsahf lm lwp mca mce misalignsse mmx mmxext monitor movbe mpx msr -mtrr nodeid nx ospke osvw osxsave pae page1gb pat pbe pcid pclmulqdq pdcm -perfctr_core perfctr_nb pge pku popcnt pse pse36 psn rdrand rdseed rdtscp = rtm -sha skinit smap smep smx ss sse sse2 sse3 sse4.1 sse4.2 sse4_1 sse4_2 sse4a -ssse3 svm svm_decode svm_lbrv svm_npt svm_nrips svm_pausefilt svm_tscrate -svm_vmcbclean syscall sysenter tbm tm tm2 topoext tsc tsc-deadline tsc_adj= ust -umip vme vmx wdt x2apic xop xsave xtpr +The feature names described in C should be specified in a= ll +lowercase letters, and with underscores converted to hyphens. For example= in +order to reference feature C the string C should be used. =20 -=3Dback +Note that C is described as an option that takes a value, and that +takes precedence over the C flag in C. The feat= ure +flag must be referenced as C. =20 =3Dback =20 diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index f04b192c0e44..0daa564abb81 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -14,6 +14,8 @@ =20 #include "libxl_internal.h" =20 +#include + int libxl__cpuid_policy_is_empty(libxl_cpuid_policy_list *pl) { return !*pl || (!libxl_cpuid_policy_list_length(pl) && !(*pl)->msr); @@ -60,7 +62,7 @@ void libxl_cpuid_dispose(libxl_cpuid_policy_list *pl) * Used for the static structure describing all features. */ struct cpuid_flags { - char* name; + const char *name; uint32_t leaf; uint32_t subleaf; int reg; @@ -153,7 +155,19 @@ static int cpuid_add(libxl_cpuid_policy_list *policy, entry->policy[flag->reg - 1] =3D resstr; =20 return 0; +} + +struct feature_name { + const char *name; + unsigned int bit; +}; + +static int search_feature(const void *a, const void *b) +{ + const char *key =3D a; + const char *feat =3D ((const struct feature_name *)b)->name; =20 + return strcmp(key, feat); } =20 /* parse a single key=3Dvalue pair and translate it into the libxc @@ -176,208 +190,42 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list= *policy, const char* str) {"proccount", 0x00000001, NA, CPUID_REG_EBX, 16, 8}, {"localapicid", 0x00000001, NA, CPUID_REG_EBX, 24, 8}, =20 - {"sse3", 0x00000001, NA, CPUID_REG_ECX, 0, 1}, - {"pclmulqdq", 0x00000001, NA, CPUID_REG_ECX, 1, 1}, - {"dtes64", 0x00000001, NA, CPUID_REG_ECX, 2, 1}, - {"monitor", 0x00000001, NA, CPUID_REG_ECX, 3, 1}, - {"dscpl", 0x00000001, NA, CPUID_REG_ECX, 4, 1}, - {"vmx", 0x00000001, NA, CPUID_REG_ECX, 5, 1}, - {"smx", 0x00000001, NA, CPUID_REG_ECX, 6, 1}, {"est", 0x00000001, NA, CPUID_REG_ECX, 7, 1}, - {"tm2", 0x00000001, NA, CPUID_REG_ECX, 8, 1}, - {"ssse3", 0x00000001, NA, CPUID_REG_ECX, 9, 1}, {"cntxid", 0x00000001, NA, CPUID_REG_ECX, 10, 1}, - {"fma", 0x00000001, NA, CPUID_REG_ECX, 12, 1}, {"cmpxchg16", 0x00000001, NA, CPUID_REG_ECX, 13, 1}, - {"xtpr", 0x00000001, NA, CPUID_REG_ECX, 14, 1}, - {"pdcm", 0x00000001, NA, CPUID_REG_ECX, 15, 1}, - {"pcid", 0x00000001, NA, CPUID_REG_ECX, 17, 1}, - {"dca", 0x00000001, NA, CPUID_REG_ECX, 18, 1}, /* Linux uses sse4_{1,2}. Keep sse4.{1,2} for compatibility */ {"sse4_1", 0x00000001, NA, CPUID_REG_ECX, 19, 1}, {"sse4.1", 0x00000001, NA, CPUID_REG_ECX, 19, 1}, {"sse4_2", 0x00000001, NA, CPUID_REG_ECX, 20, 1}, {"sse4.2", 0x00000001, NA, CPUID_REG_ECX, 20, 1}, - {"x2apic", 0x00000001, NA, CPUID_REG_ECX, 21, 1}, - {"movbe", 0x00000001, NA, CPUID_REG_ECX, 22, 1}, - {"popcnt", 0x00000001, NA, CPUID_REG_ECX, 23, 1}, - {"tsc-deadline", 0x00000001, NA, CPUID_REG_ECX, 24, 1}, {"aes", 0x00000001, NA, CPUID_REG_ECX, 25, 1}, - {"xsave", 0x00000001, NA, CPUID_REG_ECX, 26, 1}, - {"osxsave", 0x00000001, NA, CPUID_REG_ECX, 27, 1}, - {"avx", 0x00000001, NA, CPUID_REG_ECX, 28, 1}, - {"f16c", 0x00000001, NA, CPUID_REG_ECX, 29, 1}, - {"rdrand", 0x00000001, NA, CPUID_REG_ECX, 30, 1}, - {"hypervisor", 0x00000001, NA, CPUID_REG_ECX, 31, 1}, - - {"fpu", 0x00000001, NA, CPUID_REG_EDX, 0, 1}, - {"vme", 0x00000001, NA, CPUID_REG_EDX, 1, 1}, - {"de", 0x00000001, NA, CPUID_REG_EDX, 2, 1}, - {"pse", 0x00000001, NA, CPUID_REG_EDX, 3, 1}, - {"tsc", 0x00000001, NA, CPUID_REG_EDX, 4, 1}, - {"msr", 0x00000001, NA, CPUID_REG_EDX, 5, 1}, - {"pae", 0x00000001, NA, CPUID_REG_EDX, 6, 1}, - {"mce", 0x00000001, NA, CPUID_REG_EDX, 7, 1}, + {"cmpxchg8", 0x00000001, NA, CPUID_REG_EDX, 8, 1}, - {"apic", 0x00000001, NA, CPUID_REG_EDX, 9, 1}, {"sysenter", 0x00000001, NA, CPUID_REG_EDX, 11, 1}, - {"mtrr", 0x00000001, NA, CPUID_REG_EDX, 12, 1}, - {"pge", 0x00000001, NA, CPUID_REG_EDX, 13, 1}, - {"mca", 0x00000001, NA, CPUID_REG_EDX, 14, 1}, - {"cmov", 0x00000001, NA, CPUID_REG_EDX, 15, 1}, - {"pat", 0x00000001, NA, CPUID_REG_EDX, 16, 1}, - {"pse36", 0x00000001, NA, CPUID_REG_EDX, 17, 1}, {"psn", 0x00000001, NA, CPUID_REG_EDX, 18, 1}, {"clfsh", 0x00000001, NA, CPUID_REG_EDX, 19, 1}, - {"ds", 0x00000001, NA, CPUID_REG_EDX, 21, 1}, - {"acpi", 0x00000001, NA, CPUID_REG_EDX, 22, 1}, - {"mmx", 0x00000001, NA, CPUID_REG_EDX, 23, 1}, - {"fxsr", 0x00000001, NA, CPUID_REG_EDX, 24, 1}, - {"sse", 0x00000001, NA, CPUID_REG_EDX, 25, 1}, - {"sse2", 0x00000001, NA, CPUID_REG_EDX, 26, 1}, - {"ss", 0x00000001, NA, CPUID_REG_EDX, 27, 1}, - {"htt", 0x00000001, NA, CPUID_REG_EDX, 28, 1}, {"tm", 0x00000001, NA, CPUID_REG_EDX, 29, 1}, {"ia64", 0x00000001, NA, CPUID_REG_EDX, 30, 1}, {"pbe", 0x00000001, NA, CPUID_REG_EDX, 31, 1}, =20 {"arat", 0x00000006, NA, CPUID_REG_EAX, 2, 1}, =20 - {"fsgsbase", 0x00000007, 0, CPUID_REG_EBX, 0, 1}, {"tsc_adjust", 0x00000007, 0, CPUID_REG_EBX, 1, 1}, - {"bmi1", 0x00000007, 0, CPUID_REG_EBX, 3, 1}, - {"hle", 0x00000007, 0, CPUID_REG_EBX, 4, 1}, - {"avx2", 0x00000007, 0, CPUID_REG_EBX, 5, 1}, - {"smep", 0x00000007, 0, CPUID_REG_EBX, 7, 1}, - {"bmi2", 0x00000007, 0, CPUID_REG_EBX, 8, 1}, - {"erms", 0x00000007, 0, CPUID_REG_EBX, 9, 1}, - {"invpcid", 0x00000007, 0, CPUID_REG_EBX, 10, 1}, - {"rtm", 0x00000007, 0, CPUID_REG_EBX, 11, 1}, {"cmt", 0x00000007, 0, CPUID_REG_EBX, 12, 1}, - {"mpx", 0x00000007, 0, CPUID_REG_EBX, 14, 1}, - {"avx512f", 0x00000007, 0, CPUID_REG_EBX, 16, 1}, - {"avx512dq", 0x00000007, 0, CPUID_REG_EBX, 17, 1}, - {"rdseed", 0x00000007, 0, CPUID_REG_EBX, 18, 1}, - {"adx", 0x00000007, 0, CPUID_REG_EBX, 19, 1}, - {"smap", 0x00000007, 0, CPUID_REG_EBX, 20, 1}, - {"avx512-ifma", 0x00000007, 0, CPUID_REG_EBX, 21, 1}, - {"clflushopt", 0x00000007, 0, CPUID_REG_EBX, 23, 1}, - {"clwb", 0x00000007, 0, CPUID_REG_EBX, 24, 1}, - {"proc-trace", 0x00000007, 0, CPUID_REG_EBX, 25, 1}, - {"avx512pf", 0x00000007, 0, CPUID_REG_EBX, 26, 1}, - {"avx512er", 0x00000007, 0, CPUID_REG_EBX, 27, 1}, - {"avx512cd", 0x00000007, 0, CPUID_REG_EBX, 28, 1}, - {"sha", 0x00000007, 0, CPUID_REG_EBX, 29, 1}, - {"avx512bw", 0x00000007, 0, CPUID_REG_EBX, 30, 1}, - {"avx512vl", 0x00000007, 0, CPUID_REG_EBX, 31, 1}, - - {"prefetchwt1", 0x00000007, 0, CPUID_REG_ECX, 0, 1}, - {"avx512-vbmi", 0x00000007, 0, CPUID_REG_ECX, 1, 1}, - {"umip", 0x00000007, 0, CPUID_REG_ECX, 2, 1}, - {"pku", 0x00000007, 0, CPUID_REG_ECX, 3, 1}, - {"ospke", 0x00000007, 0, CPUID_REG_ECX, 4, 1}, - {"avx512-vbmi2", 0x00000007, 0, CPUID_REG_ECX, 6, 1}, - {"cet-ss", 0x00000007, 0, CPUID_REG_ECX, 7, 1}, - {"gfni", 0x00000007, 0, CPUID_REG_ECX, 8, 1}, - {"vaes", 0x00000007, 0, CPUID_REG_ECX, 9, 1}, - {"vpclmulqdq", 0x00000007, 0, CPUID_REG_ECX, 10, 1}, - {"avx512-vnni", 0x00000007, 0, CPUID_REG_ECX, 11, 1}, - {"avx512-bitalg",0x00000007, 0, CPUID_REG_ECX, 12, 1}, - {"avx512-vpopcntdq",0x00000007,0,CPUID_REG_ECX, 14, 1}, - {"rdpid", 0x00000007, 0, CPUID_REG_ECX, 22, 1}, - {"cldemote", 0x00000007, 0, CPUID_REG_ECX, 25, 1}, - {"pks", 0x00000007, 0, CPUID_REG_ECX, 31, 1}, - - {"avx512-4vnniw",0x00000007, 0, CPUID_REG_EDX, 2, 1}, - {"avx512-4fmaps",0x00000007, 0, CPUID_REG_EDX, 3, 1}, - {"fsrm", 0x00000007, 0, CPUID_REG_EDX, 4, 1}, - {"avx512-vp2intersect",0x00000007,0,CPUID_REG_EDX,8, 1}, - {"srbds-ctrl", 0x00000007, 0, CPUID_REG_EDX, 9, 1}, - {"md-clear", 0x00000007, 0, CPUID_REG_EDX, 10, 1}, - {"serialize", 0x00000007, 0, CPUID_REG_EDX, 14, 1}, - {"tsxldtrk", 0x00000007, 0, CPUID_REG_EDX, 16, 1}, - {"cet-ibt", 0x00000007, 0, CPUID_REG_EDX, 20, 1}, - {"avx512-fp16", 0x00000007, 0, CPUID_REG_EDX, 23, 1}, - {"ibrsb", 0x00000007, 0, CPUID_REG_EDX, 26, 1}, - {"stibp", 0x00000007, 0, CPUID_REG_EDX, 27, 1}, - {"l1d-flush", 0x00000007, 0, CPUID_REG_EDX, 28, 1}, - {"arch-caps", 0x00000007, 0, CPUID_REG_EDX, 29, 1}, - {"core-caps", 0x00000007, 0, CPUID_REG_EDX, 30, 1}, - {"ssbd", 0x00000007, 0, CPUID_REG_EDX, 31, 1}, - - {"avx-vnni", 0x00000007, 1, CPUID_REG_EAX, 4, 1}, - {"avx512-bf16", 0x00000007, 1, CPUID_REG_EAX, 5, 1}, - {"fzrm", 0x00000007, 1, CPUID_REG_EAX, 10, 1}, - {"fsrs", 0x00000007, 1, CPUID_REG_EAX, 11, 1}, - {"fsrcs", 0x00000007, 1, CPUID_REG_EAX, 12, 1}, - {"wrmsrns", 0x00000007, 1, CPUID_REG_EAX, 19, 1}, - {"avx-ifma", 0x00000007, 1, CPUID_REG_EAX, 23, 1}, - - {"avx-vnni-int8",0x00000007, 1, CPUID_REG_EDX, 4, 1}, - {"avx-ne-convert",0x00000007, 1, CPUID_REG_EDX, 5, 1}, - {"cet-sss", 0x00000007, 1, CPUID_REG_EDX, 18, 1}, - - {"intel-psfd", 0x00000007, 2, CPUID_REG_EDX, 0, 1}, - {"ipred-ctrl", 0x00000007, 2, CPUID_REG_EDX, 1, 1}, - {"rrsba-ctrl", 0x00000007, 2, CPUID_REG_EDX, 2, 1}, - {"ddp-ctrl", 0x00000007, 2, CPUID_REG_EDX, 3, 1}, - {"bhi-ctrl", 0x00000007, 2, CPUID_REG_EDX, 4, 1}, - {"mcdt-no", 0x00000007, 2, CPUID_REG_EDX, 5, 1}, =20 {"lahfsahf", 0x80000001, NA, CPUID_REG_ECX, 0, 1}, {"cmplegacy", 0x80000001, NA, CPUID_REG_ECX, 1, 1}, - {"svm", 0x80000001, NA, CPUID_REG_ECX, 2, 1}, - {"extapic", 0x80000001, NA, CPUID_REG_ECX, 3, 1}, {"altmovcr8", 0x80000001, NA, CPUID_REG_ECX, 4, 1}, - {"abm", 0x80000001, NA, CPUID_REG_ECX, 5, 1}, - {"sse4a", 0x80000001, NA, CPUID_REG_ECX, 6, 1}, - {"misalignsse", 0x80000001, NA, CPUID_REG_ECX, 7, 1}, - {"3dnowprefetch",0x80000001, NA, CPUID_REG_ECX, 8, 1}, - {"osvw", 0x80000001, NA, CPUID_REG_ECX, 9, 1}, - {"ibs", 0x80000001, NA, CPUID_REG_ECX, 10, 1}, - {"xop", 0x80000001, NA, CPUID_REG_ECX, 11, 1}, - {"skinit", 0x80000001, NA, CPUID_REG_ECX, 12, 1}, - {"wdt", 0x80000001, NA, CPUID_REG_ECX, 13, 1}, - {"lwp", 0x80000001, NA, CPUID_REG_ECX, 15, 1}, - {"fma4", 0x80000001, NA, CPUID_REG_ECX, 16, 1}, {"nodeid", 0x80000001, NA, CPUID_REG_ECX, 19, 1}, - {"tbm", 0x80000001, NA, CPUID_REG_ECX, 21, 1}, - {"topoext", 0x80000001, NA, CPUID_REG_ECX, 22, 1}, {"perfctr_core", 0x80000001, NA, CPUID_REG_ECX, 23, 1}, {"perfctr_nb", 0x80000001, NA, CPUID_REG_ECX, 24, 1}, =20 - {"syscall", 0x80000001, NA, CPUID_REG_EDX, 11, 1}, - {"nx", 0x80000001, NA, CPUID_REG_EDX, 20, 1}, - {"mmxext", 0x80000001, NA, CPUID_REG_EDX, 22, 1}, - {"ffxsr", 0x80000001, NA, CPUID_REG_EDX, 25, 1}, - {"page1gb", 0x80000001, NA, CPUID_REG_EDX, 26, 1}, - {"rdtscp", 0x80000001, NA, CPUID_REG_EDX, 27, 1}, - {"lm", 0x80000001, NA, CPUID_REG_EDX, 29, 1}, - {"3dnowext", 0x80000001, NA, CPUID_REG_EDX, 30, 1}, - {"3dnow", 0x80000001, NA, CPUID_REG_EDX, 31, 1}, - {"procpkg", 0x00000004, 0, CPUID_REG_EAX, 26, 6}, =20 {"invtsc", 0x80000007, NA, CPUID_REG_EDX, 8, 1}, =20 - {"clzero", 0x80000008, NA, CPUID_REG_EBX, 0, 1}, - {"rstr-fp-err-ptrs", 0x80000008, NA, CPUID_REG_EBX, 2, 1}, - {"wbnoinvd", 0x80000008, NA, CPUID_REG_EBX, 9, 1}, - {"ibpb", 0x80000008, NA, CPUID_REG_EBX, 12, 1}, - {"ibrs", 0x80000008, NA, CPUID_REG_EBX, 14, 1}, - {"amd-stibp", 0x80000008, NA, CPUID_REG_EBX, 15, 1}, - {"ibrs-always", 0x80000008, NA, CPUID_REG_EBX, 16, 1}, - {"stibp-always", 0x80000008, NA, CPUID_REG_EBX, 17, 1}, - {"ibrs-fast", 0x80000008, NA, CPUID_REG_EBX, 18, 1}, - {"ibrs-same-mode", 0x80000008, NA, CPUID_REG_EBX, 19, 1}, - {"no-lmsl", 0x80000008, NA, CPUID_REG_EBX, 20, 1}, {"ppin", 0x80000008, NA, CPUID_REG_EBX, 23, 1}, - {"amd-ssbd", 0x80000008, NA, CPUID_REG_EBX, 24, 1}, - {"virt-ssbd", 0x80000008, NA, CPUID_REG_EBX, 25, 1}, - {"ssb-no", 0x80000008, NA, CPUID_REG_EBX, 26, 1}, - {"psfd", 0x80000008, NA, CPUID_REG_EBX, 28, 1}, {"btc-no", 0x80000008, NA, CPUID_REG_EBX, 29, 1}, - {"ibpb-ret", 0x80000008, NA, CPUID_REG_EBX, 30, 1}, =20 {"nc", 0x80000008, NA, CPUID_REG_ECX, 0, 8}, {"apicidsize", 0x80000008, NA, CPUID_REG_ECX, 12, 4}, @@ -391,17 +239,63 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list = *policy, const char* str) {"svm_pausefilt",0x8000000a, NA, CPUID_REG_EDX, 10, 1}, =20 {"lfence+", 0x80000021, NA, CPUID_REG_EAX, 2, 1}, - {"nscb", 0x80000021, NA, CPUID_REG_EAX, 6, 1}, - {"auto-ibrs", 0x80000021, NA, CPUID_REG_EAX, 8, 1}, - {"cpuid-user-dis", 0x80000021, NA, CPUID_REG_EAX, 17, 1}, =20 {"maxhvleaf", 0x40000000, NA, CPUID_REG_EAX, 0, 8}, =20 {NULL, 0, NA, CPUID_REG_INV, 0, 0} }; + static const struct feature_name features[] =3D INIT_FEATURE_NAMES; + /* + * NB: if we switch to using a cpu_policy derived object instead of a + * libxl_cpuid_policy_list we could get rid of the featureset -> cpuid= leaf + * conversion table and use a featureset directly as we have conversio= ns + * to/from featureset and cpu_policy. + */ + static const struct { + enum { FEAT_CPUID, FEAT_MSR } type; + union { + struct { + uint32_t leaf, subleaf; + unsigned int reg; + } cpuid; + struct { + uint32_t index; + unsigned int reg; + } msr; + }; + } feature_to_policy[] =3D { +#define CPUID_ENTRY(l, s, r) \ + { .type =3D FEAT_CPUID, .cpuid.leaf =3D l, .cpuid.subleaf =3D s, .cpui= d.reg =3D r } +#define MSR_ENTRY(i, r) \ + { .type =3D FEAT_MSR, .msr.index =3D i, .msr.reg =3D r } + CPUID_ENTRY(0x00000001, NA, CPUID_REG_EDX), + CPUID_ENTRY(0x00000001, NA, CPUID_REG_ECX), + CPUID_ENTRY(0x80000001, NA, CPUID_REG_EDX), + CPUID_ENTRY(0x80000001, NA, CPUID_REG_ECX), + CPUID_ENTRY(0x0000000D, 1, CPUID_REG_EAX), + CPUID_ENTRY(0x00000007, 0, CPUID_REG_EBX), + CPUID_ENTRY(0x00000007, 0, CPUID_REG_ECX), + CPUID_ENTRY(0x80000007, NA, CPUID_REG_EDX), + CPUID_ENTRY(0x80000008, NA, CPUID_REG_EBX), + CPUID_ENTRY(0x00000007, 0, CPUID_REG_EDX), + CPUID_ENTRY(0x00000007, 1, CPUID_REG_EAX), + CPUID_ENTRY(0x80000021, NA, CPUID_REG_EAX), + CPUID_ENTRY(0x00000007, 1, CPUID_REG_EBX), + CPUID_ENTRY(0x00000007, 2, CPUID_REG_EDX), + CPUID_ENTRY(0x00000007, 1, CPUID_REG_ECX), + CPUID_ENTRY(0x00000007, 1, CPUID_REG_EDX), + MSR_ENTRY(0x10a, CPUID_REG_EAX), + MSR_ENTRY(0x10a, CPUID_REG_EDX), +#undef MSR_ENTRY +#undef CPUID_ENTRY + }; #undef NA const char *sep, *val; + char *name; const struct cpuid_flags *flag; + const struct feature_name *feat; + + BUILD_BUG_ON(ARRAY_SIZE(feature_to_policy) !=3D FEATURESET_NR_ENTRIES); =20 sep =3D strchr(str, '=3D'); if (sep =3D=3D NULL) { @@ -414,6 +308,37 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *= policy, const char* str) return cpuid_add(policy, flag, val); } =20 + /* Provide a NUL terminated feature name to the search helper. */ + name =3D strndup(str, sep - str); + if (name =3D=3D NULL) + return ERROR_NOMEM; + + feat =3D bsearch(name, features, ARRAY_SIZE(features), sizeof(features= [0]), + search_feature); + free(name); + + if (feat =3D=3D NULL) + return 2; + + switch (feature_to_policy[feat->bit / 32].type) { + case FEAT_CPUID: + { + struct cpuid_flags f; + + f.name =3D feat->name; + f.leaf =3D feature_to_policy[feat->bit / 32].cpuid.leaf; + f.subleaf =3D feature_to_policy[feat->bit / 32].cpuid.subleaf; + f.reg =3D feature_to_policy[feat->bit / 32].cpuid.reg; + f.bit =3D feat->bit % 32; + f.length =3D 1; + + return cpuid_add(policy, &f, val); + } + + case FEAT_MSR: + return 2; + } + return 2; } =20 diff --git a/tools/xl/xl_parse.c b/tools/xl/xl_parse.c index f036e56fc239..7bf587455d08 100644 --- a/tools/xl/xl_parse.c +++ b/tools/xl/xl_parse.c @@ -2620,6 +2620,9 @@ skip_usbdev: case 3: errstr =3D "illegal CPUID value (must be: [0|1|x|k|s])= "; break; + case ERROR_NOMEM: + errstr =3D "out of memory"; + break; default: errstr =3D "unknown error"; break; --=20 2.41.0 From nobody Thu Nov 14 06:57:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of 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SJ0PR03MB6423.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Jul 2023 13:06:48.6637 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: xamPO9QI13iSAP66uF7DBsx8p2If9I1fdT1qK/gTq60bJF9d89n5J5P/CclpymQBpYDtl9gJez0AOxzbLGZTrg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR03MB6516 X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1690290492792100001 Introduce support for handling MSR features in libxl_cpuid_parse_config(). The MSR policies are added to the libxl_cpuid_policy like the CPUID one, which gets passed to xc_cpuid_apply_policy(). This allows existing users of libxl to provide MSR related features as key=3Dvalue pairs to libxl_cpuid_parse_config() without requiring the usage of a different API. Signed-off-by: Roger Pau Monn=C3=A9 Acked-by: Anthony PERARD --- Changes since v2: - Add some braces. --- tools/libs/light/libxl_cpuid.c | 64 +++++++++++++++++++++++++++++++++- 1 file changed, 63 insertions(+), 1 deletion(-) diff --git a/tools/libs/light/libxl_cpuid.c b/tools/libs/light/libxl_cpuid.c index 0daa564abb81..46dd2ce5f9e3 100644 --- a/tools/libs/light/libxl_cpuid.c +++ b/tools/libs/light/libxl_cpuid.c @@ -157,6 +157,60 @@ static int cpuid_add(libxl_cpuid_policy_list *policy, return 0; } =20 +static struct xc_msr *msr_find_match(libxl_cpuid_policy_list *pl, uint32_t= index) +{ + unsigned int i =3D 0; + libxl_cpuid_policy_list policy =3D *pl; + + if (policy =3D=3D NULL) + policy =3D *pl =3D calloc(1, sizeof(*policy)); + + if (policy->msr !=3D NULL) { + for (i =3D 0; policy->msr[i].index !=3D XC_MSR_INPUT_UNUSED; i++) { + if (policy->msr[i].index =3D=3D index) { + return &policy->msr[i]; + } + } + } + + policy->msr =3D realloc(policy->msr, sizeof(struct xc_msr) * (i + 2)); + policy->msr[i].index =3D index; + memset(policy->msr[i].policy, 'x', ARRAY_SIZE(policy->msr[0].policy) -= 1); + policy->msr[i].policy[ARRAY_SIZE(policy->msr[0].policy) - 1] =3D '\0'; + policy->msr[i + 1].index =3D XC_MSR_INPUT_UNUSED; + + return &policy->msr[i]; +} + +static int msr_add(libxl_cpuid_policy_list *policy, uint32_t index, unsign= ed int bit, + const char *val) +{ + struct xc_msr *entry =3D msr_find_match(policy, index); + + /* Only allow options taking a character for MSRs, no values allowed. = */ + if (strlen(val) !=3D 1) + return 3; + + switch (val[0]) { + case '0': + case '1': + case 'x': + case 'k': + entry->policy[63 - bit] =3D val[0]; + break; + + case 's': + /* Translate s -> k as xc_msr doesn't support the deprecated 's'. = */ + entry->policy[63 - bit] =3D 'k'; + break; + + default: + return 3; + } + + return 0; +} + struct feature_name { const char *name; unsigned int bit; @@ -336,7 +390,15 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *= policy, const char* str) } =20 case FEAT_MSR: - return 2; + { + unsigned int bit =3D feat->bit % 32; + + if (feature_to_policy[feat->bit / 32].msr.reg =3D=3D CPUID_REG_EDX) + bit +=3D 32; + + return msr_add(policy, feature_to_policy[feat->bit / 32].msr.index, + bit, val); + } } =20 return 2; --=20 2.41.0