From nobody Thu Oct 23 00:40:36 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=arm.com Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1687750867060420.07529822473066; Sun, 25 Jun 2023 20:41:07 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.555060.866742 (Exim 4.92) (envelope-from ) id 1qDd5M-0005Zn-OT; Mon, 26 Jun 2023 03:40:16 +0000 Received: by outflank-mailman (output) from mailman id 555060.866742; Mon, 26 Jun 2023 03:40:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDd5L-0005UX-Ne; Mon, 26 Jun 2023 03:40:15 +0000 Received: by outflank-mailman (input) for mailman id 555060; Mon, 26 Jun 2023 03:40:12 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qDd2w-0007ej-6M for xen-devel@lists.xenproject.org; Mon, 26 Jun 2023 03:37:46 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id d0226451-13d2-11ee-b237-6b7b168915f2; Mon, 26 Jun 2023 05:37:45 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DC6C61FB; Sun, 25 Jun 2023 20:38:28 -0700 (PDT) Received: from a011292.shanghai.arm.com (a011292.shanghai.arm.com [10.169.190.94]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 2788C3F64C; Sun, 25 Jun 2023 20:37:41 -0700 (PDT) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: d0226451-13d2-11ee-b237-6b7b168915f2 From: Penny Zheng To: xen-devel@lists.xenproject.org Cc: Penny Zheng , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Penny Zheng , Wei Chen Subject: [PATCH v3 50/52] xen/mpu: dump debug message in MPU system Date: Mon, 26 Jun 2023 11:34:41 +0800 Message-Id: <20230626033443.2943270-51-Penny.Zheng@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230626033443.2943270-1-Penny.Zheng@arm.com> References: <20230626033443.2943270-1-Penny.Zheng@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZM-MESSAGEID: 1687750868210100009 Content-Type: text/plain; charset="utf-8" A set of helpers dump_xxx and show_registers are responsible for dumping memory mapping info and register info when debugging. In this commit, we implement them all in MPU system too. Signed-off-by: Penny Zheng Signed-off-by: Wei Chen --- v3: - new commit --- xen/arch/arm/include/asm/mpu/mm.h | 3 +++ xen/arch/arm/mpu/mm.c | 35 +++++++++++++++++++++++++++++++ xen/arch/arm/mpu/p2m.c | 11 ++++++++++ xen/arch/arm/p2m.c | 4 ++++ xen/arch/arm/traps.c | 16 ++++++++++++++ 5 files changed, 69 insertions(+) diff --git a/xen/arch/arm/include/asm/mpu/mm.h b/xen/arch/arm/include/asm/m= pu/mm.h index 0abb0a6c92..d3dcf0024a 100644 --- a/xen/arch/arm/include/asm/mpu/mm.h +++ b/xen/arch/arm/include/asm/mpu/mm.h @@ -21,6 +21,9 @@ extern pr_t *alloc_mpumap(void); extern int mpumap_contain_region(pr_t *table, uint8_t nr_regions, paddr_t base, paddr_t limit, uint8_t *ind= ex); =20 +/* Print a walk of a MPU memory mapping table */ +void dump_mpu_walk(pr_t *table, uint8_t nr_regions); + #endif /* __ARCH_ARM_MM_MPU__ */ =20 /* diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c index c6b287b3aa..ef8a327037 100644 --- a/xen/arch/arm/mpu/mm.c +++ b/xen/arch/arm/mpu/mm.c @@ -898,6 +898,41 @@ pr_t *alloc_mpumap(void) return map; } =20 +void dump_mpu_walk(pr_t *table, uint8_t nr_regions) +{ + uint8_t i =3D 0; + + for ( ; i < nr_regions; i++ ) + { + paddr_t base, limit; + + if ( region_is_valid(&table[i]) ) + { + base =3D pr_get_base(&table[i]); + limit =3D pr_get_limit(&table[i]); + + printk(XENLOG_INFO + "Walking MPU memory mapping table: Region[%u]: 0x%"PRIp= addr"-0x%"PRIpaddr"\n", + i, base, limit); + } + } +} + +void dump_hyp_walk(vaddr_t addr) +{ + uint8_t i =3D 0; + pr_t region; + + for ( i =3D 0; i < max_xen_mpumap; i++ ) + { + read_protection_region(®ion, i); + if ( region_is_valid(®ion) ) + printk(XENLOG_INFO + "Walking hypervisor MPU memory region [%u]: 0x%"PRIpadd= r"-0x%"PRIpaddr"\n", + i, pr_get_base(®ion), pr_get_limit(®ion)); + } +} + /* * Local variables: * mode: C diff --git a/xen/arch/arm/mpu/p2m.c b/xen/arch/arm/mpu/p2m.c index a68a06105f..87e350270d 100644 --- a/xen/arch/arm/mpu/p2m.c +++ b/xen/arch/arm/mpu/p2m.c @@ -481,6 +481,17 @@ void p2m_restore_state(struct vcpu *n) *last_vcpu_ran =3D n->vcpu_id; } =20 +void p2m_dump_info(struct domain *d) +{ + struct p2m_domain *p2m =3D p2m_get_hostp2m(d); + + p2m_read_lock(p2m); + printk("p2m mappings for domain %d (vmid %d):\n", + d->domain_id, p2m->vmid); + printk(" Number of P2M Memory Region: %u \n", p2m->nr_regions); + p2m_read_unlock(p2m); +} + /* * Local variables: * mode: C diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c index e29b11334e..d3961997d0 100644 --- a/xen/arch/arm/p2m.c +++ b/xen/arch/arm/p2m.c @@ -51,8 +51,12 @@ void dump_p2m_lookup(struct domain *d, paddr_t addr) printk("P2M @ %p mfn:%#"PRI_mfn"\n", p2m->root, mfn_x(page_to_mfn(p2m->root))); =20 +#ifndef CONFIG_HAS_MPU dump_pt_walk(page_to_maddr(p2m->root), addr, P2M_ROOT_LEVEL, P2M_ROOT_PAGES); +#else + dump_mpu_walk((pr_t *)page_to_virt(p2m->root), p2m->nr_regions); +#endif } =20 mfn_t p2m_lookup(struct domain *d, gfn_t gfn, p2m_type_t *t) diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index bffa147c36..0592eee91c 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -710,7 +710,11 @@ struct reg_ctxt { #endif =20 /* Hypervisor-side state */ +#ifdef CONFIG_HAS_MPU + uint64_t vsctlr_el2; +#else uint64_t vttbr_el2; +#endif }; =20 static const char *mode_string(register_t cpsr) @@ -908,7 +912,11 @@ static void _show_registers(const struct cpu_user_regs= *regs, #endif } printk(" VTCR_EL2: %"PRIregister"\n", READ_SYSREG(VTCR_EL2)); +#ifndef CONFIG_HAS_MPU printk(" VTTBR_EL2: %016"PRIx64"\n", ctxt->vttbr_el2); +#else + printk(" VSCTLR_EL2: %016"PRIx64"\n", ctxt->vsctlr_el2); +#endif printk("\n"); =20 printk(" SCTLR_EL2: %"PRIregister"\n", READ_SYSREG(SCTLR_EL2)); @@ -945,7 +953,11 @@ void show_registers(const struct cpu_user_regs *regs) if ( guest_mode(regs) && is_32bit_domain(current->domain) ) ctxt.ifsr32_el2 =3D READ_SYSREG(IFSR32_EL2); #endif +#ifndef CONFIG_HAS_MPU ctxt.vttbr_el2 =3D READ_SYSREG64(VTTBR_EL2); +#else + ctxt.vsctlr_el2 =3D READ_SYSREG64(VSCTLR_EL2); +#endif =20 _show_registers(regs, &ctxt, guest_mode(regs), current); } @@ -968,7 +980,11 @@ void vcpu_show_registers(const struct vcpu *v) ctxt.ifsr32_el2 =3D v->arch.ifsr; #endif =20 +#ifdef CONFIG_HAS_MPU + ctxt.vsctlr_el2 =3D v->domain->arch.p2m.vsctlr; +#else ctxt.vttbr_el2 =3D v->domain->arch.p2m.vttbr; +#endif =20 _show_registers(&v->arch.cpu_info->guest_cpu_user_regs, &ctxt, 1, v); } --=20 2.25.1