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bh=wJAdGtIHyvrVYngxULF6IRmPI2fTcN9vqrIymUQEzeM=; b=DTPLTwTfm6SkF8JFSOD+Y6CPTuBHgqB799Ibl2GCI68+LtioM53ZD2uYFP0tkamVFdFtlJp1hu5wbtn50BVVoM1FB/ukRK7iyCuWrAcC/bTRw7qeJuKVhkRIOMm2gDLeQjHWWco8CEo673JdShBLYP0jz4KsNBeAbTyOk8WxstU= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C From: Stewart Hildebrand To: CC: Oleksandr Tyshchenko , Stefano Stabellini , Julien Grall , Jan Beulich , Paul Durrant , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Rahul Singh , Bertrand Marquis , "Stewart Hildebrand" Subject: [PATCH v4 4/7] iommu/arm: Introduce iommu_add_dt_pci_sideband_ids API Date: Tue, 6 Jun 2023 23:02:17 -0400 Message-ID: <20230607030220.22698-5-stewart.hildebrand@amd.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230607030220.22698-1-stewart.hildebrand@amd.com> References: <20230607030220.22698-1-stewart.hildebrand@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT065:EE_|CYYPR12MB8732:EE_ X-MS-Office365-Filtering-Correlation-Id: 0362084f-5415-4f42-e466-08db67044508 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jun 2023 03:07:03.7391 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0362084f-5415-4f42-e466-08db67044508 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT065.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYYPR12MB8732 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1686107254342100001 Content-Type: text/plain; charset="utf-8" From: Oleksandr Tyshchenko The main purpose of this patch is to add a way to register PCI device (which is behind the IOMMU) using the generic PCI-IOMMU DT bindings [1] before assigning that device to a domain. This behaves similarly to the existing iommu_add_dt_device API, except it handles PCI devices, and it is to be invoked from the add_device hook in the SMMU driver. The function of_map_id to translate an ID through a downstream mapping (which is also suitable for mapping Requester ID) was borrowed from Linux (v5.10-rc6) and updated according to the Xen code base. [1] https://www.kernel.org/doc/Documentation/devicetree/bindings/pci/pci-io= mmu.txt Signed-off-by: Oleksandr Tyshchenko Signed-off-by: Stewart Hildebrand --- v3->v4: * wrap #include and if ( acpi_disabled ) in #ifdef CONFIG_ACPI * fix Michal's remarks about style, parenthesis, and print formats * remove !ops->dt_xlate check since it is already in iommu_dt_xlate helper * rename s/iommu_dt_pci_map_id/dt_map_id/ because it is generic, not specif= ic to iommu * update commit description v2->v3: * new patch title (was: iommu/arm: Introduce iommu_add_dt_pci_device API) * renamed function from: iommu_add_dt_pci_device to: iommu_add_dt_pci_sideband_ids * removed stale ops->add_device check * iommu.h: add empty stub iommu_add_dt_pci_sideband_ids for !HAS_DEVICE_TREE * iommu.h: add iommu_add_pci_sideband_ids helper * iommu.h: don't wrap prototype in #ifdef CONFIG_HAS_PCI * s/iommu_fwspec_free(pci_to_dev(pdev))/iommu_fwspec_free(dev)/ v1->v2: * remove extra devfn parameter since pdev fully describes the device * remove ops->add_device() call from iommu_add_dt_pci_device(). Instead, re= ly on the existing iommu call in iommu_add_device(). * move the ops->add_device and ops->dt_xlate checks earlier downstream->v1: * rebase * add const qualifier to struct dt_device_node *np arg in dt_map_id() * add const qualifier to struct dt_device_node *np declaration in iommu_add= _pci_device() * use stdint.h types instead of u8/u32/etc... * rename functions: s/dt_iommu_xlate/iommu_dt_xlate/ s/dt_map_id/iommu_dt_pci_map_id/ s/iommu_add_pci_device/iommu_add_dt_pci_device/ * add device_is_protected check in iommu_add_dt_pci_device * wrap prototypes in CONFIG_HAS_PCI (cherry picked from commit 734e3bf6ee77e7947667ab8fa96c25b349c2e1da from the downstream branch poc/pci-passthrough from https://gitlab.com/xen-project/people/bmarquis/xen-arm-poc.git) --- xen/drivers/passthrough/device_tree.c | 134 ++++++++++++++++++++++++++ xen/include/xen/device_tree.h | 25 +++++ xen/include/xen/iommu.h | 22 ++++- 3 files changed, 180 insertions(+), 1 deletion(-) diff --git a/xen/drivers/passthrough/device_tree.c b/xen/drivers/passthroug= h/device_tree.c index ff9e66ebf92a..bd0aed5df651 100644 --- a/xen/drivers/passthrough/device_tree.c +++ b/xen/drivers/passthrough/device_tree.c @@ -154,6 +154,140 @@ static int iommu_dt_xlate(struct device *dev, return ops->dt_xlate(dev, iommu_spec); } =20 +#ifdef CONFIG_HAS_PCI +int dt_map_id(const struct dt_device_node *np, uint32_t id, + const char *map_name, const char *map_mask_name, + struct dt_device_node **target, uint32_t *id_out) +{ + uint32_t map_mask, masked_id, map_len; + const __be32 *map =3D NULL; + + if ( !np || !map_name || (!target && !id_out) ) + return -EINVAL; + + map =3D dt_get_property(np, map_name, &map_len); + if ( !map ) + { + if ( target ) + return -ENODEV; + + /* Otherwise, no map implies no translation */ + *id_out =3D id; + return 0; + } + + if ( !map_len || (map_len % (4 * sizeof(*map))) ) + { + printk(XENLOG_ERR "%s: Error: Bad %s length: %u\n", np->full_name, + map_name, map_len); + return -EINVAL; + } + + /* The default is to select all bits. */ + map_mask =3D 0xffffffff; + + /* + * Can be overridden by "{iommu,msi}-map-mask" property. + * If df_property_read_u32() fails, the default is used. + */ + if ( map_mask_name ) + dt_property_read_u32(np, map_mask_name, &map_mask); + + masked_id =3D map_mask & id; + for ( ; (int)map_len > 0; map_len -=3D 4 * sizeof(*map), map +=3D 4 ) + { + struct dt_device_node *phandle_node; + uint32_t id_base =3D be32_to_cpup(map + 0); + uint32_t phandle =3D be32_to_cpup(map + 1); + uint32_t out_base =3D be32_to_cpup(map + 2); + uint32_t id_len =3D be32_to_cpup(map + 3); + + if ( id_base & ~map_mask ) + { + printk(XENLOG_ERR "%s: Invalid %s translation - %s-mask (0x%"P= RIx32") ignores id-base (0x%"PRIx32")\n", + np->full_name, map_name, map_name, map_mask, id_base); + return -EFAULT; + } + + if ( (masked_id < id_base) || (masked_id >=3D (id_base + id_len)) ) + continue; + + phandle_node =3D dt_find_node_by_phandle(phandle); + if ( !phandle_node ) + return -ENODEV; + + if ( target ) + { + if ( !*target ) + *target =3D phandle_node; + + if ( *target !=3D phandle_node ) + continue; + } + + if ( id_out ) + *id_out =3D masked_id - id_base + out_base; + + printk(XENLOG_DEBUG "%s: %s, using mask %08"PRIx32", id-base: %08"= PRIx32", out-base: %08"PRIx32", length: %08"PRIx32", id: %08"PRIx32" -> %08= "PRIx32"\n", + np->full_name, map_name, map_mask, id_base, out_base, id_le= n, id, + masked_id - id_base + out_base); + return 0; + } + + printk(XENLOG_ERR "%s: no %s translation for id 0x%"PRIx32" on %s\n", + np->full_name, map_name, id, (target && *target) ? (*target)->f= ull_name : NULL); + + /* + * NOTE: Linux bypasses translation without returning an error here, + * but should we behave in the same way on Xen? Restrict for now. + */ + return -EFAULT; +} + +int iommu_add_dt_pci_sideband_ids(struct pci_dev *pdev) +{ + const struct iommu_ops *ops =3D iommu_get_ops(); + struct dt_phandle_args iommu_spec =3D { .args_count =3D 1 }; + struct device *dev =3D pci_to_dev(pdev); + const struct dt_device_node *np; + int rc =3D NO_IOMMU; + + if ( !iommu_enabled ) + return NO_IOMMU; + + if ( !ops ) + return -EINVAL; + + if ( device_is_protected(dev) ) + return 0; + + if ( dev_iommu_fwspec_get(dev) ) + return -EEXIST; + + np =3D pci_find_host_bridge_node(pdev); + if ( !np ) + return -ENODEV; + + /* + * According to the Documentation/devicetree/bindings/pci/pci-iommu.txt + * from Linux. + */ + rc =3D dt_map_id(np, PCI_BDF(pdev->bus, pdev->devfn), "iommu-map", + "iommu-map-mask", &iommu_spec.np, iommu_spec.args); + if ( rc ) + return (rc =3D=3D -ENODEV) ? NO_IOMMU : rc; + + rc =3D iommu_dt_xlate(dev, &iommu_spec); + if ( rc < 0 ) + { + iommu_fwspec_free(dev); + return -EINVAL; + } + + return rc; +} +#endif /* CONFIG_HAS_PCI */ + int iommu_add_dt_device(struct dt_device_node *np) { const struct iommu_ops *ops =3D iommu_get_ops(); diff --git a/xen/include/xen/device_tree.h b/xen/include/xen/device_tree.h index c2f315140560..8385cd538a58 100644 --- a/xen/include/xen/device_tree.h +++ b/xen/include/xen/device_tree.h @@ -892,6 +892,31 @@ int dt_count_phandle_with_args(const struct dt_device_= node *np, */ int dt_get_pci_domain_nr(struct dt_device_node *node); =20 +#ifdef CONFIG_HAS_PCI +/** + * dt_map_id - Translate an ID through a downstream mapping. + * @np: root complex device node. + * @id: device ID to map. + * @map_name: property name of the map to use. + * @map_mask_name: optional property name of the mask to use. + * @target: optional pointer to a target device node. + * @id_out: optional pointer to receive the translated ID. + * + * Given a device ID, look up the appropriate implementation-defined + * platform ID and/or the target device which receives transactions on that + * ID, as per the "iommu-map" and "msi-map" bindings. Either of @target or + * @id_out may be NULL if only the other is required. If @target points to + * a non-NULL device node pointer, only entries targeting that node will be + * matched; if it points to a NULL value, it will receive the device node = of + * the first matching target phandle, with a reference held. + * + * Return: 0 on success or a standard error code on failure. + */ +int dt_map_id(const struct dt_device_node *np, uint32_t id, + const char *map_name, const char *map_mask_name, + struct dt_device_node **target, uint32_t *id_out); +#endif /* CONFIG_HAS_PCI */ + struct dt_device_node *dt_find_node_by_phandle(dt_phandle handle); =20 #ifdef CONFIG_DEVICE_TREE_DEBUG diff --git a/xen/include/xen/iommu.h b/xen/include/xen/iommu.h index 405db59971c5..3cac177840f7 100644 --- a/xen/include/xen/iommu.h +++ b/xen/include/xen/iommu.h @@ -26,6 +26,9 @@ #include #include #include +#ifdef CONFIG_ACPI +#include +#endif #include =20 TYPE_SAFE(uint64_t, dfn); @@ -219,7 +222,8 @@ int iommu_dt_domain_init(struct domain *d); int iommu_release_dt_devices(struct domain *d); =20 /* - * Helper to add master device to the IOMMU using generic IOMMU DT binding= s. + * Helpers to add master device to the IOMMU using generic (PCI-)IOMMU + * DT bindings. * * Return values: * 0 : device is protected by an IOMMU @@ -228,12 +232,28 @@ int iommu_release_dt_devices(struct domain *d); * (IOMMU is not enabled/present or device is not connected to it). */ int iommu_add_dt_device(struct dt_device_node *np); +int iommu_add_dt_pci_sideband_ids(struct pci_dev *pdev); =20 int iommu_do_dt_domctl(struct xen_domctl *, struct domain *, XEN_GUEST_HANDLE_PARAM(xen_domctl_t)); =20 +#else /* !HAS_DEVICE_TREE */ +static inline int iommu_add_dt_pci_sideband_ids(struct pci_dev *pdev) +{ + return 0; +} #endif /* HAS_DEVICE_TREE */ =20 +static inline int iommu_add_pci_sideband_ids(struct pci_dev *pdev) +{ + int ret =3D 0; +#ifdef CONFIG_ACPI + if ( acpi_disabled ) +#endif + ret =3D iommu_add_dt_pci_sideband_ids(pdev); + return ret; +} + struct page_info; =20 /* --=20 2.40.1