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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jun 2023 03:05:26.8630 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 098a4bd8-1043-4374-25a2-08db67040b4d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT003.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB5625 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1686107167347100001 Content-Type: text/plain; charset="utf-8" From: Oleksandr Tyshchenko Improve readability of check for devices already registered with the SMMU w= ith legacy mmu-masters DT bindings by using is_protected. There are 2 device tree bindings for registering a device with the SMMU: * mmu-masters (legacy, SMMUv1/2 only) * iommus A device tree may include both mmu-masters and iommus properties (although = it is unnecessary to do so). When a device appears in the mmu-masters list, np->is_protected and dev->iommu_fwspec both get set by the SMMUv1/2 driver.= The function iommu_add_dt_device() is subsequently invoked for devices that hav= e an iommus specification. The check as it was before this patch: if ( dev_iommu_fwspec_get(dev) ) return 0; and the new check: if ( dt_device_is_protected(np) ) return 0; are guarding against the same corner case: when a device has both mmu-maste= rs and iommus specifications in the device tree. The is_protected naming is mo= re descriptive. If np->is_protected is not set (i.e. false), but dev->iommu_fwspec is set, = it is an error condition, so return an error in this case. Expand the comment to further clarify the corner case. Signed-off-by: Oleksandr Tyshchenko Signed-off-by: Stewart Hildebrand --- v3->v4: * new patch: this change was split from ("xen/arm: Move is_protected flag t= o struct device") --- xen/drivers/passthrough/device_tree.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/xen/drivers/passthrough/device_tree.c b/xen/drivers/passthroug= h/device_tree.c index 1c32d7b50cce..d9b63da7260a 100644 --- a/xen/drivers/passthrough/device_tree.c +++ b/xen/drivers/passthrough/device_tree.c @@ -141,12 +141,17 @@ int iommu_add_dt_device(struct dt_device_node *np) return -EINVAL; =20 /* - * The device may already have been registered. As there is no harm in - * it just return success early. + * Devices that appear in the legacy mmu-masters list may have already= been + * registered with the SMMU. In case a device has both a mmu-masters e= ntry + * and iommus property, there is no need to register it again. In this= case + * simply return success early. */ - if ( dev_iommu_fwspec_get(dev) ) + if ( dt_device_is_protected(np) ) return 0; =20 + if ( dev_iommu_fwspec_get(dev) ) + return -EEXIST; + /* * According to the Documentation/devicetree/bindings/iommu/iommu.txt * from Linux. --=20 2.40.1 From nobody Sun May 19 01:15:24 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1 dmarc=pass fromdomain=amd.com); dmarc=pass(p=quarantine dis=none) header.from=amd.com ARC-Seal: i=2; a=rsa-sha256; t=1686107183; cv=pass; d=zohomail.com; s=zohoarc; b=RMAZ3slJi6nq9d08g0L3o4Cb6cFrtdtAQgoX9jtus+BnkxaOU54y5dpd+wlad0Au+ePq5vvkbsLLSj2LUBUDgTfR5ZLcIjmwMcOlvCJBG7urdwRGgBeyllEzRE3VhBZQJc6gDfNs6gpfpELGNpGFwatb54eNa5BghzpNpTm65is= ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; 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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C From: Stewart Hildebrand To: CC: Oleksandr Tyshchenko , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Rahul Singh , Stewart Hildebrand Subject: [PATCH v4 2/7] xen/arm: Move is_protected flag to struct device Date: Tue, 6 Jun 2023 23:02:15 -0400 Message-ID: <20230607030220.22698-3-stewart.hildebrand@amd.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230607030220.22698-1-stewart.hildebrand@amd.com> References: <20230607030220.22698-1-stewart.hildebrand@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT048:EE_|MW4PR12MB7287:EE_ X-MS-Office365-Filtering-Correlation-Id: d1d727e3-66da-4cff-3e5c-08db67041763 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jun 2023 03:05:47.1561 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d1d727e3-66da-4cff-3e5c-08db67041763 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT048.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB7287 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1686107184303100001 Content-Type: text/plain; charset="utf-8" From: Oleksandr Tyshchenko This flag will be re-used for PCI devices by the subsequent patches. Signed-off-by: Oleksandr Tyshchenko Signed-off-by: Stewart Hildebrand --- v3->v4: * move is_protected flag within struct device to reduce padding * re-add device_is_protected checks in add_device hooks in smmu-v3.c/ipmmu-= vmsa.c * split mmu-masters check into separate patch v2->v3: * no change v1->v2: * no change downstream->v1: * rebase * s/dev_node->is_protected/dev_node->dev.is_protected/ in smmu.c * s/dt_device_set_protected(dev_to_dt(dev))/device_set_protected(dev)/ in s= mmu-v3.c * remove redundant device_is_protected checks in smmu-v3.c/ipmmu-vmsa.c (cherry picked from commit 59753aac77528a584d3950936b853ebf264b68e7 from the downstream branch poc/pci-passthrough from https://gitlab.com/xen-project/people/bmarquis/xen-arm-poc.git) --- xen/arch/arm/domain_build.c | 4 ++-- xen/arch/arm/include/asm/device.h | 14 ++++++++++++++ xen/common/device_tree.c | 2 +- xen/drivers/passthrough/arm/ipmmu-vmsa.c | 4 ++-- xen/drivers/passthrough/arm/smmu-v3.c | 5 +++-- xen/drivers/passthrough/arm/smmu.c | 2 +- xen/drivers/passthrough/device_tree.c | 8 ++++---- xen/include/xen/device_tree.h | 13 ------------- 8 files changed, 27 insertions(+), 25 deletions(-) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 3f4558ade67f..b229bfaae712 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -2524,7 +2524,7 @@ static int __init handle_device(struct domain *d, str= uct dt_device_node *dev, return res; } =20 - if ( dt_device_is_protected(dev) ) + if ( device_is_protected(dt_to_dev(dev)) ) { dt_dprintk("%s setup iommu\n", dt_node_full_name(dev)); res =3D iommu_assign_dt_device(d, dev); @@ -3024,7 +3024,7 @@ static int __init handle_passthrough_prop(struct kern= el_info *kinfo, return res; =20 /* If xen_force, we allow assignment of devices without IOMMU protecti= on. */ - if ( xen_force && !dt_device_is_protected(node) ) + if ( xen_force && !device_is_protected(dt_to_dev(node)) ) return 0; =20 return iommu_assign_dt_device(kinfo->d, node); diff --git a/xen/arch/arm/include/asm/device.h b/xen/arch/arm/include/asm/d= evice.h index b5d451e08776..8ac807482737 100644 --- a/xen/arch/arm/include/asm/device.h +++ b/xen/arch/arm/include/asm/device.h @@ -1,6 +1,8 @@ #ifndef __ASM_ARM_DEVICE_H #define __ASM_ARM_DEVICE_H =20 +#include + enum device_type { DEV_DT, @@ -15,6 +17,8 @@ struct dev_archdata { struct device { enum device_type type; + bool is_protected; /* Shows that device is protected by IOMMU */ + uint8_t _pad[3]; #ifdef CONFIG_HAS_DEVICE_TREE struct dt_device_node *of_node; /* Used by drivers imported from Linux= */ #endif @@ -94,6 +98,16 @@ int device_init(struct dt_device_node *dev, enum device_= class class, */ enum device_class device_get_class(const struct dt_device_node *dev); =20 +static inline void device_set_protected(struct device *device) +{ + device->is_protected =3D true; +} + +static inline bool device_is_protected(const struct device *device) +{ + return device->is_protected; +} + #define DT_DEVICE_START(_name, _namestr, _class) \ static const struct device_desc __dev_desc_##_name __used \ __section(".dev.info") =3D { \ diff --git a/xen/common/device_tree.c b/xen/common/device_tree.c index 8da105291184..7444da3e0aa5 100644 --- a/xen/common/device_tree.c +++ b/xen/common/device_tree.c @@ -1910,7 +1910,7 @@ static unsigned long __init unflatten_dt_node(const v= oid *fdt, /* By default dom0 owns the device */ np->used_by =3D 0; /* By default the device is not protected */ - np->is_protected =3D false; + np->dev.is_protected =3D false; INIT_LIST_HEAD(&np->domain_list); =20 if ( new_format ) diff --git a/xen/drivers/passthrough/arm/ipmmu-vmsa.c b/xen/drivers/passthr= ough/arm/ipmmu-vmsa.c index 611d9eeba5c3..a71fd76d89a3 100644 --- a/xen/drivers/passthrough/arm/ipmmu-vmsa.c +++ b/xen/drivers/passthrough/arm/ipmmu-vmsa.c @@ -1288,14 +1288,14 @@ static int ipmmu_add_device(u8 devfn, struct device= *dev) if ( !to_ipmmu(dev) ) return -ENODEV; =20 - if ( dt_device_is_protected(dev_to_dt(dev)) ) + if ( device_is_protected(dev) ) { dev_err(dev, "Already added to IPMMU\n"); return -EEXIST; } =20 /* Let Xen know that the master device is protected by an IOMMU. */ - dt_device_set_protected(dev_to_dt(dev)); + device_set_protected(dev); =20 dev_info(dev, "Added master device (IPMMU %s micro-TLBs %u)\n", dev_name(fwspec->iommu_dev), fwspec->num_ids); diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthroug= h/arm/smmu-v3.c index 720aa69ff23e..8842db1ec07e 100644 --- a/xen/drivers/passthrough/arm/smmu-v3.c +++ b/xen/drivers/passthrough/arm/smmu-v3.c @@ -1521,13 +1521,14 @@ static int arm_smmu_add_device(u8 devfn, struct dev= ice *dev) */ arm_smmu_enable_pasid(master); =20 - if (dt_device_is_protected(dev_to_dt(dev))) { + if ( device_is_protected(dev) ) + { dev_err(dev, "Already added to SMMUv3\n"); return -EEXIST; } =20 /* Let Xen know that the master device is protected by an IOMMU. */ - dt_device_set_protected(dev_to_dt(dev)); + device_set_protected(dev); =20 dev_info(dev, "Added master device (SMMUv3 %s StreamIds %u)\n", dev_name(fwspec->iommu_dev), fwspec->num_ids); diff --git a/xen/drivers/passthrough/arm/smmu.c b/xen/drivers/passthrough/a= rm/smmu.c index c37fa9af1366..d874417958b5 100644 --- a/xen/drivers/passthrough/arm/smmu.c +++ b/xen/drivers/passthrough/arm/smmu.c @@ -837,7 +837,7 @@ static int arm_smmu_dt_add_device_legacy(struct arm_smm= u_device *smmu, master->of_node =3D dev_node; =20 /* Xen: Let Xen know that the device is protected by an SMMU */ - dt_device_set_protected(dev_node); + device_set_protected(dev); =20 for (i =3D 0; i < fwspec->num_ids; ++i) { if (!(smmu->features & ARM_SMMU_FEAT_STREAM_MATCH) && diff --git a/xen/drivers/passthrough/device_tree.c b/xen/drivers/passthroug= h/device_tree.c index d9b63da7260a..c60e78eaf556 100644 --- a/xen/drivers/passthrough/device_tree.c +++ b/xen/drivers/passthrough/device_tree.c @@ -34,7 +34,7 @@ int iommu_assign_dt_device(struct domain *d, struct dt_de= vice_node *dev) if ( !is_iommu_enabled(d) ) return -EINVAL; =20 - if ( !dt_device_is_protected(dev) ) + if ( !device_is_protected(dt_to_dev(dev)) ) return -EINVAL; =20 spin_lock(&dtdevs_lock); @@ -65,7 +65,7 @@ int iommu_deassign_dt_device(struct domain *d, struct dt_= device_node *dev) if ( !is_iommu_enabled(d) ) return -EINVAL; =20 - if ( !dt_device_is_protected(dev) ) + if ( !device_is_protected(dt_to_dev(dev)) ) return -EINVAL; =20 spin_lock(&dtdevs_lock); @@ -87,7 +87,7 @@ static bool_t iommu_dt_device_is_assigned(const struct dt= _device_node *dev) { bool_t assigned =3D 0; =20 - if ( !dt_device_is_protected(dev) ) + if ( !device_is_protected(dt_to_dev(dev)) ) return 0; =20 spin_lock(&dtdevs_lock); @@ -146,7 +146,7 @@ int iommu_add_dt_device(struct dt_device_node *np) * and iommus property, there is no need to register it again. In this= case * simply return success early. */ - if ( dt_device_is_protected(np) ) + if ( device_is_protected(dev) ) return 0; =20 if ( dev_iommu_fwspec_get(dev) ) diff --git a/xen/include/xen/device_tree.h b/xen/include/xen/device_tree.h index c2eada748915..c2f315140560 100644 --- a/xen/include/xen/device_tree.h +++ b/xen/include/xen/device_tree.h @@ -90,9 +90,6 @@ struct dt_device_node { struct dt_device_node *next; /* TODO: Remove it. Only use to know the = last children */ struct dt_device_node *allnext; =20 - /* IOMMU specific fields */ - bool is_protected; - /* HACK: Remove this if there is a need of space */ bool_t static_evtchn_created; =20 @@ -329,16 +326,6 @@ static inline domid_t dt_device_used_by(const struct d= t_device_node *device) return device->used_by; } =20 -static inline void dt_device_set_protected(struct dt_device_node *device) -{ - device->is_protected =3D true; -} - -static inline bool dt_device_is_protected(const struct dt_device_node *dev= ice) -{ - return device->is_protected; -} - static inline bool_t dt_property_name_is_equal(const struct dt_property *p= p, const char *name) { --=20 2.40.1 From nobody Sun May 19 01:15:24 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1 dmarc=pass fromdomain=amd.com); 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jun 2023 03:06:21.2153 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6a031bd7-e07a-435a-f8a6-08db67042ba1 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT066.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB8919 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1686107211298100001 Content-Type: text/plain; charset="utf-8" From: Oleksandr Tyshchenko Move code for processing DT IOMMU specifier to a separate helper. This helper will be re-used for adding PCI devices by the subsequent patches as we will need exact the same actions for processing DT PCI-IOMMU specifier. While at it introduce NO_IOMMU to avoid magic "1". Signed-off-by: Oleksandr Tyshchenko Signed-off-by: Stewart Hildebrand --- v3->v4: * make dt_phandle_args *iommu_spec const * move !ops->add_device check to helper v2->v3: * no change v1->v2: * no change downstream->v1: * trivial rebase * s/dt_iommu_xlate/iommu_dt_xlate/ (cherry picked from commit c26bab0415ca303df86aba1d06ef8edc713734d3 from the downstream branch poc/pci-passthrough from https://gitlab.com/xen-project/people/bmarquis/xen-arm-poc.git) --- xen/drivers/passthrough/device_tree.c | 47 ++++++++++++++++++--------- 1 file changed, 31 insertions(+), 16 deletions(-) diff --git a/xen/drivers/passthrough/device_tree.c b/xen/drivers/passthroug= h/device_tree.c index c60e78eaf556..ff9e66ebf92a 100644 --- a/xen/drivers/passthrough/device_tree.c +++ b/xen/drivers/passthrough/device_tree.c @@ -127,15 +127,42 @@ int iommu_release_dt_devices(struct domain *d) return 0; } =20 +/* This correlation must not be altered */ +#define NO_IOMMU 1 + +static int iommu_dt_xlate(struct device *dev, + const struct dt_phandle_args *iommu_spec) +{ + const struct iommu_ops *ops =3D iommu_get_ops(); + int rc; + + if ( !ops->dt_xlate ) + return -EINVAL; + + if ( !dt_device_is_available(iommu_spec->np) ) + return NO_IOMMU; + + rc =3D iommu_fwspec_init(dev, &iommu_spec->np->dev); + if ( rc ) + return rc; + + /* + * Provide DT IOMMU specifier which describes the IOMMU master + * interfaces of that device (device IDs, etc) to the driver. + * The driver is responsible to decide how to interpret them. + */ + return ops->dt_xlate(dev, iommu_spec); +} + int iommu_add_dt_device(struct dt_device_node *np) { const struct iommu_ops *ops =3D iommu_get_ops(); struct dt_phandle_args iommu_spec; struct device *dev =3D dt_to_dev(np); - int rc =3D 1, index =3D 0; + int rc =3D NO_IOMMU, index =3D 0; =20 if ( !iommu_enabled ) - return 1; + return NO_IOMMU; =20 if ( !ops ) return -EINVAL; @@ -163,22 +190,10 @@ int iommu_add_dt_device(struct dt_device_node *np) * The driver which supports generic IOMMU DT bindings must have * these callback implemented. */ - if ( !ops->add_device || !ops->dt_xlate ) + if ( !ops->add_device ) return -EINVAL; =20 - if ( !dt_device_is_available(iommu_spec.np) ) - break; - - rc =3D iommu_fwspec_init(dev, &iommu_spec.np->dev); - if ( rc ) - break; - - /* - * Provide DT IOMMU specifier which describes the IOMMU master - * interfaces of that device (device IDs, etc) to the driver. - * The driver is responsible to decide how to interpret them. - */ - rc =3D ops->dt_xlate(dev, &iommu_spec); + rc =3D iommu_dt_xlate(dev, &iommu_spec); if ( rc ) break; =20 --=20 2.40.1 From nobody Sun May 19 01:15:24 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1 dmarc=pass fromdomain=amd.com); dmarc=pass(p=quarantine dis=none) header.from=amd.com ARC-Seal: i=2; a=rsa-sha256; t=1686107253; cv=pass; d=zohomail.com; s=zohoarc; b=ToAiMUYLuy1JbJisLax4WzhgOctQNUgJgA47ymvPWfUk80Qs1VXW9J28eqStzsw4MpXbxJhQCGWPC1zP7/kGTQF2Z/PXVMZiUqNcKtELy69BZPBe9TKH96IMU4KmT4nVgAKZ00/uB9Ol4MRy6XEiSnw/uClnc7buvlrNfwR1uXo= ARC-Message-Signature: i=2; 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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C From: Stewart Hildebrand To: CC: Oleksandr Tyshchenko , Stefano Stabellini , Julien Grall , Jan Beulich , Paul Durrant , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Rahul Singh , Bertrand Marquis , "Stewart Hildebrand" Subject: [PATCH v4 4/7] iommu/arm: Introduce iommu_add_dt_pci_sideband_ids API Date: Tue, 6 Jun 2023 23:02:17 -0400 Message-ID: <20230607030220.22698-5-stewart.hildebrand@amd.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230607030220.22698-1-stewart.hildebrand@amd.com> References: <20230607030220.22698-1-stewart.hildebrand@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT065:EE_|CYYPR12MB8732:EE_ X-MS-Office365-Filtering-Correlation-Id: 0362084f-5415-4f42-e466-08db67044508 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jun 2023 03:07:03.7391 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0362084f-5415-4f42-e466-08db67044508 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT065.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYYPR12MB8732 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1686107254342100001 Content-Type: text/plain; charset="utf-8" From: Oleksandr Tyshchenko The main purpose of this patch is to add a way to register PCI device (which is behind the IOMMU) using the generic PCI-IOMMU DT bindings [1] before assigning that device to a domain. This behaves similarly to the existing iommu_add_dt_device API, except it handles PCI devices, and it is to be invoked from the add_device hook in the SMMU driver. The function of_map_id to translate an ID through a downstream mapping (which is also suitable for mapping Requester ID) was borrowed from Linux (v5.10-rc6) and updated according to the Xen code base. [1] https://www.kernel.org/doc/Documentation/devicetree/bindings/pci/pci-io= mmu.txt Signed-off-by: Oleksandr Tyshchenko Signed-off-by: Stewart Hildebrand --- v3->v4: * wrap #include and if ( acpi_disabled ) in #ifdef CONFIG_ACPI * fix Michal's remarks about style, parenthesis, and print formats * remove !ops->dt_xlate check since it is already in iommu_dt_xlate helper * rename s/iommu_dt_pci_map_id/dt_map_id/ because it is generic, not specif= ic to iommu * update commit description v2->v3: * new patch title (was: iommu/arm: Introduce iommu_add_dt_pci_device API) * renamed function from: iommu_add_dt_pci_device to: iommu_add_dt_pci_sideband_ids * removed stale ops->add_device check * iommu.h: add empty stub iommu_add_dt_pci_sideband_ids for !HAS_DEVICE_TREE * iommu.h: add iommu_add_pci_sideband_ids helper * iommu.h: don't wrap prototype in #ifdef CONFIG_HAS_PCI * s/iommu_fwspec_free(pci_to_dev(pdev))/iommu_fwspec_free(dev)/ v1->v2: * remove extra devfn parameter since pdev fully describes the device * remove ops->add_device() call from iommu_add_dt_pci_device(). Instead, re= ly on the existing iommu call in iommu_add_device(). * move the ops->add_device and ops->dt_xlate checks earlier downstream->v1: * rebase * add const qualifier to struct dt_device_node *np arg in dt_map_id() * add const qualifier to struct dt_device_node *np declaration in iommu_add= _pci_device() * use stdint.h types instead of u8/u32/etc... * rename functions: s/dt_iommu_xlate/iommu_dt_xlate/ s/dt_map_id/iommu_dt_pci_map_id/ s/iommu_add_pci_device/iommu_add_dt_pci_device/ * add device_is_protected check in iommu_add_dt_pci_device * wrap prototypes in CONFIG_HAS_PCI (cherry picked from commit 734e3bf6ee77e7947667ab8fa96c25b349c2e1da from the downstream branch poc/pci-passthrough from https://gitlab.com/xen-project/people/bmarquis/xen-arm-poc.git) --- xen/drivers/passthrough/device_tree.c | 134 ++++++++++++++++++++++++++ xen/include/xen/device_tree.h | 25 +++++ xen/include/xen/iommu.h | 22 ++++- 3 files changed, 180 insertions(+), 1 deletion(-) diff --git a/xen/drivers/passthrough/device_tree.c b/xen/drivers/passthroug= h/device_tree.c index ff9e66ebf92a..bd0aed5df651 100644 --- a/xen/drivers/passthrough/device_tree.c +++ b/xen/drivers/passthrough/device_tree.c @@ -154,6 +154,140 @@ static int iommu_dt_xlate(struct device *dev, return ops->dt_xlate(dev, iommu_spec); } =20 +#ifdef CONFIG_HAS_PCI +int dt_map_id(const struct dt_device_node *np, uint32_t id, + const char *map_name, const char *map_mask_name, + struct dt_device_node **target, uint32_t *id_out) +{ + uint32_t map_mask, masked_id, map_len; + const __be32 *map =3D NULL; + + if ( !np || !map_name || (!target && !id_out) ) + return -EINVAL; + + map =3D dt_get_property(np, map_name, &map_len); + if ( !map ) + { + if ( target ) + return -ENODEV; + + /* Otherwise, no map implies no translation */ + *id_out =3D id; + return 0; + } + + if ( !map_len || (map_len % (4 * sizeof(*map))) ) + { + printk(XENLOG_ERR "%s: Error: Bad %s length: %u\n", np->full_name, + map_name, map_len); + return -EINVAL; + } + + /* The default is to select all bits. */ + map_mask =3D 0xffffffff; + + /* + * Can be overridden by "{iommu,msi}-map-mask" property. + * If df_property_read_u32() fails, the default is used. + */ + if ( map_mask_name ) + dt_property_read_u32(np, map_mask_name, &map_mask); + + masked_id =3D map_mask & id; + for ( ; (int)map_len > 0; map_len -=3D 4 * sizeof(*map), map +=3D 4 ) + { + struct dt_device_node *phandle_node; + uint32_t id_base =3D be32_to_cpup(map + 0); + uint32_t phandle =3D be32_to_cpup(map + 1); + uint32_t out_base =3D be32_to_cpup(map + 2); + uint32_t id_len =3D be32_to_cpup(map + 3); + + if ( id_base & ~map_mask ) + { + printk(XENLOG_ERR "%s: Invalid %s translation - %s-mask (0x%"P= RIx32") ignores id-base (0x%"PRIx32")\n", + np->full_name, map_name, map_name, map_mask, id_base); + return -EFAULT; + } + + if ( (masked_id < id_base) || (masked_id >=3D (id_base + id_len)) ) + continue; + + phandle_node =3D dt_find_node_by_phandle(phandle); + if ( !phandle_node ) + return -ENODEV; + + if ( target ) + { + if ( !*target ) + *target =3D phandle_node; + + if ( *target !=3D phandle_node ) + continue; + } + + if ( id_out ) + *id_out =3D masked_id - id_base + out_base; + + printk(XENLOG_DEBUG "%s: %s, using mask %08"PRIx32", id-base: %08"= PRIx32", out-base: %08"PRIx32", length: %08"PRIx32", id: %08"PRIx32" -> %08= "PRIx32"\n", + np->full_name, map_name, map_mask, id_base, out_base, id_le= n, id, + masked_id - id_base + out_base); + return 0; + } + + printk(XENLOG_ERR "%s: no %s translation for id 0x%"PRIx32" on %s\n", + np->full_name, map_name, id, (target && *target) ? (*target)->f= ull_name : NULL); + + /* + * NOTE: Linux bypasses translation without returning an error here, + * but should we behave in the same way on Xen? Restrict for now. + */ + return -EFAULT; +} + +int iommu_add_dt_pci_sideband_ids(struct pci_dev *pdev) +{ + const struct iommu_ops *ops =3D iommu_get_ops(); + struct dt_phandle_args iommu_spec =3D { .args_count =3D 1 }; + struct device *dev =3D pci_to_dev(pdev); + const struct dt_device_node *np; + int rc =3D NO_IOMMU; + + if ( !iommu_enabled ) + return NO_IOMMU; + + if ( !ops ) + return -EINVAL; + + if ( device_is_protected(dev) ) + return 0; + + if ( dev_iommu_fwspec_get(dev) ) + return -EEXIST; + + np =3D pci_find_host_bridge_node(pdev); + if ( !np ) + return -ENODEV; + + /* + * According to the Documentation/devicetree/bindings/pci/pci-iommu.txt + * from Linux. + */ + rc =3D dt_map_id(np, PCI_BDF(pdev->bus, pdev->devfn), "iommu-map", + "iommu-map-mask", &iommu_spec.np, iommu_spec.args); + if ( rc ) + return (rc =3D=3D -ENODEV) ? NO_IOMMU : rc; + + rc =3D iommu_dt_xlate(dev, &iommu_spec); + if ( rc < 0 ) + { + iommu_fwspec_free(dev); + return -EINVAL; + } + + return rc; +} +#endif /* CONFIG_HAS_PCI */ + int iommu_add_dt_device(struct dt_device_node *np) { const struct iommu_ops *ops =3D iommu_get_ops(); diff --git a/xen/include/xen/device_tree.h b/xen/include/xen/device_tree.h index c2f315140560..8385cd538a58 100644 --- a/xen/include/xen/device_tree.h +++ b/xen/include/xen/device_tree.h @@ -892,6 +892,31 @@ int dt_count_phandle_with_args(const struct dt_device_= node *np, */ int dt_get_pci_domain_nr(struct dt_device_node *node); =20 +#ifdef CONFIG_HAS_PCI +/** + * dt_map_id - Translate an ID through a downstream mapping. + * @np: root complex device node. + * @id: device ID to map. + * @map_name: property name of the map to use. + * @map_mask_name: optional property name of the mask to use. + * @target: optional pointer to a target device node. + * @id_out: optional pointer to receive the translated ID. + * + * Given a device ID, look up the appropriate implementation-defined + * platform ID and/or the target device which receives transactions on that + * ID, as per the "iommu-map" and "msi-map" bindings. Either of @target or + * @id_out may be NULL if only the other is required. If @target points to + * a non-NULL device node pointer, only entries targeting that node will be + * matched; if it points to a NULL value, it will receive the device node = of + * the first matching target phandle, with a reference held. + * + * Return: 0 on success or a standard error code on failure. + */ +int dt_map_id(const struct dt_device_node *np, uint32_t id, + const char *map_name, const char *map_mask_name, + struct dt_device_node **target, uint32_t *id_out); +#endif /* CONFIG_HAS_PCI */ + struct dt_device_node *dt_find_node_by_phandle(dt_phandle handle); =20 #ifdef CONFIG_DEVICE_TREE_DEBUG diff --git a/xen/include/xen/iommu.h b/xen/include/xen/iommu.h index 405db59971c5..3cac177840f7 100644 --- a/xen/include/xen/iommu.h +++ b/xen/include/xen/iommu.h @@ -26,6 +26,9 @@ #include #include #include +#ifdef CONFIG_ACPI +#include +#endif #include =20 TYPE_SAFE(uint64_t, dfn); @@ -219,7 +222,8 @@ int iommu_dt_domain_init(struct domain *d); int iommu_release_dt_devices(struct domain *d); =20 /* - * Helper to add master device to the IOMMU using generic IOMMU DT binding= s. + * Helpers to add master device to the IOMMU using generic (PCI-)IOMMU + * DT bindings. * * Return values: * 0 : device is protected by an IOMMU @@ -228,12 +232,28 @@ int iommu_release_dt_devices(struct domain *d); * (IOMMU is not enabled/present or device is not connected to it). */ int iommu_add_dt_device(struct dt_device_node *np); +int iommu_add_dt_pci_sideband_ids(struct pci_dev *pdev); =20 int iommu_do_dt_domctl(struct xen_domctl *, struct domain *, XEN_GUEST_HANDLE_PARAM(xen_domctl_t)); =20 +#else /* !HAS_DEVICE_TREE */ +static inline int iommu_add_dt_pci_sideband_ids(struct pci_dev *pdev) +{ + return 0; +} #endif /* HAS_DEVICE_TREE */ =20 +static inline int iommu_add_pci_sideband_ids(struct pci_dev *pdev) +{ + int ret =3D 0; +#ifdef CONFIG_ACPI + if ( acpi_disabled ) +#endif + ret =3D iommu_add_dt_pci_sideband_ids(pdev); + return ret; +} + struct page_info; =20 /* --=20 2.40.1 From nobody Sun May 19 01:15:24 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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bh=cDZk7iF4AhnQAMe+ofo4jPmpjRfddhm3KfqYwi15ldw=; b=cUBmYc05PXU/vL32juDZiTWvhlIzEoDVz3wVMPyQ6XtK7vt3wN/MqBlbzpqeSd8+7nNahzNVW94+P93SNdZrPNWKtODoLavysQ8AAAax00QesFIPUDkF8baJvOzpLl6VhL5/6qonCHIa/d3iL3PC81LnXFlDW/rQwDtj0P1LJVs= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Stewart Hildebrand To: CC: Stewart Hildebrand , Stefano Stabellini , Julien Grall , Rahul Singh , Bertrand Marquis , "Jan Beulich" Subject: [PATCH v4 5/7] iommu/arm: iommu_add_dt_pci_sideband_ids phantom handling Date: Tue, 6 Jun 2023 23:02:18 -0400 Message-ID: <20230607030220.22698-6-stewart.hildebrand@amd.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230607030220.22698-1-stewart.hildebrand@amd.com> References: <20230607030220.22698-1-stewart.hildebrand@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000042AA:EE_|SJ0PR12MB5421:EE_ X-MS-Office365-Filtering-Correlation-Id: ed1fadd7-69b4-44ef-2c03-08db6704540b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jun 2023 03:07:28.9043 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ed1fadd7-69b4-44ef-2c03-08db6704540b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000042AA.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB5421 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1686107275408100001 Content-Type: text/plain; charset="utf-8" Handle phantom functions in iommu_add_dt_pci_sideband_ids(). Each phantom function will have a unique requestor ID (RID)/BDF. On ARM, we need to map/translate the RID/BDF to an AXI stream ID for each phantom function according to the pci-iommu device tree mapping [1]. The RID/BDF -> AXI stre= am ID mapping in DT could allow phantom devices (i.e. devices with phantom functi= ons) to use different AXI stream IDs based on the (phantom) function. [1] https://www.kernel.org/doc/Documentation/devicetree/bindings/pci/pci-io= mmu.txt Signed-off-by: Stewart Hildebrand --- v3->v4: * s/iommu_dt_pci_map_id/dt_map_id/ v2->v3: * new patch title (was: iommu/arm: iommu_add_dt_pci_device phantom handling) * rework loop to reduce duplication * s/iommu_fwspec_free(pci_to_dev(pdev))/iommu_fwspec_free(dev)/ v1->v2: * new patch --- xen/drivers/passthrough/device_tree.c | 33 ++++++++++++++++----------- 1 file changed, 20 insertions(+), 13 deletions(-) diff --git a/xen/drivers/passthrough/device_tree.c b/xen/drivers/passthroug= h/device_tree.c index bd0aed5df651..b7de0175ec7e 100644 --- a/xen/drivers/passthrough/device_tree.c +++ b/xen/drivers/passthrough/device_tree.c @@ -251,6 +251,7 @@ int iommu_add_dt_pci_sideband_ids(struct pci_dev *pdev) struct device *dev =3D pci_to_dev(pdev); const struct dt_device_node *np; int rc =3D NO_IOMMU; + unsigned int devfn =3D pdev->devfn; =20 if ( !iommu_enabled ) return NO_IOMMU; @@ -268,21 +269,27 @@ int iommu_add_dt_pci_sideband_ids(struct pci_dev *pde= v) if ( !np ) return -ENODEV; =20 - /* - * According to the Documentation/devicetree/bindings/pci/pci-iommu.txt - * from Linux. - */ - rc =3D dt_map_id(np, PCI_BDF(pdev->bus, pdev->devfn), "iommu-map", - "iommu-map-mask", &iommu_spec.np, iommu_spec.args); - if ( rc ) - return (rc =3D=3D -ENODEV) ? NO_IOMMU : rc; + do { + /* + * According to the Documentation/devicetree/bindings/pci/pci-iomm= u.txt + * from Linux. + */ + rc =3D dt_map_id(np, PCI_BDF(pdev->bus, devfn), "iommu-map", + "iommu-map-mask", &iommu_spec.np, iommu_spec.args); + if ( rc ) + return (rc =3D=3D -ENODEV) ? NO_IOMMU : rc; =20 - rc =3D iommu_dt_xlate(dev, &iommu_spec); - if ( rc < 0 ) - { - iommu_fwspec_free(dev); - return -EINVAL; + rc =3D iommu_dt_xlate(dev, &iommu_spec); + if ( rc < 0 ) + { + iommu_fwspec_free(dev); + return -EINVAL; + } + + devfn +=3D pdev->phantom_stride; } + while ( (devfn !=3D pdev->devfn) && + (PCI_SLOT(devfn) =3D=3D PCI_SLOT(pdev->devfn)) ); =20 return rc; } --=20 2.40.1 From nobody Sun May 19 01:15:24 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; arc=pass (i=1 dmarc=pass fromdomain=amd.com); dmarc=pass(p=quarantine dis=none) header.from=amd.com ARC-Seal: i=2; a=rsa-sha256; t=1686107292; cv=pass; d=zohomail.com; s=zohoarc; b=I/bUuGTvWcCuqHnC2CBiS8WNY6s+2829sy9Re9Jeeq/IgDhrIZmI9+tC4xMCB0YWu1mMvXshh59N79h1pEoHpBmlSi4ZBLuJk3U2sQBI2jKZDfZPCWJ6MPEqD+hz0Es2/bKaNBi3uY2wIFf3a6buMUAd8zEQAQea1Ed5Ent57uE= ARC-Message-Signature: i=2; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jun 2023 03:07:47.6168 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8697a878-05b0-470a-18c8-08db67045f30 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT069.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4188 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1686107293552100001 Content-Type: text/plain; charset="utf-8" From: Oleksandr Andrushchenko Signed-off-by: Oleksandr Tyshchenko Signed-off-by: Oleksandr Andrushchenko Signed-off-by: Stewart Hildebrand --- v3->v4: * add new device_is_protected check in add_device hook to match SMMUv3 and IPMMU-VMSA drivers v2->v3: * invoke iommu_add_pci_sideband_ids() from add_device hook v1->v2: * ignore add_device/assign_device/reassign_device calls for phantom functio= ns (i.e. devfn !=3D pdev->devfn) downstream->v1: * wrap unused function in #ifdef 0 * remove the remove_device() stub since it was submitted separately to the = list [XEN][PATCH v6 12/19] xen/smmu: Add remove_device callback for smmu_iommu= ops https://lists.xenproject.org/archives/html/xen-devel/2023-05/msg00204.html * arm_smmu_(de)assign_dev: return error instead of crashing system * update condition in arm_smmu_reassign_dev * style fixup * add && !is_hardware_domain(d) into condition in arm_smmu_assign_dev() (cherry picked from commit 0c11a7f65f044c26d87d1e27ac6283ef1f9cfb7a from the downstream branch spider-master from https://github.com/xen-troops/xen.git) --- This is a file imported from Linux with modifications for Xen. What should = be the coding style for Xen modifications? --- xen/drivers/passthrough/arm/smmu.c | 120 ++++++++++++++++++++++++----- 1 file changed, 99 insertions(+), 21 deletions(-) diff --git a/xen/drivers/passthrough/arm/smmu.c b/xen/drivers/passthrough/a= rm/smmu.c index d874417958b5..edb5345fb1cd 100644 --- a/xen/drivers/passthrough/arm/smmu.c +++ b/xen/drivers/passthrough/arm/smmu.c @@ -134,8 +134,20 @@ typedef enum irqreturn irqreturn_t; /* Device logger functions * TODO: Handle PCI */ -#define dev_print(dev, lvl, fmt, ...) \ - printk(lvl "smmu: %s: " fmt, dt_node_full_name(dev_to_dt(dev)), ## __VA_= ARGS__) +#ifndef CONFIG_HAS_PCI +#define dev_print(dev, lvl, fmt, ...) \ + printk(lvl "smmu: %s: " fmt, dev_name(dev), ## __VA_ARGS__) +#else +#define dev_print(dev, lvl, fmt, ...) ({ \ + if ( !dev_is_pci((dev)) ) \ + printk(lvl "smmu: %s: " fmt, dev_name((dev)), ## __VA_ARGS__); \ + else \ + { \ + struct pci_dev *pdev =3D dev_to_pci((dev)); \ + printk(lvl "smmu: %pp: " fmt, &pdev->sbdf, ## __VA_ARGS__); \ + } \ +}) +#endif =20 #define dev_dbg(dev, fmt, ...) dev_print(dev, XENLOG_DEBUG, fmt, ## __VA_A= RGS__) #define dev_notice(dev, fmt, ...) dev_print(dev, XENLOG_INFO, fmt, ## __VA= _ARGS__) @@ -187,6 +199,7 @@ static void __iomem *devm_ioremap_resource(struct devic= e *dev, * Xen: PCI functions * TODO: It should be implemented when PCI will be supported */ +#if 0 /* unused */ #define to_pci_dev(dev) (NULL) static inline int pci_for_each_dma_alias(struct pci_dev *pdev, int (*fn) (struct pci_dev *pdev, @@ -196,6 +209,7 @@ static inline int pci_for_each_dma_alias(struct pci_dev= *pdev, BUG(); return 0; } +#endif =20 /* Xen: misc */ #define PHYS_MASK_SHIFT PADDR_BITS @@ -631,7 +645,7 @@ struct arm_smmu_master_cfg { for (i =3D 0; idx =3D cfg->smendx[i], i < num; ++i) =20 struct arm_smmu_master { - struct device_node *of_node; + struct device *dev; struct rb_node node; struct arm_smmu_master_cfg cfg; }; @@ -723,7 +737,7 @@ arm_smmu_get_fwspec(struct arm_smmu_master_cfg *cfg) { struct arm_smmu_master *master =3D container_of(cfg, struct arm_smmu_master, cfg); - return dev_iommu_fwspec_get(&master->of_node->dev); + return dev_iommu_fwspec_get(master->dev); } =20 static void parse_driver_options(struct arm_smmu_device *smmu) @@ -756,7 +770,7 @@ static struct device_node *dev_get_dev_node(struct devi= ce *dev) } =20 static struct arm_smmu_master *find_smmu_master(struct arm_smmu_device *sm= mu, - struct device_node *dev_node) + struct device *dev) { struct rb_node *node =3D smmu->masters.rb_node; =20 @@ -765,9 +779,9 @@ static struct arm_smmu_master *find_smmu_master(struct = arm_smmu_device *smmu, =20 master =3D container_of(node, struct arm_smmu_master, node); =20 - if (dev_node < master->of_node) + if (dev < master->dev) node =3D node->rb_left; - else if (dev_node > master->of_node) + else if (dev > master->dev) node =3D node->rb_right; else return master; @@ -802,9 +816,9 @@ static int insert_smmu_master(struct arm_smmu_device *s= mmu, =3D container_of(*new, struct arm_smmu_master, node); =20 parent =3D *new; - if (master->of_node < this->of_node) + if (master->dev < this->dev) new =3D &((*new)->rb_left); - else if (master->of_node > this->of_node) + else if (master->dev > this->dev) new =3D &((*new)->rb_right); else return -EEXIST; @@ -823,18 +837,24 @@ static int arm_smmu_dt_add_device_legacy(struct arm_s= mmu_device *smmu, struct arm_smmu_master *master; struct device_node *dev_node =3D dev_get_dev_node(dev); =20 - master =3D find_smmu_master(smmu, dev_node); + master =3D find_smmu_master(smmu, dev); if (master) { dev_err(dev, "rejecting multiple registrations for master device %s\n", - dev_node->name); + dev_node ? dev_node->name : ""); return -EBUSY; } =20 master =3D devm_kzalloc(dev, sizeof(*master), GFP_KERNEL); if (!master) return -ENOMEM; - master->of_node =3D dev_node; + master->dev =3D dev; + + if ( device_is_protected(dev) ) + { + dev_err(dev, "Already added to SMMU\n"); + return -EEXIST; + } =20 /* Xen: Let Xen know that the device is protected by an SMMU */ device_set_protected(dev); @@ -844,7 +864,7 @@ static int arm_smmu_dt_add_device_legacy(struct arm_smm= u_device *smmu, (fwspec->ids[i] >=3D smmu->num_mapping_groups)) { dev_err(dev, "stream ID for master device %s greater than maximum allowed (%d)\n", - dev_node->name, smmu->num_mapping_groups); + dev_node ? dev_node->name : "", smmu->num_mapping_groups); return -ERANGE; } master->cfg.smendx[i] =3D INVALID_SMENDX; @@ -880,6 +900,21 @@ static int arm_smmu_dt_add_device_generic(u8 devfn, st= ruct device *dev) struct arm_smmu_device *smmu; struct iommu_fwspec *fwspec; =20 +#ifdef CONFIG_HAS_PCI + if ( dev_is_pci(dev) ) + { + struct pci_dev *pdev =3D dev_to_pci(dev); + int ret; + + if ( devfn !=3D pdev->devfn ) + return 0; + + ret =3D iommu_add_pci_sideband_ids(pdev); + if ( ret < 0 ) + iommu_fwspec_free(dev); + } +#endif + fwspec =3D dev_iommu_fwspec_get(dev); if (fwspec =3D=3D NULL) return -ENXIO; @@ -911,11 +946,10 @@ static struct arm_smmu_device *find_smmu_for_device(s= truct device *dev) { struct arm_smmu_device *smmu; struct arm_smmu_master *master =3D NULL; - struct device_node *dev_node =3D dev_get_dev_node(dev); =20 spin_lock(&arm_smmu_devices_lock); list_for_each_entry(smmu, &arm_smmu_devices, list) { - master =3D find_smmu_master(smmu, dev_node); + master =3D find_smmu_master(smmu, dev); if (master) break; } @@ -2007,6 +2041,7 @@ static bool arm_smmu_capable(enum iommu_cap cap) } #endif =20 +#if 0 /* Not used */ static int __arm_smmu_get_pci_sid(struct pci_dev *pdev, u16 alias, void *d= ata) { *((u16 *)data) =3D alias; @@ -2017,6 +2052,7 @@ static void __arm_smmu_release_pci_iommudata(void *da= ta) { kfree(data); } +#endif =20 static int arm_smmu_add_device(struct device *dev) { @@ -2024,12 +2060,13 @@ static int arm_smmu_add_device(struct device *dev) struct arm_smmu_master_cfg *cfg; struct iommu_group *group; void (*releasefn)(void *) =3D NULL; - int ret; =20 smmu =3D find_smmu_for_device(dev); if (!smmu) return -ENODEV; =20 + /* There is no need to distinguish here, thanks to PCI-IOMMU DT bindings = */ +#if 0 if (dev_is_pci(dev)) { struct pci_dev *pdev =3D to_pci_dev(dev); struct iommu_fwspec *fwspec; @@ -2054,10 +2091,12 @@ static int arm_smmu_add_device(struct device *dev) &fwspec->ids[0]); releasefn =3D __arm_smmu_release_pci_iommudata; cfg->smmu =3D smmu; - } else { + } else +#endif + { struct arm_smmu_master *master; =20 - master =3D find_smmu_master(smmu, dev->of_node); + master =3D find_smmu_master(smmu, dev); if (!master) { return -ENODEV; } @@ -2725,6 +2764,27 @@ static int arm_smmu_assign_dev(struct domain *d, u8 = devfn, return -ENOMEM; } =20 +#ifdef CONFIG_HAS_PCI + if ( dev_is_pci(dev) && !is_hardware_domain(d) ) + { + struct pci_dev *pdev =3D dev_to_pci(dev); + + printk(XENLOG_INFO "Assigning device %04x:%02x:%02x.%u to dom%d\n", + pdev->seg, pdev->bus, PCI_SLOT(devfn), PCI_FUNC(devfn), + d->domain_id); + + if ( devfn !=3D pdev->devfn || pdev->domain =3D=3D d ) + return 0; + + list_move(&pdev->domain_list, &d->pdev_list); + pdev->domain =3D d; + + /* dom_io is used as a sentinel for quarantined devices */ + if ( d =3D=3D dom_io ) + return 0; + } +#endif + if (!dev_iommu_group(dev)) { ret =3D arm_smmu_add_device(dev); if (ret) @@ -2774,11 +2834,29 @@ out: return ret; } =20 -static int arm_smmu_deassign_dev(struct domain *d, struct device *dev) +static int arm_smmu_deassign_dev(struct domain *d, u8 devfn, struct device= *dev) { struct iommu_domain *domain =3D dev_iommu_domain(dev); struct arm_smmu_xen_domain *xen_domain; =20 +#ifdef CONFIG_HAS_PCI + if ( dev_is_pci(dev) ) + { + struct pci_dev *pdev =3D dev_to_pci(dev); + + printk(XENLOG_INFO "Deassigning device %04x:%02x:%02x.%u from dom%d\n", + pdev->seg, pdev->bus, PCI_SLOT(devfn), PCI_FUNC(devfn), + d->domain_id); + + if ( devfn !=3D pdev->devfn ) + return 0; + + /* dom_io is used as a sentinel for quarantined devices */ + if ( d =3D=3D dom_io ) + return 0; + } +#endif + xen_domain =3D dom_iommu(d)->arch.priv; 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helo=lists.xenproject.org; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Stewart Hildebrand To: CC: Rahul Singh , Bertrand Marquis , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Stewart Hildebrand Subject: [PATCH v4 7/7] xen/arm: smmuv3: Add PCI devices support for SMMUv3 Date: Tue, 6 Jun 2023 23:02:20 -0400 Message-ID: <20230607030220.22698-8-stewart.hildebrand@amd.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230607030220.22698-1-stewart.hildebrand@amd.com> References: <20230607030220.22698-1-stewart.hildebrand@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000042AB:EE_|IA0PR12MB8280:EE_ X-MS-Office365-Filtering-Correlation-Id: 250657cf-1483-4a7b-4f46-08db67046fae X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jun 2023 03:08:15.2719 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 250657cf-1483-4a7b-4f46-08db67046fae X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000042AB.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB8280 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1686107333641100001 Content-Type: text/plain; charset="utf-8" From: Rahul Singh Signed-off-by: Rahul Singh Signed-off-by: Stewart Hildebrand --- v3->v4: * no change v2->v3: * rebase * invoke iommu_add_pci_sideband_ids() from add_device hook v1->v2: * ignore add_device/assign_device/reassign_device calls for phantom functio= ns (i.e. devfn !=3D pdev->devfn) downstream->v1: * rebase * move 2 replacements of s/dt_device_set_protected(dev_to_dt(dev))/device_s= et_protected(dev)/ from this commit to ("xen/arm: Move is_protected flag to struct device") so as to not break ability to bisect * adjust patch title (remove stray space) * arm_smmu_(de)assign_dev: return error instead of crashing system * remove arm_smmu_remove_device() stub * update condition in arm_smmu_reassign_dev * style fixup (cherry picked from commit 7ed6c3ab250d899fe6e893a514278e406a2893e8 from the downstream branch poc/pci-passthrough from https://gitlab.com/xen-project/people/bmarquis/xen-arm-poc.git) --- This is a file imported from Linux with modifications for Xen. What should = be the coding style used for Xen modifications? --- xen/drivers/passthrough/arm/smmu-v3.c | 76 +++++++++++++++++++++++++-- 1 file changed, 72 insertions(+), 4 deletions(-) diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthroug= h/arm/smmu-v3.c index 8842db1ec07e..427946e68f9d 100644 --- a/xen/drivers/passthrough/arm/smmu-v3.c +++ b/xen/drivers/passthrough/arm/smmu-v3.c @@ -1469,14 +1469,32 @@ static bool arm_smmu_sid_in_range(struct arm_smmu_d= evice *smmu, u32 sid) } /* Forward declaration */ static struct arm_smmu_device *arm_smmu_get_by_dev(const struct device *de= v); +static int arm_smmu_assign_dev(struct domain *d, u8 devfn, + struct device *dev, u32 flag); =20 static int arm_smmu_add_device(u8 devfn, struct device *dev) { int i, ret; struct arm_smmu_device *smmu; struct arm_smmu_master *master; - struct iommu_fwspec *fwspec =3D dev_iommu_fwspec_get(dev); + struct iommu_fwspec *fwspec; + +#ifdef CONFIG_HAS_PCI + if ( dev_is_pci(dev) ) + { + struct pci_dev *pdev =3D dev_to_pci(dev); + int ret; + + if ( devfn !=3D pdev->devfn ) + return 0; + + ret =3D iommu_add_pci_sideband_ids(pdev); + if ( ret < 0 ) + iommu_fwspec_free(dev); + } +#endif =20 + fwspec =3D dev_iommu_fwspec_get(dev); if (!fwspec) return -ENODEV; =20 @@ -1533,6 +1551,17 @@ static int arm_smmu_add_device(u8 devfn, struct devi= ce *dev) dev_info(dev, "Added master device (SMMUv3 %s StreamIds %u)\n", dev_name(fwspec->iommu_dev), fwspec->num_ids); =20 +#ifdef CONFIG_HAS_PCI + if ( dev_is_pci(dev) ) + { + struct pci_dev *pdev =3D dev_to_pci(dev); + + ret =3D arm_smmu_assign_dev(pdev->domain, devfn, dev, 0); + if (ret) + goto err_free_master; + } +#endif + return 0; =20 err_free_master: @@ -2622,6 +2651,27 @@ static int arm_smmu_assign_dev(struct domain *d, u8 = devfn, struct arm_smmu_domain *smmu_domain; struct arm_smmu_xen_domain *xen_domain =3D dom_iommu(d)->arch.priv; =20 +#ifdef CONFIG_HAS_PCI + if ( dev_is_pci(dev) && !is_hardware_domain(d) ) + { + struct pci_dev *pdev =3D dev_to_pci(dev); + + printk(XENLOG_INFO "Assigning device %04x:%02x:%02x.%u to dom%d\n", + pdev->seg, pdev->bus, PCI_SLOT(devfn), + PCI_FUNC(devfn), d->domain_id); + + if ( devfn !=3D pdev->devfn || pdev->domain =3D=3D d ) + return 0; + + list_move(&pdev->domain_list, &d->pdev_list); + pdev->domain =3D d; + + /* dom_io is used as a sentinel for quarantined devices */ + if ( d =3D=3D dom_io ) + return 0; + } +#endif + spin_lock(&xen_domain->lock); =20 /* @@ -2655,7 +2705,7 @@ out: return ret; } =20 -static int arm_smmu_deassign_dev(struct domain *d, struct device *dev) +static int arm_smmu_deassign_dev(struct domain *d, uint8_t devfn, struct d= evice *dev) { struct iommu_domain *io_domain =3D arm_smmu_get_domain(d, dev); struct arm_smmu_xen_domain *xen_domain =3D dom_iommu(d)->arch.priv; @@ -2667,6 +2717,24 @@ static int arm_smmu_deassign_dev(struct domain *d, s= truct device *dev) return -ESRCH; } =20 +#ifdef CONFIG_HAS_PCI + if ( dev_is_pci(dev) ) + { + struct pci_dev *pdev =3D dev_to_pci(dev); + + printk(XENLOG_INFO "Deassigning device %04x:%02x:%02x.%u from dom%d\n", + pdev->seg, pdev->bus, PCI_SLOT(devfn), + PCI_FUNC(devfn), d->domain_id); + + if ( devfn !=3D pdev->devfn ) + return 0; + + /* dom_io is used as a sentinel for quarantined devices */ + if ( d =3D=3D dom_io ) + return 0; + } +#endif + spin_lock(&xen_domain->lock); =20 arm_smmu_detach_dev(master); @@ -2686,13 +2754,13 @@ static int arm_smmu_reassign_dev(struct domain *s, = struct domain *t, int ret =3D 0; =20 /* Don't allow remapping on other domain than hwdom */ - if ( t && !is_hardware_domain(t) ) + if ( t && !is_hardware_domain(t) && (t !=3D dom_io) ) return -EPERM; =20 if (t =3D=3D s) return 0; =20 - ret =3D arm_smmu_deassign_dev(s, dev); + ret =3D arm_smmu_deassign_dev(s, devfn, dev); if (ret) return ret; =20 --=20 2.40.1