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d="scan'208";a="109294592" From: Andrew Cooper To: Xen-devel CC: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu Subject: [PATCH 1/4] x86/spec-ctrl: Rename retpoline_safe() to retpoline_calculations() Date: Fri, 26 May 2023 12:06:52 +0100 Message-ID: <20230526110656.4018711-2-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230526110656.4018711-1-andrew.cooper3@citrix.com> References: <20230526110656.4018711-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1685099283895100005 This is prep work, split out to simply the diff on the following change. * Rename to retpoline_calculations(), and call unconditionally. It is shortly going to synthesize missing enumerations required for guest safe= ty. * For Broadwell, store the ucode revision calculation in a variable and fa= ll out of the bottom of the switch statement. No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Wei Liu --- xen/arch/x86/spec_ctrl.c | 30 ++++++++++++++++++++---------- 1 file changed, 20 insertions(+), 10 deletions(-) diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c index 50d467f74cf8..0774d40627dd 100644 --- a/xen/arch/x86/spec_ctrl.c +++ b/xen/arch/x86/spec_ctrl.c @@ -579,9 +579,10 @@ static bool __init check_smt_enabled(void) } =20 /* Calculate whether Retpoline is known-safe on this CPU. */ -static bool __init retpoline_safe(void) +static bool __init retpoline_calculations(void) { unsigned int ucode_rev =3D this_cpu(cpu_sig).rev; + bool safe =3D false; =20 if ( boot_cpu_data.x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) return true; @@ -626,18 +627,18 @@ static bool __init retpoline_safe(void) * versions. */ case 0x3d: /* Broadwell */ - return ucode_rev >=3D 0x2a; + safe =3D ucode_rev >=3D 0x2a; break; case 0x47: /* Broadwell H */ - return ucode_rev >=3D 0x1d; + safe =3D ucode_rev >=3D 0x1d; break; case 0x4f: /* Broadwell EP/EX */ - return ucode_rev >=3D 0xb000021; + safe =3D ucode_rev >=3D 0xb000021; break; case 0x56: /* Broadwell D */ switch ( boot_cpu_data.x86_mask ) { - case 2: return ucode_rev >=3D 0x15; - case 3: return ucode_rev >=3D 0x7000012; - case 4: return ucode_rev >=3D 0xf000011; - case 5: return ucode_rev >=3D 0xe000009; + case 2: safe =3D ucode_rev >=3D 0x15; break; + case 3: safe =3D ucode_rev >=3D 0x7000012; break; + case 4: safe =3D ucode_rev >=3D 0xf000011; break; + case 5: safe =3D ucode_rev >=3D 0xe000009; break; default: printk("Unrecognised CPU stepping %#x - assuming not reptpolin= e safe\n", boot_cpu_data.x86_mask); @@ -681,6 +682,12 @@ static bool __init retpoline_safe(void) boot_cpu_data.x86_model); return false; } + + /* Only Broadwell gets here. */ + if ( safe ) + return true; + + return false; } =20 /* @@ -1113,7 +1120,7 @@ void __init init_speculation_mitigations(void) { enum ind_thunk thunk =3D THUNK_DEFAULT; bool has_spec_ctrl, ibrs =3D false, hw_smt_enabled; - bool cpu_has_bug_taa; + bool cpu_has_bug_taa, retpoline_safe; =20 hw_smt_enabled =3D check_smt_enabled(); =20 @@ -1139,6 +1146,9 @@ void __init init_speculation_mitigations(void) thunk =3D THUNK_JMP; } =20 + /* Determine if retpoline is safe on this CPU. */ + retpoline_safe =3D retpoline_calculations(); + /* * Has the user specified any custom BTI mitigations? If so, follow t= heir * instructions exactly and disable all heuristics. @@ -1160,7 +1170,7 @@ void __init init_speculation_mitigations(void) * On all hardware, we'd like to use retpoline in preference to * IBRS, but only if it is safe on this hardware. */ - if ( retpoline_safe() ) + if ( retpoline_safe ) thunk =3D THUNK_RETPOLINE; else if ( has_spec_ctrl ) ibrs =3D true; --=20 2.30.2