> On 23 May 2023, at 08:43, Luca Fancellu <Luca.Fancellu@arm.com> wrote:
>
> This serie is introducing the possibility for Dom0 and DomU guests to use
> sve/sve2 instructions.
>
> SVE feature introduces new instruction and registers to improve performances on
> floating point operations.
>
> The SVE feature is advertised using the ID_AA64PFR0_EL1 register, SVE field, and
> when available the ID_AA64ZFR0_EL1 register provides additional information
> about the implemented version and other SVE feature.
>
> New registers added by the SVE feature are Z0-Z31, P0-P15, FFR, ZCR_ELx.
>
> Z0-Z31 are scalable vector register whose size is implementation defined and
> goes from 128 bits to maximum 2048, the term vector length will be used to refer
> to this quantity.
> P0-P15 are predicate registers and the size is the vector length divided by 8,
> same size is the FFR (First Fault Register).
> ZCR_ELx is a register that can control and restrict the maximum vector length
> used by the <x> exception level and all the lower exception levels, so for
> example EL3 can restrict the vector length usable by EL3,2,1,0.
>
> The platform has a maximum implemented vector length, so for every value
> written in ZCR register, if this value is above the implemented length, then the
> lower value will be used. The RDVL instruction can be used to check what vector
> length is the HW using after setting ZCR.
>
> For an SVE guest, the V0-V31 registers are part of the Z0-Z31, so there is no
> need to save them separately, saving Z0-Z31 will save implicitly also V0-V31.
>
> SVE usage can be trapped using a flag in CPTR_EL2, hence in this serie the
> register is added to the domain state, to be able to trap only the guests that
> are not allowed to use SVE.
>
> This serie is introducing a command line parameter to enable Dom0 to use SVE and
> to set its maximum vector length that by default is 0 which means the guest is
> not allowed to use SVE. Values from 128 to 2048 mean the guest can use SVE with
> the selected value used as maximum allowed vector length (which could be lower
> if the implemented one is lower).
> For DomUs, an XL parameter with the same way of use is introduced and a dom0less
> DTB binding is created.
>
> The context switch is the most critical part because there can be big registers
> to be saved, in this serie an easy approach is used and the context is
> saved/restored every time for the guests that are allowed to use SVE.
>
> Luca Fancellu (12):
> xen/arm: enable SVE extension for Xen
> xen/arm: add SVE vector length field to the domain
> xen/arm: Expose SVE feature to the guest
> xen/arm: add SVE exception class handling
> arm/sve: save/restore SVE context switch
> xen/common: add dom0 xen command line argument for Arm
> xen: enable Dom0 to use SVE feature
> xen/physinfo: encode Arm SVE vector length in arch_capabilities
> tools: add physinfo arch_capabilities handling for Arm
> xen/tools: add sve parameter in XL configuration
> xen/arm: add sve property for dom0less domUs
> xen/changelog: Add SVE and "dom0" options to the changelog for Arm
>
> CHANGELOG.md | 3 +
> SUPPORT.md | 6 +
> docs/man/xl.cfg.5.pod.in | 16 ++
> docs/misc/arm/device-tree/booting.txt | 16 ++
> docs/misc/xen-command-line.pandoc | 20 +-
> tools/golang/xenlight/helpers.gen.go | 4 +
> tools/golang/xenlight/types.gen.go | 24 +++
> tools/include/libxl.h | 11 +
> .../include/xen-tools/arm-arch-capabilities.h | 28 +++
> tools/include/xen-tools/common-macros.h | 2 +
> tools/libs/light/libxl.c | 1 +
> tools/libs/light/libxl_arm.c | 33 +++
> tools/libs/light/libxl_internal.h | 1 -
> tools/libs/light/libxl_types.idl | 23 +++
> tools/ocaml/libs/xc/xenctrl.ml | 4 +-
> tools/ocaml/libs/xc/xenctrl.mli | 4 +-
> tools/ocaml/libs/xc/xenctrl_stubs.c | 8 +-
> tools/python/xen/lowlevel/xc/xc.c | 8 +-
> tools/xl/xl_info.c | 8 +
> tools/xl/xl_parse.c | 8 +
> xen/arch/arm/Kconfig | 10 +-
> xen/arch/arm/README.LinuxPrimitives | 11 +
> xen/arch/arm/arm64/Makefile | 1 +
> xen/arch/arm/arm64/cpufeature.c | 7 +-
> xen/arch/arm/arm64/domctl.c | 4 +
> xen/arch/arm/arm64/sve-asm.S | 195 ++++++++++++++++++
> xen/arch/arm/arm64/sve.c | 182 ++++++++++++++++
> xen/arch/arm/arm64/vfp.c | 79 ++++---
> xen/arch/arm/arm64/vsysreg.c | 41 +++-
> xen/arch/arm/cpufeature.c | 6 +-
> xen/arch/arm/domain.c | 55 ++++-
> xen/arch/arm/domain_build.c | 66 ++++++
> xen/arch/arm/include/asm/arm64/sve.h | 72 +++++++
> xen/arch/arm/include/asm/arm64/sysregs.h | 4 +
> xen/arch/arm/include/asm/arm64/vfp.h | 12 ++
> xen/arch/arm/include/asm/cpufeature.h | 14 ++
> xen/arch/arm/include/asm/domain.h | 8 +
> xen/arch/arm/include/asm/processor.h | 3 +
> xen/arch/arm/setup.c | 5 +-
> xen/arch/arm/sysctl.c | 4 +
> xen/arch/arm/traps.c | 36 +++-
> xen/arch/x86/dom0_build.c | 48 ++---
> xen/common/domain.c | 23 +++
> xen/common/kernel.c | 28 +++
> xen/include/public/arch-arm.h | 2 +
> xen/include/public/sysctl.h | 4 +
> xen/include/xen/domain.h | 1 +
> xen/include/xen/lib.h | 10 +
> 48 files changed, 1052 insertions(+), 107 deletions(-)
> create mode 100644 tools/include/xen-tools/arm-arch-capabilities.h
> create mode 100644 xen/arch/arm/arm64/sve-asm.S
> create mode 100644 xen/arch/arm/arm64/sve.c
> create mode 100644 xen/arch/arm/include/asm/arm64/sve.h
Hi All,
I received some r-by for this serie dependent on some fix, so I will wait until next
week for further comments and then I will push the series with the fixes and with
the tags to ease the committers work
>
> --
> 2.34.1
>
>