From nobody Tue Feb 10 01:59:16 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=linutronix.de ARC-Seal: i=1; a=rsa-sha256; t=1683575066; cv=none; d=zohomail.com; s=zohoarc; b=Yogk892/qDbnOFpvVcLK2kWCqGCQX3raAABE/QmSuiNXW+UVTU+bkK/PpHYk/cb7rMwAmII/26+7YQdh1GOGzZKKuc8yLe3LHcwRbtRhowT8qrhcpG0lif9EKuOxB+dcMSqWvxFeFS/lY+W9iF1dS+jhfHGQGvM3WivTAMVhbD8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1683575066; h=Content-Type:Cc:Date:From:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=l2ZAdiTSxc4Ph8TyhAnDuEUhjcNUoY+vPQjmK9rgSOw=; b=GDcCQyw4rltJH6oj8W6A0aYS69kB0HSM5zMjzeMvm5BdaPISj7esfFx8h1cBLaaV/Eh/Hft1jA6+LnJ9HT350NSCfURnAWXmrxgFCRufG/NN/mR4VZmXofMd/mSKKUUGS0xl2LvQ4vfpOc3uu+tKDZ8ELNm6UNETOpIlQ0DsE+Y= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1683575066322193.4764012913197; Mon, 8 May 2023 12:44:26 -0700 (PDT) Received: from list by lists.xenproject.org with outflank-mailman.531751.827582 (Exim 4.92) (envelope-from ) id 1pw6lr-0006V7-HB; Mon, 08 May 2023 19:43:43 +0000 Received: by outflank-mailman (output) from mailman id 531751.827582; Mon, 08 May 2023 19:43:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pw6lr-0006Uv-Bm; Mon, 08 May 2023 19:43:43 +0000 Received: by outflank-mailman (input) for mailman id 531751; Mon, 08 May 2023 19:43:42 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pw6lq-0004GB-Gf for xen-devel@lists.xenproject.org; Mon, 08 May 2023 19:43:42 +0000 Received: from galois.linutronix.de (galois.linutronix.de [193.142.43.55]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id a2c93318-edd8-11ed-b226-6b7b168915f2; Mon, 08 May 2023 21:43:41 +0200 (CEST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: a2c93318-edd8-11ed-b226-6b7b168915f2 Message-ID: <20230508185217.725507622@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1683575021; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=l2ZAdiTSxc4Ph8TyhAnDuEUhjcNUoY+vPQjmK9rgSOw=; b=gaT1OuAZ/GfjuakxTEJ2KYFHHzuQGSX55lDDjTfN7H14JbYbNLMM4m5KEMtJmbQjf5dGd8 u6xaJZJ4RDdDY8AEhdNSWuCFNXk+TTJsi8/yzR94kBccocw9u25EGL8O6o4TOYanqr+EXt NhIFRD+lDCv3rQ1zF9CsAlmwrDH3WUd0arfpWQUXnSr9BmI2oikrsACB3KufetuUHeTXx6 Dfmr70iicTai9wWJcUCYXfrT+e3fQNAy7f7bAiHZh1hN8Pw4PKOZApdT4wEEG7OYby4pO/ J0L7EIGZ0mmjG5HI8U9pfnUs9mQdXGK6TXfo6ya7SFw/bbUl1OddNzvQqalhdg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1683575021; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=l2ZAdiTSxc4Ph8TyhAnDuEUhjcNUoY+vPQjmK9rgSOw=; b=DHa8pWb6DR3SZOX4vG2QWSchsl3pME0lzD5CYQrhDWXg/TvCY5mWEc+2tWrjc+r9aOnyjo ukEASnIuuQDnS6AQ== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, David Woodhouse , Andrew Cooper , Brian Gerst , Arjan van de Veen , Paolo Bonzini , Paul McKenney , Tom Lendacky , Sean Christopherson , Oleksandr Natalenko , Paul Menzel , "Guilherme G. Piccoli" , Piotr Gorski , Usama Arif , Juergen Gross , Boris Ostrovsky , xen-devel@lists.xenproject.org, Russell King , Arnd Bergmann , linux-arm-kernel@lists.infradead.org, Catalin Marinas , Will Deacon , Guo Ren , linux-csky@vger.kernel.org, Thomas Bogendoerfer , linux-mips@vger.kernel.org, "James E.J. Bottomley" , Helge Deller , linux-parisc@vger.kernel.org, Paul Walmsley , Palmer Dabbelt , linux-riscv@lists.infradead.org, Mark Rutland , Sabin Rapan , "Michael Kelley (LINUX)" Subject: [patch v3 09/36] x86/smpboot: Get rid of cpu_init_secondary() References: <20230508181633.089804905@linutronix.de> MIME-Version: 1.0 Date: Mon, 8 May 2023 21:43:41 +0200 (CEST) X-ZohoMail-DKIM: pass (identity @linutronix.de) X-ZM-MESSAGEID: 1683575066705100005 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Thomas Gleixner The synchronization of the AP with the control CPU is a SMP boot problem and has nothing to do with cpu_init(). Open code cpu_init_secondary() in start_secondary() and move wait_for_master_cpu() into the SMP boot code. No functional change. Signed-off-by: Thomas Gleixner Tested-by: Michael Kelley --- arch/x86/include/asm/processor.h | 1 - arch/x86/kernel/cpu/common.c | 27 --------------------------- arch/x86/kernel/smpboot.c | 24 +++++++++++++++++++----- 3 files changed, 19 insertions(+), 33 deletions(-) --- --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -551,7 +551,6 @@ extern void switch_gdt_and_percpu_base(i extern void load_direct_gdt(int); extern void load_fixmap_gdt(int); extern void cpu_init(void); -extern void cpu_init_secondary(void); extern void cpu_init_exception_handling(void); extern void cr4_init(void); =20 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -2123,19 +2123,6 @@ static void dbg_restore_debug_regs(void) #define dbg_restore_debug_regs() #endif /* ! CONFIG_KGDB */ =20 -static void wait_for_master_cpu(int cpu) -{ -#ifdef CONFIG_SMP - /* - * wait for ACK from master CPU before continuing - * with AP initialization - */ - WARN_ON(cpumask_test_and_set_cpu(cpu, cpu_initialized_mask)); - while (!cpumask_test_cpu(cpu, cpu_callout_mask)) - cpu_relax(); -#endif -} - static inline void setup_getcpu(int cpu) { unsigned long cpudata =3D vdso_encode_cpunode(cpu, early_cpu_to_node(cpu)= ); @@ -2239,8 +2226,6 @@ void cpu_init(void) struct task_struct *cur =3D current; int cpu =3D raw_smp_processor_id(); =20 - wait_for_master_cpu(cpu); - ucode_cpu_init(cpu); =20 #ifdef CONFIG_NUMA @@ -2293,18 +2278,6 @@ void cpu_init(void) load_fixmap_gdt(cpu); } =20 -#ifdef CONFIG_SMP -void cpu_init_secondary(void) -{ - /* - * Relies on the BP having set-up the IDT tables, which are loaded - * on this CPU in cpu_init_exception_handling(). - */ - cpu_init_exception_handling(); - cpu_init(); -} -#endif - #ifdef CONFIG_MICROCODE_LATE_LOADING /** * store_cpu_caps() - Store a snapshot of CPU capabilities --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -220,6 +220,17 @@ static void ap_calibrate_delay(void) cpu_data(smp_processor_id()).loops_per_jiffy =3D loops_per_jiffy; } =20 +static void wait_for_master_cpu(int cpu) +{ + /* + * Wait for release by control CPU before continuing with AP + * initialization. + */ + WARN_ON(cpumask_test_and_set_cpu(cpu, cpu_initialized_mask)); + while (!cpumask_test_cpu(cpu, cpu_callout_mask)) + cpu_relax(); +} + /* * Activate a secondary processor. */ @@ -237,13 +248,16 @@ static void notrace start_secondary(void load_cr3(swapper_pg_dir); __flush_tlb_all(); #endif + cpu_init_exception_handling(); + /* - * Sync point with wait_cpu_initialized(). Before proceeding through - * cpu_init(), the AP will call wait_for_master_cpu() which sets its - * own bit in cpu_initialized_mask and then waits for the BSP to set - * its bit in cpu_callout_mask to release it. + * Sync point with wait_cpu_initialized(). Sets AP in + * cpu_initialized_mask and then waits for the control CPU + * to release it. */ - cpu_init_secondary(); + wait_for_master_cpu(raw_smp_processor_id()); + + cpu_init(); rcu_cpu_starting(raw_smp_processor_id()); x86_cpuinit.early_percpu_clock_init();