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d="scan'208";a="108238672" From: Andrew Cooper To: Xen-devel CC: Andrew Cooper , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Konrad Rzeszutek Wilk , Ross Lagerwall , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu Subject: [PATCH v2 2/3] arm/alternatives: Rename alt_instr fields which are used in common code Date: Mon, 17 Apr 2023 13:13:56 +0100 Message-ID: <20230417121357.3738919-3-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230417121357.3738919-1-andrew.cooper3@citrix.com> References: <20230417121357.3738919-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @citrix.com) X-ZM-MESSAGEID: 1681733692131100005 Alternatives auditing for livepatches is currently broken. To fix it, the livepatch code needs to inspect more fields of alt_instr. Rename ARM's fields to match x86's, because: * ARM already exposes alt_offset under the repl name via ALT_REPL_PTR() * "alt" is somewhat ambiguous in a structure entirely about alternatives already. * "repl", being the same number of character as orig leads to slightly nea= ter code. Signed-off-by: Andrew Cooper Reviewed-by: Stefano Stabellini --- CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Konrad Rzeszutek Wilk CC: Ross Lagerwall CC: Jan Beulich CC: Roger Pau Monn=C3=A9 CC: Wei Liu The other option is to make alt_instr an entirely common structure, but it's already different between ARM and x86 and I'm not sure the result of doing this would result in nicer code. --- xen/arch/arm/alternative.c | 6 +++--- xen/arch/arm/include/asm/alternative.h | 12 ++++++------ 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/xen/arch/arm/alternative.c b/xen/arch/arm/alternative.c index f00e3b9b3c11..7366af4ea646 100644 --- a/xen/arch/arm/alternative.c +++ b/xen/arch/arm/alternative.c @@ -44,7 +44,7 @@ static bool branch_insn_requires_update(const struct alt_= instr *alt, return true; =20 replptr =3D (unsigned long)ALT_REPL_PTR(alt); - if ( pc >=3D replptr && pc <=3D (replptr + alt->alt_len) ) + if ( pc >=3D replptr && pc <=3D (replptr + alt->repl_len) ) return false; =20 /* @@ -128,9 +128,9 @@ static int __apply_alternatives(const struct alt_region= *region, continue; =20 if ( alt->cpufeature =3D=3D ARM_CB_PATCH ) - BUG_ON(alt->alt_len !=3D 0); + BUG_ON(alt->repl_len !=3D 0); else - BUG_ON(alt->alt_len !=3D alt->orig_len); + BUG_ON(alt->repl_len !=3D alt->orig_len); =20 origptr =3D ALT_ORIG_PTR(alt); updptr =3D (void *)origptr + update_offset; diff --git a/xen/arch/arm/include/asm/alternative.h b/xen/arch/arm/include/= asm/alternative.h index 1eb4b60fbb3e..d3210e82f9e5 100644 --- a/xen/arch/arm/include/asm/alternative.h +++ b/xen/arch/arm/include/asm/alternative.h @@ -13,16 +13,16 @@ =20 struct alt_instr { s32 orig_offset; /* offset to original instruction */ - s32 alt_offset; /* offset to replacement instruction */ + s32 repl_offset; /* offset to replacement instruction */ u16 cpufeature; /* cpufeature bit set for replacement */ u8 orig_len; /* size of original instruction(s) */ - u8 alt_len; /* size of new instruction(s), <=3D orig_len */ + u8 repl_len; /* size of new instruction(s), <=3D orig_len */ }; =20 /* Xen: helpers used by common code. */ #define __ALT_PTR(a,f) ((void *)&(a)->f + (a)->f) #define ALT_ORIG_PTR(a) __ALT_PTR(a, orig_offset) -#define ALT_REPL_PTR(a) __ALT_PTR(a, alt_offset) +#define ALT_REPL_PTR(a) __ALT_PTR(a, repl_offset) =20 typedef void (*alternative_cb_t)(const struct alt_instr *alt, const uint32_t *origptr, uint32_t *updptr, @@ -90,12 +90,12 @@ int apply_alternatives(const struct alt_instr *start, c= onst struct alt_instr *en #include #include =20 -.macro altinstruction_entry orig_offset alt_offset feature orig_len alt_len +.macro altinstruction_entry orig_offset repl_offset feature orig_len repl_= len .word \orig_offset - . - .word \alt_offset - . + .word \repl_offset - . .hword \feature .byte \orig_len - .byte \alt_len + .byte \repl_len .endm =20 .macro alternative_insn insn1, insn2, cap, enable =3D 1 --=20 2.30.2