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[109.242.226.41]) by smtp.googlemail.com with ESMTPSA id f28-20020a50a6dc000000b004aaa6a948fcsm2366863edc.37.2023.02.06.04.58.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Feb 2023 04:58:16 -0800 (PST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: ece3a134-a61d-11ed-933c-83870f6b2ba8 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=1T2CcOk2cumlPijgcYdo5ZGfLn2kJ62SCoGf7/BdPyY=; b=fM2As6W25qg7X4CAszC6SnCcNzwX9qUo7GO7rX9H5tz+jwZZj2MIxkApmLB9cO/pSq JfoC/7qxCoFJMWpCsA8RvSU0vsbVLdjZrPhAyK0rCwzz/xqBr+OlCvaahakZQzXBhn5R 17ZYWefKlAUvmeS7tgW4BqvkCtmxob9tVwsYxsJbdfBeJC/QPbtUOLxFmFb00N05798+ YcrJsA/o652wClmtATTockxhGPnoEtkFaxL/iB09TAQ+JDvPo7UGZDwWhUNl5i60FPlL ZracdJ/lI5N5Bh/nMMng4MO5WTstULtJthTqwo6GHLjQcdnpbKb/lsdmn4BFOho4WwDs irSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=1T2CcOk2cumlPijgcYdo5ZGfLn2kJ62SCoGf7/BdPyY=; b=4RJX9RZ5lJ7epCYCbuUxXbDSN2e1nPpeUbLlMA+G5xRwRizEOVJpAsQDxVlthYVekf c7JUDJh08KJEs2OHZqLReEk0gfJFbpjUBgOuJI0ma8ps2nYlXCUUqw25tv7jMR1LESZi QBHRp9vm0VJJmOHhNJg16Of25VKrArV7GuUKxIuJ1E54e/t50Y1zlIVLyOhEqWZVHdu6 jzuVy4h/6G8I7Bd25D6Xa2qyyG7JRJoXgKeA28jFd0HdQT/X6S4zcNwyQ/Es1vuK304i QdU76yjFE9AeCs/mr+OXKEBfhMAnJV9rf7zyovgYmeY6uaXsTW535GLAjOWgWWoOOzzC UPvQ== X-Gm-Message-State: AO0yUKXIfaB4zi6D5cT3dp7X8XN+XOZ8MdDh4WXt4VHjHp+v+sH0JfRs 4zMHRnC4n9SuOneT8EEd/kniseNsKqA= X-Google-Smtp-Source: AK7set+hHizhlj6+S6dtoqoA1xCwlZZLznwm+66G//pcIbPGN2P3bhN6a0ucbrsYJ8s4IBqPX/jvcQ== X-Received: by 2002:a05:6402:1643:b0:492:8c77:7dad with SMTP id s3-20020a056402164300b004928c777dadmr19361094edx.8.1675688297196; Mon, 06 Feb 2023 04:58:17 -0800 (PST) From: Xenia Ragiadakou To: xen-devel@lists.xenproject.org Cc: Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu , Jun Nakajima , Kevin Tian Subject: [PATCH] x86/vlapic: call vmx_vlapic_msr_changed through an hvm_function callback Date: Mon, 6 Feb 2023 14:58:04 +0200 Message-Id: <20230206125804.950528-1-burzalodowa@gmail.com> X-Mailer: git-send-email 2.37.2 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1675688330440100001 APIC virtualization support is currently implemented only for Intel VT-x. To aid future work on separating AMD-V from Intel VT-x code, instead of calling directly vmx_vlapic_msr_changed() from common hvm code, add a stub to the hvm_function_table, named set_virtual_apic_mode (to match the name of the corresponding function in Linux for cross reference). Then, create a wrapper function, called hvm_set_virtual_apic_mode(), to be used by common hvm code. For Intel VT-x, initialize the stub only when either virtual xAPIC mode or virtual x2APIC mode is supported. After the change above, do not include header asm/hvm/vmx/vmx.h as it is not required anymore and resolve subsequent build errors for implicit declaration of functions =E2=80=98TRACE_2_LONG_3D=E2=80=99 and =E2=80=98TRC= _PAR_LONG=E2=80=99 by including missing asm/hvm/trace.h header. No functional change intended. Signed-off-by: Xenia Ragiadakou --- xen/arch/x86/hvm/vlapic.c | 6 +++--- xen/arch/x86/hvm/vmx/vmx.c | 4 ++++ xen/arch/x86/include/asm/hvm/hvm.h | 6 ++++++ 3 files changed, 13 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c index eb32f12e2d..34a7eea3a1 100644 --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -37,8 +37,8 @@ #include #include #include -#include #include +#include #include #include #include @@ -1165,7 +1165,7 @@ int guest_wrmsr_apic_base(struct vcpu *v, uint64_t va= lue) if ( vlapic_x2apic_mode(vlapic) ) set_x2apic_id(vlapic); =20 - vmx_vlapic_msr_changed(vlapic_vcpu(vlapic)); + hvm_set_virtual_apic_mode(vlapic_vcpu(vlapic)); =20 HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "apic base msr is 0x%016"PRIx64, vlapic->hw.apic_base_msr); @@ -1561,7 +1561,7 @@ static int cf_check lapic_load_hidden(struct domain *= d, hvm_domain_context_t *h) unlikely(vlapic_x2apic_mode(s)) ) return -EINVAL; =20 - vmx_vlapic_msr_changed(v); + hvm_set_virtual_apic_mode(v); =20 return 0; } diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 270bc98195..6138dc0885 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -3011,6 +3011,10 @@ const struct hvm_function_table * __init start_vmx(v= oid) setup_ept_dump(); } =20 + if ( cpu_has_vmx_virtualize_apic_accesses || + cpu_has_vmx_virtualize_x2apic_mode ) + vmx_function_table.set_virtual_apic_mode =3D vmx_vlapic_msr_change= d; + if ( cpu_has_vmx_virtual_intr_delivery ) { vmx_function_table.update_eoi_exit_bitmap =3D vmx_update_eoi_exit_= bitmap; diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/= hvm/hvm.h index 80e4565bd2..b690e2924c 100644 --- a/xen/arch/x86/include/asm/hvm/hvm.h +++ b/xen/arch/x86/include/asm/hvm/hvm.h @@ -217,6 +217,7 @@ struct hvm_function_table { void (*handle_eoi)(uint8_t vector, int isr); int (*pi_update_irte)(const struct vcpu *v, const struct pirq *pirq, uint8_t gvec); + void (*set_virtual_apic_mode)(struct vcpu *v); =20 /*Walk nested p2m */ int (*nhvm_hap_walk_L1_p2m)(struct vcpu *v, paddr_t L2_gpa, @@ -786,6 +787,11 @@ static inline int hvm_pi_update_irte(const struct vcpu= *v, return alternative_call(hvm_funcs.pi_update_irte, v, pirq, gvec); } =20 +static inline void hvm_set_virtual_apic_mode(struct vcpu *v) +{ + alternative_vcall(hvm_funcs.set_virtual_apic_mode, v); +} + #else /* CONFIG_HVM */ =20 #define hvm_enabled false --=20 2.37.2