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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Jan 2023 10:19:49.4647 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4624ba55-b80b-4220-6dc0-08dafebdb0df X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT049.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CO6PR12MB5491 X-ZohoMail-DKIM: pass (identity @amd.com) X-ZM-MESSAGEID: 1674642033969100001 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" 1. One should use 'PRIpaddr' to display 'paddr_t' variables. However, while creating nodes in fdt, the address (if present in the node name) should be represented using 'PRIx64'. This is to be in conformance with the following rule present in https://elinux.org/Device_Tree_Linux . node names "unit-address does not have leading zeros" As 'PRIpaddr' introduces leading zeros, we cannot use it. So, we have introduced a wrapper ie domain_fdt_begin_node() which will represent physical address using 'PRIx64'. 2. One should use 'PRIx64' to display 'u64' in hex format. The current use of 'PRIpaddr' for printing PTE is buggy as this is not a physical address. Signed-off-by: Ayan Kumar Halder Acked-by: Julien Grall Reviewed-by: Stefano Stabellini --- Changes from - v1 - 1. Moved the patch earlier. 2. Moved a part of change from "[XEN v1 8/9] xen/arm: Other adaptations req= uired to support 32bit paddr" into this patch. v2 - 1. Use PRIx64 for appending addresses to fdt node names. This fixes th= e CI failure. v3 - 1. Added a comment on top of domain_fdt_begin_node(). 2. Check for the return of snprintf() in domain_fdt_begin_node(). v4 - 1. Grammatical error fixes. xen/arch/arm/domain_build.c | 64 +++++++++++++++++++++++-------------- xen/arch/arm/gic-v2.c | 6 ++-- xen/arch/arm/mm.c | 2 +- 3 files changed, 44 insertions(+), 28 deletions(-) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index c2b97fa21e..a798e0b256 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -1288,6 +1288,39 @@ static int __init fdt_property_interrupts(const stru= ct kernel_info *kinfo, return res; } =20 +/* + * Wrapper to convert physical address from paddr_t to uint64_t and + * invoke fdt_begin_node(). This is required as the physical address + * provided as part of node name should not contain any leading + * zeroes. Thus, one should use PRIx64 (instead of PRIpaddr) to append + * unit (which contains the physical address) with name to generate a + * node name. + */ +static int __init domain_fdt_begin_node(void *fdt, const char *name, + uint64_t unit) +{ + /* + * The size of the buffer to hold the longest possible string (i.e. + * interrupt-controller@ + a 64-bit number + \0). + */ + char buf[38]; + int ret; + + /* ePAPR 3.4 */ + ret =3D snprintf(buf, sizeof(buf), "%s@%"PRIx64, name, unit); + + if ( ret >=3D sizeof(buf) ) + { + printk(XENLOG_ERR + "Insufficient buffer. Minimum size required is %d\n", + (ret + 1)); + + return -FDT_ERR_TRUNCATED; + } + + return fdt_begin_node(fdt, buf); +} + static int __init make_memory_node(const struct domain *d, void *fdt, int addrcells, int sizecells, @@ -1296,8 +1329,6 @@ static int __init make_memory_node(const struct domai= n *d, unsigned int i; int res, reg_size =3D addrcells + sizecells; int nr_cells =3D 0; - /* Placeholder for memory@ + a 64-bit number + \0 */ - char buf[24]; __be32 reg[NR_MEM_BANKS * 4 /* Worst case addrcells + sizecells */]; __be32 *cells; =20 @@ -1314,9 +1345,7 @@ static int __init make_memory_node(const struct domai= n *d, =20 dt_dprintk("Create memory node\n"); =20 - /* ePAPR 3.4 */ - snprintf(buf, sizeof(buf), "memory@%"PRIx64, mem->bank[i].start); - res =3D fdt_begin_node(fdt, buf); + res =3D domain_fdt_begin_node(fdt, "memory", mem->bank[i].start); if ( res ) return res; =20 @@ -1375,16 +1404,13 @@ static int __init make_shm_memory_node(const struct= domain *d, { uint64_t start =3D mem->bank[i].start; uint64_t size =3D mem->bank[i].size; - /* Placeholder for xen-shmem@ + a 64-bit number + \0 */ - char buf[27]; const char compat[] =3D "xen,shared-memory-v1"; /* Worst case addrcells + sizecells */ __be32 reg[GUEST_ROOT_ADDRESS_CELLS + GUEST_ROOT_SIZE_CELLS]; __be32 *cells; unsigned int len =3D (addrcells + sizecells) * sizeof(__be32); =20 - snprintf(buf, sizeof(buf), "xen-shmem@%"PRIx64, mem->bank[i].start= ); - res =3D fdt_begin_node(fdt, buf); + res =3D domain_fdt_begin_node(fdt, "xen-shmem", mem->bank[i].start= ); if ( res ) return res; =20 @@ -2716,12 +2742,9 @@ static int __init make_gicv2_domU_node(struct kernel= _info *kinfo) __be32 reg[(GUEST_ROOT_ADDRESS_CELLS + GUEST_ROOT_SIZE_CELLS) * 2]; __be32 *cells; const struct domain *d =3D kinfo->d; - /* Placeholder for interrupt-controller@ + a 64-bit number + \0 */ - char buf[38]; =20 - snprintf(buf, sizeof(buf), "interrupt-controller@%"PRIx64, - vgic_dist_base(&d->arch.vgic)); - res =3D fdt_begin_node(fdt, buf); + res =3D domain_fdt_begin_node(fdt, "interrupt-controller", + vgic_dist_base(&d->arch.vgic)); if ( res ) return res; =20 @@ -2771,14 +2794,10 @@ static int __init make_gicv3_domU_node(struct kerne= l_info *kinfo) int res =3D 0; __be32 *reg, *cells; const struct domain *d =3D kinfo->d; - /* Placeholder for interrupt-controller@ + a 64-bit number + \0 */ - char buf[38]; unsigned int i, len =3D 0; =20 - snprintf(buf, sizeof(buf), "interrupt-controller@%"PRIx64, - vgic_dist_base(&d->arch.vgic)); - - res =3D fdt_begin_node(fdt, buf); + res =3D domain_fdt_begin_node(fdt, "interrupt-controller", + vgic_dist_base(&d->arch.vgic)); if ( res ) return res; =20 @@ -2858,11 +2877,8 @@ static int __init make_vpl011_uart_node(struct kerne= l_info *kinfo) __be32 reg[GUEST_ROOT_ADDRESS_CELLS + GUEST_ROOT_SIZE_CELLS]; __be32 *cells; struct domain *d =3D kinfo->d; - /* Placeholder for sbsa-uart@ + a 64-bit number + \0 */ - char buf[27]; =20 - snprintf(buf, sizeof(buf), "sbsa-uart@%"PRIx64, d->arch.vpl011.base_ad= dr); - res =3D fdt_begin_node(fdt, buf); + res =3D domain_fdt_begin_node(fdt, "sbsa-uart", d->arch.vpl011.base_ad= dr); if ( res ) return res; =20 diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c index 61802839cb..5d4d298b86 100644 --- a/xen/arch/arm/gic-v2.c +++ b/xen/arch/arm/gic-v2.c @@ -1049,7 +1049,7 @@ static void __init gicv2_dt_init(void) if ( csize < SZ_8K ) { printk(XENLOG_WARNING "GICv2: WARNING: " - "The GICC size is too small: %#"PRIx64" expected %#x\n", + "The GICC size is too small: %#"PRIpaddr" expected %#x\n", csize, SZ_8K); if ( platform_has_quirk(PLATFORM_QUIRK_GIC_64K_STRIDE) ) { @@ -1280,11 +1280,11 @@ static int __init gicv2_init(void) gicv2.map_cbase +=3D aliased_offset; =20 printk(XENLOG_WARNING - "GICv2: Adjusting CPU interface base to %#"PRIx64"\n", + "GICv2: Adjusting CPU interface base to %#"PRIpaddr"\n", cbase + aliased_offset); } else if ( csize =3D=3D SZ_128K ) printk(XENLOG_WARNING - "GICv2: GICC size=3D%#"PRIx64" but not aliased\n", + "GICv2: GICC size=3D%#"PRIpaddr" but not aliased\n", csize); =20 gicv2.map_hbase =3D ioremap_nocache(hbase, PAGE_SIZE); diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index f758cad545..b99806af99 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -263,7 +263,7 @@ void dump_pt_walk(paddr_t ttbr, paddr_t addr, =20 pte =3D mapping[offsets[level]]; =20 - printk("%s[0x%03x] =3D 0x%"PRIpaddr"\n", + printk("%s[0x%03x] =3D 0x%"PRIx64"\n", level_strs[level], offsets[level], pte.bits); =20 if ( level =3D=3D 3 || !pte.walk.valid || !pte.walk.table ) --=20 2.17.1