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[109.242.227.208]) by smtp.googlemail.com with ESMTPSA id bj10-20020a170906b04a00b0086b0d53cde2sm825419ejb.201.2023.01.24.04.41.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Jan 2023 04:41:49 -0800 (PST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 7909615f-9be4-11ed-b8d1-410ff93cb8f0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zmfm31eZhrV7KPD8IshZRyc6q/g4zltkTtUdKEtttQQ=; b=EQFj81wwdwMkQd5RRP8BhkKgYUtuOOVbwCt217519o9TM4cqXC+TKEmtodfCdRYMjn bYd3GEsh/dpy7/g84zlbSI9/4SRAjZdlcpIt+kWsh6rgIUhb8V4mD1s1sVN3HePWV2n8 UrJ/+xkJlKoCrJFU53NA9yap0QxBVFot0BK5Ph24AzexkUnfE7gVvVXyYeN9WbwUzq2C GTTxM5GYE465NX4dnqrkQkenKVrg3f4w7tiQWQCav7D9Mx4o2F4ku8kB9UQu6q9UJ98z z6zYsv6XlX6Q1meO0bMdQGIXvMK/HI54+4tyG+xlliQ8VQZ8wZlPhJ/kiic2s2rmq7GV oZWg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zmfm31eZhrV7KPD8IshZRyc6q/g4zltkTtUdKEtttQQ=; b=BBWlPf23+2aEFFt9vOsRp6RGKgVSyENw6Ga1rYk/j/k5fyrxvR+NSwkWAt+JQnbKNQ V/3roW57+Ko1E9/erXPr9YWlasZNjfs2p357MvXXWGNPvgH8DrbduYdGIKVQBpBzAo6H UnbRNiiq/GkBblQfXFhzCt+Z/us36A4Vh1y/b02y2AOnFC5vK1R4kQWLqJcR6a6TOwdn b0NnkSIypp2IsCPwmlwboBzsDqkwPZ69Xi7uWNzcjNUQA32qpFP8t1268GZL4f6WZna3 tN9tuWdkKo3Z6mwyohSu8TaHMUdiC58q9M2naKSwzpzSOXLC095nx+DyTc431f5SHVIu nh1A== X-Gm-Message-State: AFqh2ko2Y8N4WyePL8mF3uqH1idh5J/9jZ69kS+M3zYx4WkeQZmAp4kV wDzZ3Xl2OCKgdTq3UMnbkxRqQ14j3dM= X-Google-Smtp-Source: AMrXdXsBSp8DWfrFCuLMLBmMTWvsN+rMvrspA2sLzBE5wcEmUbwdVPYEG1X/KxMGCAdUAQRwS51wxA== X-Received: by 2002:a17:907:6745:b0:86c:f7ac:71f7 with SMTP id qm5-20020a170907674500b0086cf7ac71f7mr30134092ejc.8.1674564110000; Tue, 24 Jan 2023 04:41:50 -0800 (PST) From: Xenia Ragiadakou To: xen-devel@lists.xenproject.org Cc: Jan Beulich , Paul Durrant , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v4 1/5] x86/iommu: snoop control is allowed only by Intel VT-d Date: Tue, 24 Jan 2023 14:41:38 +0200 Message-Id: <20230124124142.38500-2-burzalodowa@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230124124142.38500-1-burzalodowa@gmail.com> References: <20230124124142.38500-1-burzalodowa@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1674564145456100001 Content-Type: text/plain; charset="utf-8" The AMD-Vi driver forces coherent accesses by hardwiring the FC bit to 1. Therefore, given that iommu_snoop is used only when the iommu is enabled, when Xen is configured with only the AMD iommu enabled, iommu_snoop can be reduced to a #define to true. No functional change intended. Signed-off-by: Xenia Ragiadakou --- No changes in v4 Depends on Jan's "x86/shadow: make iommu_snoop usage consistent with HAP's" being applied first. xen/include/xen/iommu.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/xen/include/xen/iommu.h b/xen/include/xen/iommu.h index 4f22fc1bed..626731941b 100644 --- a/xen/include/xen/iommu.h +++ b/xen/include/xen/iommu.h @@ -74,7 +74,12 @@ extern enum __packed iommu_intremap { iommu_intremap_restricted, iommu_intremap_full, } iommu_intremap; -extern bool iommu_igfx, iommu_qinval, iommu_snoop; +extern bool iommu_igfx, iommu_qinval; +#ifdef CONFIG_INTEL_IOMMU +extern bool iommu_snoop; +#else +# define iommu_snoop true +#endif /* CONFIG_INTEL_IOMMU */ #else # define iommu_intremap false # define iommu_snoop false --=20 2.37.2 From nobody Mon May 6 18:43:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1674564144; cv=none; d=zohomail.com; s=zohoarc; b=cURBieUE7hYdpiKAOZqaL3B6giq7wje982CtcSBin6al97vAcJGnzJBzF0DRC5YJAFcyeYilG0tk1fUxW0k3+AaEThb4DEwOht+DxiRewhMUjLilEEt0R0kK2fGPIRJbWsNMW8JVGUg3WmkIfuP/9y+6MM+wPzPHpLs8jvNQilk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1674564144; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=w2olX0nzQBjitvSin0uiejmf+7loZKGT4TX0YsAFXQ0=; b=PTDourlUH71jKrvYuOG2+yG3lwYaIJrxRRIW/zd7JISSVvX/Od0gfa1q2YKzKdZ22WIHt5BkRXUXJPqYydDxL51eDa4Q7PxYrRGMXYkWKRn5KGPMfOM9obHk8nIUj7vq0+L/OHuv4sGb3wExwA1FD9wJ1u9f1bLgFswZ1GEepHs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 16745641444591015.2965593541416; Tue, 24 Jan 2023 04:42:24 -0800 (PST) Received: from list by lists.xenproject.org with outflank-mailman.483549.749772 (Exim 4.92) (envelope-from ) id 1pKIcd-0000Nl-UJ; Tue, 24 Jan 2023 12:41:55 +0000 Received: by outflank-mailman (output) from mailman id 483549.749772; Tue, 24 Jan 2023 12:41:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pKIcd-0000Nc-Qw; Tue, 24 Jan 2023 12:41:55 +0000 Received: by outflank-mailman (input) for mailman id 483549; Tue, 24 Jan 2023 12:41:54 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pKIcc-0008Um-FQ for xen-devel@lists.xenproject.org; Tue, 24 Jan 2023 12:41:54 +0000 Received: from mail-ej1-x62d.google.com (mail-ej1-x62d.google.com [2a00:1450:4864:20::62d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 7a554de8-9be4-11ed-b8d1-410ff93cb8f0; Tue, 24 Jan 2023 13:41:52 +0100 (CET) Received: by mail-ej1-x62d.google.com with SMTP id kt14so38689985ejc.3 for ; Tue, 24 Jan 2023 04:41:52 -0800 (PST) Received: from uni.router.wind (adsl-208.109.242.227.tellas.gr. [109.242.227.208]) by smtp.googlemail.com with ESMTPSA id bj10-20020a170906b04a00b0086b0d53cde2sm825419ejb.201.2023.01.24.04.41.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Jan 2023 04:41:51 -0800 (PST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 7a554de8-9be4-11ed-b8d1-410ff93cb8f0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=w2olX0nzQBjitvSin0uiejmf+7loZKGT4TX0YsAFXQ0=; b=WXd780q1ocBcbk6sCNzF6Xey6SZmr18KWI+2TiUMqD3MK3Smf3q7iku4p7K+kUGgHU CjkjZf248ClmEFSAhMA63gEUAcOyL2+yvG4XlRLuIRMODcMtebpNvez7gV/+2XTA6ZYW 2VGlerwlLet7vqZyh0enwE2RjGhubyeOggTp3uAyQ35WYi+jxSFxa6ys5QLy8opFKC9h 0JPKwd4X62elZPmnUccB/dXc8I9zY5SHsvhL9Ii7hjUTQDobLqXg0dV+tFA38K+Zxl0S X6tAdUGC30ndH+2ahdZtAgekYpf7alUYP97U/dwk2vtnWmCnbGtfBCQ9JMV83XjpvPpa DDQg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=w2olX0nzQBjitvSin0uiejmf+7loZKGT4TX0YsAFXQ0=; b=xvMQOLOyFr4rAnNEhWjiF52IAqb1lIdhaFHXgLh7c4Wtnmw2WGjt41ye/pmKv/55J3 bbzRnmc9nXM6MzhhDy/6qijhhxNx+2+VxZMk/Py8D0OeHl+2U+bG2RMFjsRiMPq4NE9/ 8pzLN/PVUJEs3KJ8egQiZp/cYv6Jjom89nX0XPPzUyw++T1Uj7WCLc1wRchqX1+VJ8zj Z2unpDImMWT0arFSHXFGdskR8skccm1BN+epC674ZMG0jlHWPvy5084sDya7kLWnnhwj H6fzuQXRYRqjMF0dEO7WTb6mDZmxeUSV8VnCPQH6guG3baeVHRYBdEBQbcNwK/UyeYha ec2Q== X-Gm-Message-State: AFqh2koYLLYYXI9bhItxYziIQ+JjIyMABC04ju4x/FQMhWyBSC1OoV1e o4UvpO+U07i9ghaZo02+BiiyghVnsB4= X-Google-Smtp-Source: AMrXdXuoIBMj013AoW65KBsYxEJXpnwAVaZyigFL3YJLPK2E8PyP0ab2oH+ARij84GXj+pgKmauWyQ== X-Received: by 2002:a17:907:3ad0:b0:870:7c88:4668 with SMTP id fi16-20020a1709073ad000b008707c884668mr25029985ejc.68.1674564111992; Tue, 24 Jan 2023 04:41:51 -0800 (PST) From: Xenia Ragiadakou To: xen-devel@lists.xenproject.org Cc: Kevin Tian , Jan Beulich , Paul Durrant , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v4 2/5] x86/iommu: make code addressing CVE-2011-1898 no VT-d specific Date: Tue, 24 Jan 2023 14:41:39 +0200 Message-Id: <20230124124142.38500-3-burzalodowa@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230124124142.38500-1-burzalodowa@gmail.com> References: <20230124124142.38500-1-burzalodowa@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1674564145500100002 Content-Type: text/plain; charset="utf-8" The variable untrusted_msi indicates whether the system is vulnerable to CVE-2011-1898 due to the absence of interrupt remapping support. Although AMD iommus with interrupt remapping disabled are also affected, this case is not handled yet. Given that the issue is not VT-d specific, and to accommodate future use of the flag for covering also the AMD iommu case, move the definition of the flag out of the VT-d specific code to the common x86 iommu code. Also, since the current implementation assumes that only PV guests are prone to this attack, take the opportunity to define untrusted_msi only when PV is enabled. No functional change intended. Signed-off-by: Xenia Ragiadakou Reviewed-by: Jan Beulich --- Changes in v4: - in vtd code, guard with CONFIG_PV the use of untrusted_msi - mention in commit log that CVE-2011-1898 currently is not addressed for AMD iommus with disabled intremap - add Jan's Reviewed-by tag xen/drivers/passthrough/vtd/iommu.c | 5 ++--- xen/drivers/passthrough/x86/iommu.c | 5 +++++ 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/= vtd/iommu.c index 62e143125d..e97b1fe8cd 100644 --- a/xen/drivers/passthrough/vtd/iommu.c +++ b/xen/drivers/passthrough/vtd/iommu.c @@ -54,9 +54,6 @@ ? dom_iommu(d)->arch.vtd.pgd_maddr \ : (pdev)->arch.vtd.pgd_maddr) =20 -/* Possible unfiltered LAPIC/MSI messages from untrusted sources? */ -bool __read_mostly untrusted_msi; - bool __read_mostly iommu_igfx =3D true; bool __read_mostly iommu_qinval =3D true; #ifndef iommu_snoop @@ -2770,6 +2767,7 @@ static int cf_check reassign_device_ownership( if ( !has_arch_pdevs(target) ) vmx_pi_hooks_assign(target); =20 +#ifdef CONFIG_PV /* * Devices assigned to untrusted domains (here assumed to be any d= omU) * can attempt to send arbitrary LAPIC/MSI messages. We are unprot= ected @@ -2778,6 +2776,7 @@ static int cf_check reassign_device_ownership( if ( !iommu_intremap && !is_hardware_domain(target) && !is_system_domain(target) ) untrusted_msi =3D true; +#endif =20 ret =3D domain_context_mapping(target, devfn, pdev); =20 diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/= x86/iommu.c index f671b0f2bb..c5021ea023 100644 --- a/xen/drivers/passthrough/x86/iommu.c +++ b/xen/drivers/passthrough/x86/iommu.c @@ -36,6 +36,11 @@ bool __initdata iommu_superpages =3D true; =20 enum iommu_intremap __read_mostly iommu_intremap =3D iommu_intremap_full; =20 +#ifdef CONFIG_PV +/* Possible unfiltered LAPIC/MSI messages from untrusted sources? */ +bool __read_mostly untrusted_msi; +#endif + #ifndef iommu_intpost /* * In the current implementation of VT-d posted interrupts, in some extreme --=20 2.37.2 From nobody Mon May 6 18:43:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1674564144; cv=none; d=zohomail.com; s=zohoarc; b=URl0Jgw0kxAc+vJzd4berxudsYJoDAJfVw+7EmNqYtD84rUo8Fzs4JvSlfc3bMea/4NEw/K+dsLrD7mCtHsDeY3e3t9tW4jkYcrGvPhqaDJSUI/hZ3fkmPDtsdaBO8iEj/6jPXOhvDJziHgfuTpd1/0+SWn6pf2g1v6AQMaocR8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1674564144; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=1Nu8ZqoSCJrh9/McWp3IN7UXZ38cJPK4OKj3F45cAog=; b=NqJmNLvOiCLCiwoFfXuubkTMUsu4Ag16LmBEwIqetYwz47pvmIG+SsluPXrgvZxaPcnAPtnIzNtlnux58puAmzw9EkS8fTMgUydri61xwBntrXhnlvjpxYuDq+06OoNgroAJFgRSmCdMp6wCsQCzcdphZppg2p+K+oeY/38v1Hc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1674564144685680.5360777526929; Tue, 24 Jan 2023 04:42:24 -0800 (PST) Received: from list by lists.xenproject.org with outflank-mailman.483550.749782 (Exim 4.92) (envelope-from ) id 1pKIcg-0000fZ-6E; Tue, 24 Jan 2023 12:41:58 +0000 Received: by outflank-mailman (output) from mailman id 483550.749782; Tue, 24 Jan 2023 12:41:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pKIcg-0000fJ-30; Tue, 24 Jan 2023 12:41:58 +0000 Received: by outflank-mailman (input) for mailman id 483550; Tue, 24 Jan 2023 12:41:57 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1pKIcf-0008Um-2J for xen-devel@lists.xenproject.org; Tue, 24 Jan 2023 12:41:57 +0000 Received: from mail-ed1-x535.google.com (mail-ed1-x535.google.com [2a00:1450:4864:20::535]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 7ba15fb2-9be4-11ed-b8d1-410ff93cb8f0; Tue, 24 Jan 2023 13:41:54 +0100 (CET) Received: by mail-ed1-x535.google.com with SMTP id s3so18152422edd.4 for ; Tue, 24 Jan 2023 04:41:54 -0800 (PST) Received: from uni.router.wind (adsl-208.109.242.227.tellas.gr. [109.242.227.208]) by smtp.googlemail.com with ESMTPSA id bj10-20020a170906b04a00b0086b0d53cde2sm825419ejb.201.2023.01.24.04.41.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Jan 2023 04:41:53 -0800 (PST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 7ba15fb2-9be4-11ed-b8d1-410ff93cb8f0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=1Nu8ZqoSCJrh9/McWp3IN7UXZ38cJPK4OKj3F45cAog=; b=d+F72xaSZt1toJYte3aEmpa32g8w7JNzjAHaGcBfFH6Q34IFtABHt4x777I2nbNQLu Vis7YVf7NKeBF4uHVZe1b452nHzcSTGlnZccNOjs9VuNOFW+W8gpmT3Vq6U6n7qjSZiq AYqAUsoHeMZ4k10oJwb3qpKMZfK2kaIsnFzHlgbMI9iRbUuoKak4FCPYXlDG9J2gKJQ6 LlqU9yS9tiHNdNsNzgsD41Q3z3dMPpkTKwfHmA5jyP3XaHnU8lEmiSqy48RUSqQK0a4i iiv2urgsulfwi4XNAxRF8jY3JLGnVBrRmSCYRxslS6EhyrH8H4WbaqIziO1yOjx6zW0D JICA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1Nu8ZqoSCJrh9/McWp3IN7UXZ38cJPK4OKj3F45cAog=; b=qmJPtxwgG9Y0YxpQZrGZqrkfOrM7V4Ff45QafnEJX82TBttWi6ipG+AHPGAr5TtsC4 OZQGvpFkW+ePwknMPIGOJw9SLO7tRJvAo4R1o8j1kJ5wOS6DsHxVNiqk6He1E/lo5E79 B1Ee41AWKbV8tGz3Lb67GE+t15Q7l3QLlHoY4D5LWwWdrdT7d1LQT8VCMOwOfofxPFc4 Xc22cTzt6uhbJuJUxXnVVmL7y0WaTfDmuX4jbWEo5ytkluXAJ4vKa7sKmqEaf7xmjLdI +r3MKhncQrRj16Ij58ouydCCcdOyllmIoz1IFSPSkAM46/UfggMIoeNglfX6fbxrL7Rm PIcA== X-Gm-Message-State: AO0yUKXd0O8OVnTDOsDbIUcuhAHs3roihlOkhuC0Sg2d5TyobPDHdbnr InMh+Dh1pg0/3u5rQQaHitVXCb+Qt34= X-Google-Smtp-Source: AK7set87mxamyZnHvL9xdTE6v82DviNp4u2S57Bdrz81bYdzYbo2x/+A4hn1xUxMTlXitNRFZVtueQ== X-Received: by 2002:a05:6402:1745:b0:4a0:8bb5:78cc with SMTP id v5-20020a056402174500b004a08bb578ccmr1697674edx.20.1674564114084; Tue, 24 Jan 2023 04:41:54 -0800 (PST) From: Xenia Ragiadakou To: xen-devel@lists.xenproject.org Cc: Jun Nakajima , Kevin Tian , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Wei Liu , Paul Durrant Subject: [PATCH v4 3/5] x86/iommu: call pi_update_irte through an hvm_function callback Date: Tue, 24 Jan 2023 14:41:40 +0200 Message-Id: <20230124124142.38500-4-burzalodowa@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230124124142.38500-1-burzalodowa@gmail.com> References: <20230124124142.38500-1-burzalodowa@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1674564145522100003 Content-Type: text/plain; charset="utf-8" Posted interrupt support in Xen is currently implemented only for the Intel platforms. Instead of calling directly pi_update_irte() from the common hvm code, add a pi_update_irte callback to the hvm_function_table. Then, create a wrapper function hvm_pi_update_irte() to be used by the common hvm code. In the pi_update_irte callback prototype, pass the vcpu as first parameter instead of the posted-interrupt descriptor that is platform specific, and remove the const qualifier from the parameter gvec since it is not needed and because it does not compile with the alternative code patching in use. Since the posted interrupt descriptor is Intel VT-x specific while msi_msg_write_remap_rte is iommu specific, open code pi_update_irte() inside vmx_pi_update_irte() but replace msi_msg_write_remap_rte() with generic iommu_update_ire_from_msi(). That way vmx_pi_update_irte() is not bound to Intel VT-d anymore. Remove the now unused pi_update_irte() implementation. No functional change intended. Signed-off-by: Xenia Ragiadakou Reviewed-by: Jan Beulich --- Changes in v4: - remove the now unused asm/hvm/vmx/vmcs.h xen/arch/x86/hvm/vmx/vmx.c | 41 ++++++++++++++++++++++++++ xen/arch/x86/include/asm/hvm/hvm.h | 10 +++++++ xen/arch/x86/include/asm/iommu.h | 4 --- xen/drivers/passthrough/vtd/intremap.c | 36 ---------------------- xen/drivers/passthrough/x86/hvm.c | 5 ++-- 5 files changed, 53 insertions(+), 43 deletions(-) diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index ade2a25ce7..270bc98195 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -397,6 +397,43 @@ void vmx_pi_hooks_deassign(struct domain *d) domain_unpause(d); } =20 +/* + * This function is used to update the IRTE for posted-interrupt + * when guest changes MSI/MSI-X information. + */ +static int cf_check vmx_pi_update_irte(const struct vcpu *v, + const struct pirq *pirq, uint8_t gv= ec) +{ + const struct pi_desc *pi_desc =3D v ? &v->arch.hvm.vmx.pi_desc : NULL; + struct irq_desc *desc; + struct msi_desc *msi_desc; + int rc; + + desc =3D pirq_spin_lock_irq_desc(pirq, NULL); + if ( !desc ) + return -EINVAL; + + msi_desc =3D desc->msi_desc; + if ( !msi_desc ) + { + rc =3D -ENODEV; + goto unlock_out; + } + msi_desc->pi_desc =3D pi_desc; + msi_desc->gvec =3D gvec; + + spin_unlock_irq(&desc->lock); + + ASSERT(pcidevs_locked()); + + return iommu_update_ire_from_msi(msi_desc, &msi_desc->msg); + + unlock_out: + spin_unlock_irq(&desc->lock); + + return rc; +} + static const struct lbr_info { u32 base, count; } p4_lbr[] =3D { @@ -2986,8 +3023,12 @@ const struct hvm_function_table * __init start_vmx(v= oid) { alloc_direct_apic_vector(&posted_intr_vector, pi_notification_inte= rrupt); if ( iommu_intpost ) + { alloc_direct_apic_vector(&pi_wakeup_vector, pi_wakeup_interrup= t); =20 + vmx_function_table.pi_update_irte =3D vmx_pi_update_irte; + } + vmx_function_table.deliver_posted_intr =3D vmx_deliver_posted_intr; vmx_function_table.sync_pir_to_irr =3D vmx_sync_pir_to_irr; vmx_function_table.test_pir =3D vmx_test_pir; diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/= hvm/hvm.h index 65768c797e..80e4565bd2 100644 --- a/xen/arch/x86/include/asm/hvm/hvm.h +++ b/xen/arch/x86/include/asm/hvm/hvm.h @@ -28,6 +28,8 @@ #include #include =20 +struct pirq; /* needed by pi_update_irte */ + #ifdef CONFIG_HVM_FEP /* Permit use of the Forced Emulation Prefix in HVM guests */ extern bool_t opt_hvm_fep; @@ -213,6 +215,8 @@ struct hvm_function_table { void (*sync_pir_to_irr)(struct vcpu *v); bool (*test_pir)(const struct vcpu *v, uint8_t vector); void (*handle_eoi)(uint8_t vector, int isr); + int (*pi_update_irte)(const struct vcpu *v, const struct pirq *pirq, + uint8_t gvec); =20 /*Walk nested p2m */ int (*nhvm_hap_walk_L1_p2m)(struct vcpu *v, paddr_t L2_gpa, @@ -776,6 +780,12 @@ static inline void hvm_set_nonreg_state(struct vcpu *v, alternative_vcall(hvm_funcs.set_nonreg_state, v, nrs); } =20 +static inline int hvm_pi_update_irte(const struct vcpu *v, + const struct pirq *pirq, uint8_t gvec) +{ + return alternative_call(hvm_funcs.pi_update_irte, v, pirq, gvec); +} + #else /* CONFIG_HVM */ =20 #define hvm_enabled false diff --git a/xen/arch/x86/include/asm/iommu.h b/xen/arch/x86/include/asm/io= mmu.h index fc0afe35bf..586c7434f2 100644 --- a/xen/arch/x86/include/asm/iommu.h +++ b/xen/arch/x86/include/asm/iommu.h @@ -21,7 +21,6 @@ #include #include #include -#include =20 #define DEFAULT_DOMAIN_ADDRESS_WIDTH 48 =20 @@ -129,9 +128,6 @@ void iommu_identity_map_teardown(struct domain *d); =20 extern bool untrusted_msi; =20 -int pi_update_irte(const struct pi_desc *pi_desc, const struct pirq *pirq, - const uint8_t gvec); - extern bool iommu_non_coherent, iommu_superpages; =20 static inline void iommu_sync_cache(const void *addr, unsigned int size) diff --git a/xen/drivers/passthrough/vtd/intremap.c b/xen/drivers/passthrou= gh/vtd/intremap.c index 1512e4866b..b39bc83282 100644 --- a/xen/drivers/passthrough/vtd/intremap.c +++ b/xen/drivers/passthrough/vtd/intremap.c @@ -866,39 +866,3 @@ void cf_check intel_iommu_disable_eim(void) for_each_drhd_unit ( drhd ) disable_qinval(drhd->iommu); } - -/* - * This function is used to update the IRTE for posted-interrupt - * when guest changes MSI/MSI-X information. - */ -int pi_update_irte(const struct pi_desc *pi_desc, const struct pirq *pirq, - const uint8_t gvec) -{ - struct irq_desc *desc; - struct msi_desc *msi_desc; - int rc; - - desc =3D pirq_spin_lock_irq_desc(pirq, NULL); - if ( !desc ) - return -EINVAL; - - msi_desc =3D desc->msi_desc; - if ( !msi_desc ) - { - rc =3D -ENODEV; - goto unlock_out; - } - msi_desc->pi_desc =3D pi_desc; - msi_desc->gvec =3D gvec; - - spin_unlock_irq(&desc->lock); - - ASSERT(pcidevs_locked()); - - return msi_msg_write_remap_rte(msi_desc, &msi_desc->msg); - - unlock_out: - spin_unlock_irq(&desc->lock); - - return rc; -} diff --git a/xen/drivers/passthrough/x86/hvm.c b/xen/drivers/passthrough/x8= 6/hvm.c index a16e0e5344..e720461a14 100644 --- a/xen/drivers/passthrough/x86/hvm.c +++ b/xen/drivers/passthrough/x86/hvm.c @@ -381,8 +381,7 @@ int pt_irq_create_bind( =20 /* Use interrupt posting if it is supported. */ if ( iommu_intpost ) - pi_update_irte(vcpu ? &vcpu->arch.hvm.vmx.pi_desc : NULL, - info, pirq_dpci->gmsi.gvec); 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[109.242.227.208]) by smtp.googlemail.com with ESMTPSA id bj10-20020a170906b04a00b0086b0d53cde2sm825419ejb.201.2023.01.24.04.41.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Jan 2023 04:41:56 -0800 (PST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 7ce0a908-9be4-11ed-91b6-6bf2151ebd3b DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9EgviqXdsqUwriDOWVGOdIK/T7/metkpbG7A4cQJ2uM=; b=dwsOZAS5rGzi1Ofj87fXv0WD7WUuIB75h0TEF5Ruc/RaQMx/79fNgMlZvoNKa0k5Nc DHjFz6sXcnNXrLLhcy43dlptrgkzZ64vEWGaj40GCxbEqL/wAFeLixT7Pcum+xzNmE/b V4u6CebPD8EqbGQK8j3NXWKjDLm2tyOWqwMxF1SD1KbQ7IUFUIzaeCwoReSAgHXT8kaY kiw1Fdrjp20reAcib9nqPY9VMYq+/H+/u0wuZsUWJ6JN3+EWnm+nKgeUSU5Yx0F3Qdzb JgFEo4N10r8eu18p5XEfuMJ9qiJ98h1/smycwYb+kbN1t16I3hKcZqX0qKpTXHItdpAC O9VQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9EgviqXdsqUwriDOWVGOdIK/T7/metkpbG7A4cQJ2uM=; b=aukeWaVH0LuuLimBHY2ZN4/eMi39pEw9mSIGJEwSxzwIStz4XqsI6uDZ29j/b0OZux UTKTOeIAy22hvhigiV7A/wv7XX+Tbh8MD7+PqhoE3emErQKnxxgD1vC0ZtlwPCBe2p4p RGxleo2iIqwjV3TyNrJXwX+P72nGAJxWLi0c/fo0qdd5fVVtCe/cSJGoP9KGQv+ZNll/ yRThwJMa2czpIr0Wzyun1W1AllEyERnTqhZFU2AlHq7yFAk0442S3a+wXcewq12Lnjs6 7S8GNl1cRFbDBLWyXxez90bTZjKZMNWBJ6T1xplCIBXxL5aQtaf4uxey7L+c0pHmZ+B2 3G/A== X-Gm-Message-State: AFqh2kqDWhxDgzdLEH5h28wjCAVkVW7drFH6VGSowjZDj+h27ZJjxiuY jX1Qt2NJ1A9STR1IOt8be0Q3q9XTLwM= X-Google-Smtp-Source: AMrXdXuu898LxZLuSz2oDd0XfXT03BihJWbG9k2uXtx2TqQAtr+MEkO3mu7cDr2DGovejAcxS3YntA== X-Received: by 2002:a17:906:4b4c:b0:871:e336:cd2a with SMTP id j12-20020a1709064b4c00b00871e336cd2amr28087550ejv.47.1674564116369; Tue, 24 Jan 2023 04:41:56 -0800 (PST) From: Xenia Ragiadakou To: xen-devel@lists.xenproject.org Cc: Kevin Tian , Jan Beulich , Paul Durrant , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v4 4/5] x86/dpci: move hvm_dpci_isairq_eoi() to generic HVM code Date: Tue, 24 Jan 2023 14:41:41 +0200 Message-Id: <20230124124142.38500-5-burzalodowa@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230124124142.38500-1-burzalodowa@gmail.com> References: <20230124124142.38500-1-burzalodowa@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1674564153560100001 Content-Type: text/plain; charset="utf-8" The function hvm_dpci_isairq_eoi() has no dependencies on VT-d driver code and can be moved from xen/drivers/passthrough/vtd/x86/hvm.c to xen/drivers/passthrough/x86/hvm.c, along with the corresponding copyrights. Remove the now empty xen/drivers/passthrough/vtd/x86/hvm.c. Since the function is used only in this file, declare it static. No functional change intended. Signed-off-by: Xenia Ragiadakou Reviewed-by: Jan Beulich --- No changes in v4 xen/drivers/passthrough/vtd/x86/Makefile | 1 - xen/drivers/passthrough/vtd/x86/hvm.c | 64 ------------------------ xen/drivers/passthrough/x86/hvm.c | 45 +++++++++++++++++ xen/include/xen/iommu.h | 1 - 4 files changed, 45 insertions(+), 66 deletions(-) delete mode 100644 xen/drivers/passthrough/vtd/x86/hvm.c diff --git a/xen/drivers/passthrough/vtd/x86/Makefile b/xen/drivers/passthr= ough/vtd/x86/Makefile index 4ef00a4c5b..fe20a0b019 100644 --- a/xen/drivers/passthrough/vtd/x86/Makefile +++ b/xen/drivers/passthrough/vtd/x86/Makefile @@ -1,3 +1,2 @@ obj-y +=3D ats.o -obj-$(CONFIG_HVM) +=3D hvm.o obj-y +=3D vtd.o diff --git a/xen/drivers/passthrough/vtd/x86/hvm.c b/xen/drivers/passthroug= h/vtd/x86/hvm.c deleted file mode 100644 index bc776cf7da..0000000000 --- a/xen/drivers/passthrough/vtd/x86/hvm.c +++ /dev/null @@ -1,64 +0,0 @@ -/* - * Copyright (c) 2008, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License f= or - * more details. - * - * You should have received a copy of the GNU General Public License along= with - * this program; If not, see . - * - * Copyright (C) Allen Kay - * Copyright (C) Weidong Han - */ - -#include -#include -#include - -static int cf_check _hvm_dpci_isairq_eoi( - struct domain *d, struct hvm_pirq_dpci *pirq_dpci, void *arg) -{ - struct hvm_irq *hvm_irq =3D hvm_domain_irq(d); - unsigned int isairq =3D (long)arg; - const struct dev_intx_gsi_link *digl; - - list_for_each_entry ( digl, &pirq_dpci->digl_list, list ) - { - unsigned int link =3D hvm_pci_intx_link(digl->device, digl->intx); - - if ( hvm_irq->pci_link.route[link] =3D=3D isairq ) - { - hvm_pci_intx_deassert(d, digl->device, digl->intx); - if ( --pirq_dpci->pending =3D=3D 0 ) - pirq_guest_eoi(dpci_pirq(pirq_dpci)); - } - } - - return 0; -} - -void hvm_dpci_isairq_eoi(struct domain *d, unsigned int isairq) -{ - struct hvm_irq_dpci *dpci =3D NULL; - - ASSERT(isairq < NR_ISAIRQS); - if ( !is_iommu_enabled(d) ) - return; - - write_lock(&d->event_lock); - - dpci =3D domain_get_irq_dpci(d); - - if ( dpci && test_bit(isairq, dpci->isairq_map) ) - { - /* Multiple mirq may be mapped to one isa irq */ - pt_pirq_iterate(d, _hvm_dpci_isairq_eoi, (void *)(long)isairq); - } - write_unlock(&d->event_lock); -} diff --git a/xen/drivers/passthrough/x86/hvm.c b/xen/drivers/passthrough/x8= 6/hvm.c index e720461a14..6bbd04bf3d 100644 --- a/xen/drivers/passthrough/x86/hvm.c +++ b/xen/drivers/passthrough/x86/hvm.c @@ -14,6 +14,7 @@ * this program; If not, see . * * Copyright (C) Allen Kay + * Copyright (C) Weidong Han * Copyright (C) Xiaohui Xin */ =20 @@ -924,6 +925,50 @@ static void hvm_gsi_eoi(struct domain *d, unsigned int= gsi) hvm_pirq_eoi(pirq); } =20 +static int cf_check _hvm_dpci_isairq_eoi( + struct domain *d, struct hvm_pirq_dpci *pirq_dpci, void *arg) +{ + const struct hvm_irq *hvm_irq =3D hvm_domain_irq(d); + unsigned int isairq =3D (long)arg; + const struct dev_intx_gsi_link *digl; + + list_for_each_entry ( digl, &pirq_dpci->digl_list, list ) + { + unsigned int link =3D hvm_pci_intx_link(digl->device, digl->intx); + + if ( hvm_irq->pci_link.route[link] =3D=3D isairq ) + { + hvm_pci_intx_deassert(d, digl->device, digl->intx); + if ( --pirq_dpci->pending =3D=3D 0 ) + pirq_guest_eoi(dpci_pirq(pirq_dpci)); + } + } + + return 0; +} + +static void hvm_dpci_isairq_eoi(struct domain *d, unsigned int isairq) +{ + const struct hvm_irq_dpci *dpci =3D NULL; + + ASSERT(isairq < NR_ISAIRQS); + + if ( !is_iommu_enabled(d) ) + return; + + write_lock(&d->event_lock); + + dpci =3D domain_get_irq_dpci(d); + + if ( dpci && test_bit(isairq, dpci->isairq_map) ) + { + /* Multiple mirq may be mapped to one isa irq */ + pt_pirq_iterate(d, _hvm_dpci_isairq_eoi, (void *)(long)isairq); + } + + write_unlock(&d->event_lock); +} + void hvm_dpci_eoi(struct domain *d, unsigned int guest_gsi) { const struct hvm_irq_dpci *hvm_irq_dpci; diff --git a/xen/include/xen/iommu.h b/xen/include/xen/iommu.h index 626731941b..405db59971 100644 --- a/xen/include/xen/iommu.h +++ b/xen/include/xen/iommu.h @@ -201,7 +201,6 @@ int hvm_do_IRQ_dpci(struct domain *, struct pirq *); int pt_irq_create_bind(struct domain *, const struct xen_domctl_bind_pt_ir= q *); int pt_irq_destroy_bind(struct domain *, const struct xen_domctl_bind_pt_i= rq *); =20 -void hvm_dpci_isairq_eoi(struct domain *d, unsigned int isairq); struct hvm_irq_dpci *domain_get_irq_dpci(const struct domain *); void free_hvm_irq_dpci(struct hvm_irq_dpci *dpci); =20 --=20 2.37.2 From nobody Mon May 6 18:43:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=pass(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1674564161; cv=none; d=zohomail.com; s=zohoarc; b=T1RQXFIfHO0ysXY+uq8qH6cJof9yhjUobn/5seCHecA9s75urvRqvuotMGc/uqonYNv4YblOr9Z00/X5Fn1q/s1t3LXIfboK24yQXAv7DDFh/gLvIkXSLGl7r3MUhT/9bwcnvJQHsq7kMuZXmJPztRBS7E+yrK53zXAhlXu/EGc= ARC-Message-Signature: i=1; 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[109.242.227.208]) by smtp.googlemail.com with ESMTPSA id bj10-20020a170906b04a00b0086b0d53cde2sm825419ejb.201.2023.01.24.04.41.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 Jan 2023 04:41:58 -0800 (PST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 84a944e9-9be4-11ed-b8d1-410ff93cb8f0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qI0M5gT9kSSd1gsZvE7ggqEPt+mXuOzha9tFmlwlkiE=; b=dKuI58OeLbfqPF7oeKZz0cgwlQZesgZk4RIVJMgZDOh/e8CesFSFn2bfcISkCdJKK9 Zu7nYsZ8i+JCrEiF+eZ7Bz+2R1xQN5963Lbj2MxjhO2Xanm8agm7zDeOqdzV/KgCo8FB 1mYjRSLc3ib+0UjZqvhLwHS7qK6W1g84mjQwK8HI3qi67q0+Mtvu3N3SaQyAsy9BAvv8 PWwQ6AhkW5vmoy/B2/IwLNK+/l/RQBfP4XpUF5oe2tTIJpE8ipnuaoQNziv/Wn0N0vsY 6LgC4WIBH7LIaris1cuXuhfalVa0KVY00GI1+9VYhME76JQ1jdiT3DQwUMhVHNypMQPh +/Cg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qI0M5gT9kSSd1gsZvE7ggqEPt+mXuOzha9tFmlwlkiE=; b=sZTtYo412eoXD2LF/+k7+4mnzIuljF/OSxCibqvRlo4aXG/63FWySd0/tjQMJCdXQe peiLwv3vlgT/4xbBomHJU+K2NARnj7RNt5mfSEoLZVUObGu9YHf+Jiav3qOY8tiX0OPY sX5WlHI4TAjXAQTjIv53pWI3w5nBg4Wg29ZIEAImLqS+pT0OORFhPaRVeoTN1+NswhNh dJqU5IJUpWJXlCqC5tAQKB5Wjq0lGCzlakAikMof7sbymS4Zdwsp4l5K/HmJQ6TFHeI2 sUejYB4hmdkE/RU3Q3PzVTNicznsDUkhmeruT5AWlJZBuQ9rVOwtBJQP4bmzgGarVeHW kzlA== X-Gm-Message-State: AFqh2kqfncA9aHTefWtf/uMWJZeh8bVv2N7upx/xbboUDWwvwpZnS1cr ItBfhNRtu/Gu0X+y85YOq+Eehdv03KI= X-Google-Smtp-Source: AMrXdXuUclYajZExmVcH4C4tyOQnOeyyDeiiyiuoFV1khSj4/cLh+ok3jFslTwhIuV+PqBlHlznl6A== X-Received: by 2002:a17:907:6e2a:b0:871:e9a0:eba7 with SMTP id sd42-20020a1709076e2a00b00871e9a0eba7mr74177322ejc.57.1674564118764; Tue, 24 Jan 2023 04:41:58 -0800 (PST) From: Xenia Ragiadakou To: xen-devel@lists.xenproject.org Cc: Jan Beulich , Paul Durrant , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v4 5/5] x86/iommu: make AMD-Vi and Intel VT-d support configurable Date: Tue, 24 Jan 2023 14:41:42 +0200 Message-Id: <20230124124142.38500-6-burzalodowa@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230124124142.38500-1-burzalodowa@gmail.com> References: <20230124124142.38500-1-burzalodowa@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1674564161411100001 Content-Type: text/plain; charset="utf-8" Provide the user with configuration control over the IOMMU support by making AMD_IOMMU and INTEL_IOMMU options user selectable and able to be turned off. However, there are cases where the IOMMU support is required, for instance = for a system with more than 254 CPUs. In order to prevent users from unknowingly disabling it and ending up with a broken hypervisor, make the support user selectable only if EXPERT is enabled. To preserve the current default configuration of an x86 system, both options depend on X86 and default to Y. Signed-off-by: Xenia Ragiadakou Acked-by: Jan Beulich --- No changes in v4 xen/drivers/passthrough/Kconfig | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/xen/drivers/passthrough/Kconfig b/xen/drivers/passthrough/Kcon= fig index 5c65567744..864fcf3b0c 100644 --- a/xen/drivers/passthrough/Kconfig +++ b/xen/drivers/passthrough/Kconfig @@ -38,10 +38,28 @@ config IPMMU_VMSA endif =20 config AMD_IOMMU - def_bool y if X86 + bool "AMD IOMMU" if EXPERT + depends on X86 + default y + help + Enables I/O virtualization on platforms that implement the + AMD I/O Virtualization Technology (IOMMU). + + If your system includes an IOMMU implementing AMD-Vi, say Y. + This is required if your system has more than 254 CPUs. + If in doubt, say Y. =20 config INTEL_IOMMU - def_bool y if X86 + bool "Intel VT-d" if EXPERT + depends on X86 + default y + help + Enables I/O virtualization on platforms that implement the + Intel Virtualization Technology for Directed I/O (Intel VT-d). + + If your system includes an IOMMU implementing Intel VT-d, say Y. + This is required if your system has more than 254 CPUs. + If in doubt, say Y. =20 config IOMMU_FORCE_PT_SHARE bool --=20 2.37.2