From nobody Wed May 8 02:40:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=arm.com Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1669689688192565.3408990718546; Mon, 28 Nov 2022 18:41:28 -0800 (PST) Received: from list by lists.xenproject.org with outflank-mailman.449214.705873 (Exim 4.92) (envelope-from ) id 1ozqYD-0007pv-Fw; Tue, 29 Nov 2022 02:40:49 +0000 Received: by outflank-mailman (output) from mailman id 449214.705873; Tue, 29 Nov 2022 02:40:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ozqYD-0007po-DG; Tue, 29 Nov 2022 02:40:49 +0000 Received: by outflank-mailman (input) for mailman id 449214; Tue, 29 Nov 2022 02:40:47 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ozqYB-0007ou-Tl for xen-devel@lists.xenproject.org; Tue, 29 Nov 2022 02:40:47 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 38b51b13-6f8f-11ed-8fd2-01056ac49cbb; Tue, 29 Nov 2022 03:40:45 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4F2E7D6E; Mon, 28 Nov 2022 18:40:50 -0800 (PST) Received: from a015971.shanghai.arm.com (unknown [10.169.188.104]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 65A943F73B; Mon, 28 Nov 2022 18:40:41 -0800 (PST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 38b51b13-6f8f-11ed-8fd2-01056ac49cbb From: Jiamei Xie To: xen-devel@lists.xenproject.org Cc: wei.chen@arm.com, jiamei.xie@arm.com, Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: [PATCH v3 1/2] xen/arm: vpl011: emulate non-SBSA registers as WI/RAZ Date: Tue, 29 Nov 2022 10:39:34 +0800 Message-Id: <20221129023935.1576133-2-jiamei.xie@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221129023935.1576133-1-jiamei.xie@arm.com> References: <20221129023935.1576133-1-jiamei.xie@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZM-MESSAGEID: 1669689690712100002 Content-Type: text/plain; charset="utf-8" When the guest kernel enables DMA engine with "CONFIG_DMA_ENGINE=3Dy", Linux SBSA PL011 driver will access PL011 DMACR register in some functions. As chapter "B Generic UART" in "ARM Server Base System Architecture"[1] documentation describes, SBSA UART doesn't support DMA. In current code, when the kernel tries to access DMACR register, Xen will inject a data abort: Unhandled fault at 0xffffffc00944d048 Mem abort info: ESR =3D 0x96000000 EC =3D 0x25: DABT (current EL), IL =3D 32 bits SET =3D 0, FnV =3D 0 EA =3D 0, S1PTW =3D 0 FSC =3D 0x00: ttbr address size fault Data abort info: ISV =3D 0, ISS =3D 0x00000000 CM =3D 0, WnR =3D 0 swapper pgtable: 4k pages, 39-bit VAs, pgdp=3D0000000020e2e000 [ffffffc00944d048] pgd=3D100000003ffff803, p4d=3D100000003ffff803, pud=3D10= 0000003ffff803, pmd=3D100000003fffa803, pte=3D006800009c090f13 Internal error: ttbr address size fault: 96000000 [#1] PREEMPT SMP ... Call trace: pl011_stop_rx+0x70/0x80 tty_port_shutdown+0x7c/0xb4 tty_port_close+0x60/0xcc uart_close+0x34/0x8c tty_release+0x144/0x4c0 __fput+0x78/0x220 ____fput+0x1c/0x30 task_work_run+0x88/0xc0 do_notify_resume+0x8d0/0x123c el0_svc+0xa8/0xc0 el0t_64_sync_handler+0xa4/0x130 el0t_64_sync+0x1a0/0x1a4 Code: b9000083 b901f001 794038a0 8b000042 (b9000041) ---[ end trace 83dd93df15c3216f ]--- note: bootlogd[132] exited with preempt_count 1 /etc/rcS.d/S07bootlogd: line 47: 132 Segmentation fault start-stop-daemon As discussed in [2], this commit makes the access to non-SBSA registers RAZ/WI as an improvement. [1] https://developer.arm.com/documentation/den0094/c/?lang=3Den [2] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2211161552420.402= 0@ubuntu-linux-20-04-desktop/ Signed-off-by: Jiamei Xie --- v2 -> v3 - emulate non-SBSA registers as WI/RAZ in default case - update commit message v1 -> v2 - print a message using XENLOG_G_DEBUG when it's write-ignore --- xen/arch/arm/vpl011.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/vpl011.c b/xen/arch/arm/vpl011.c index 43522d48fd..1bf803fc1f 100644 --- a/xen/arch/arm/vpl011.c +++ b/xen/arch/arm/vpl011.c @@ -414,11 +414,19 @@ static int vpl011_mmio_read(struct vcpu *v, default: gprintk(XENLOG_ERR, "vpl011: unhandled read r%d offset %#08x\n", dabt.reg, vpl011_reg); - return 0; + goto read_as_zero; } =20 return 1; =20 +read_as_zero: + if ( !vpl011_reg32_check_access(dabt) ) goto bad_width; + + VPL011_LOCK(d, flags); + *r =3D 0; + VPL011_UNLOCK(d, flags); + return 1; + bad_width: gprintk(XENLOG_ERR, "vpl011: bad read width %d r%d offset %#08x\n", dabt.size, dabt.reg, vpl011_reg); @@ -486,10 +494,11 @@ static int vpl011_mmio_write(struct vcpu *v, default: gprintk(XENLOG_ERR, "vpl011: unhandled write r%d offset %#08x\n", dabt.reg, vpl011_reg); - return 0; + goto write_ignore; } =20 write_ignore: + if ( !vpl011_reg32_check_access(dabt) ) goto bad_width; return 1; =20 bad_width: --=20 2.25.1 From nobody Wed May 8 02:40:06 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; envelope-from=xen-devel-bounces@lists.xenproject.org; helo=lists.xenproject.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org; dmarc=fail(p=none dis=none) header.from=arm.com Return-Path: Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) by mx.zohomail.com with SMTPS id 1669689718877779.0950775296468; Mon, 28 Nov 2022 18:41:58 -0800 (PST) Received: from list by lists.xenproject.org with outflank-mailman.449223.705884 (Exim 4.92) (envelope-from ) id 1ozqYv-0008UR-Pa; Tue, 29 Nov 2022 02:41:33 +0000 Received: by outflank-mailman (output) from mailman id 449223.705884; Tue, 29 Nov 2022 02:41:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ozqYv-0008UK-Mm; Tue, 29 Nov 2022 02:41:33 +0000 Received: by outflank-mailman (input) for mailman id 449223; Tue, 29 Nov 2022 02:41:31 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1ozqYt-0007YF-OH for xen-devel@lists.xenproject.org; Tue, 29 Nov 2022 02:41:31 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 5458ae15-6f8f-11ed-91b6-6bf2151ebd3b; Tue, 29 Nov 2022 03:41:30 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8FA52D6E; Mon, 28 Nov 2022 18:41:36 -0800 (PST) Received: from a015971.shanghai.arm.com (unknown [10.169.188.104]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A39943F73B; Mon, 28 Nov 2022 18:41:27 -0800 (PST) X-Outflank-Mailman: Message body and most headers restored to incoming version X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5458ae15-6f8f-11ed-91b6-6bf2151ebd3b From: Jiamei Xie To: xen-devel@lists.xenproject.org Cc: wei.chen@arm.com, jiamei.xie@arm.com, Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: [PATCH v3 2/2] xen/arm: vpl011: drop redundancy in mmio_write/read Date: Tue, 29 Nov 2022 10:39:35 +0800 Message-Id: <20221129023935.1576133-3-jiamei.xie@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221129023935.1576133-1-jiamei.xie@arm.com> References: <20221129023935.1576133-1-jiamei.xie@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZM-MESSAGEID: 1669689720403100001 Content-Type: text/plain; charset="utf-8" This commit is to drop redundancy in the function vpl011_mmio_write and vpl011_mmio_read: - In vpl011_mmio_read switch block, all cases have a return. So the outside one can be removed. - Each switch case checks access by the same if statments. So we can just use one and put it before the switch block. - The goto label bad_width and read_as_zero is used only once, put the code directly Signed-off-by: Jiamei Xie --- xen/arch/arm/vpl011.c | 66 +++++++++++++------------------------------ 1 file changed, 19 insertions(+), 47 deletions(-) diff --git a/xen/arch/arm/vpl011.c b/xen/arch/arm/vpl011.c index 1bf803fc1f..80b859baed 100644 --- a/xen/arch/arm/vpl011.c +++ b/xen/arch/arm/vpl011.c @@ -354,11 +354,15 @@ static int vpl011_mmio_read(struct vcpu *v, struct domain *d =3D v->domain; unsigned long flags; =20 + if ( !vpl011_reg32_check_access(dabt) ) { + gprintk(XENLOG_ERR, "vpl011: bad read width %d r%d offset %#08x\n", + dabt.size, dabt.reg, vpl011_reg); + return 0; + } + switch ( vpl011_reg ) { case DR: - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width; - if ( vpl011->backend_in_domain ) *r =3D vreg_reg32_extract(vpl011_read_data(d), info); else @@ -366,31 +370,23 @@ static int vpl011_mmio_read(struct vcpu *v, return 1; =20 case RSR: - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width; - /* It always returns 0 as there are no physical errors. */ *r =3D 0; return 1; =20 case FR: - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width; - VPL011_LOCK(d, flags); *r =3D vreg_reg32_extract(vpl011->uartfr, info); VPL011_UNLOCK(d, flags); return 1; =20 case RIS: - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width; - VPL011_LOCK(d, flags); *r =3D vreg_reg32_extract(vpl011->uartris, info); VPL011_UNLOCK(d, flags); return 1; =20 case MIS: - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width; - VPL011_LOCK(d, flags); *r =3D vreg_reg32_extract(vpl011->uartris & vpl011->uartimsc, info); @@ -398,40 +394,25 @@ static int vpl011_mmio_read(struct vcpu *v, return 1; =20 case IMSC: - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width; - VPL011_LOCK(d, flags); *r =3D vreg_reg32_extract(vpl011->uartimsc, info); VPL011_UNLOCK(d, flags); return 1; =20 case ICR: - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width; - /* Only write is valid. */ return 0; =20 default: gprintk(XENLOG_ERR, "vpl011: unhandled read r%d offset %#08x\n", dabt.reg, vpl011_reg); - goto read_as_zero; - } - - return 1; - -read_as_zero: - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width; - - VPL011_LOCK(d, flags); - *r =3D 0; - VPL011_UNLOCK(d, flags); - return 1; - -bad_width: - gprintk(XENLOG_ERR, "vpl011: bad read width %d r%d offset %#08x\n", - dabt.size, dabt.reg, vpl011_reg); - return 0; =20 + /* Read as zero */ + VPL011_LOCK(d, flags); + *r =3D 0; + VPL011_UNLOCK(d, flags); + return 1; + } } =20 static int vpl011_mmio_write(struct vcpu *v, @@ -446,14 +427,18 @@ static int vpl011_mmio_write(struct vcpu *v, struct domain *d =3D v->domain; unsigned long flags; =20 - switch ( vpl011_reg ) + if ( !vpl011_reg32_check_access(dabt) ) { + gprintk(XENLOG_ERR, "vpl011: bad write width %d r%d offset %#08x\n", + dabt.size, dabt.reg, vpl011_reg); + return 0; + } + + switch ( vpl011_reg ) { case DR: { uint32_t data =3D 0; =20 - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width; - vreg_reg32_update(&data, r, info); data &=3D 0xFF; if ( vpl011->backend_in_domain ) @@ -464,8 +449,6 @@ static int vpl011_mmio_write(struct vcpu *v, } =20 case RSR: /* Nothing to clear. */ - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width; - return 1; =20 case FR: @@ -474,8 +457,6 @@ static int vpl011_mmio_write(struct vcpu *v, goto write_ignore; =20 case IMSC: - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width; - VPL011_LOCK(d, flags); vreg_reg32_update(&vpl011->uartimsc, r, info); vpl011_update_interrupt_status(v->domain); @@ -483,8 +464,6 @@ static int vpl011_mmio_write(struct vcpu *v, return 1; =20 case ICR: - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width; - VPL011_LOCK(d, flags); vreg_reg32_clearbits(&vpl011->uartris, r, info); vpl011_update_interrupt_status(d); @@ -498,14 +477,7 @@ static int vpl011_mmio_write(struct vcpu *v, } =20 write_ignore: - if ( !vpl011_reg32_check_access(dabt) ) goto bad_width; return 1; - -bad_width: - gprintk(XENLOG_ERR, "vpl011: bad write width %d r%d offset %#08x\n", - dabt.size, dabt.reg, vpl011_reg); - return 0; - } =20 static const struct mmio_handler_ops vpl011_mmio_handler =3D { --=20 2.25.1